公开(公告)号：US07160821B2

公开(公告)日：2007-01-09

申请号：US10765361

申请日：2004-01-27

申请人： Tzu-Fang Huang ,  Yung-Cheng Lu ,  Li-Qun Xia ,  Ellie Yieh ,  Wai-Fan Yau ,  David W. Cheung ,  Ralf B. Willecke ,  Kuowei Liu ,  Ju-Hyung Lee ,  Farhad K. Moghadam ,  Yeming Jim Ma

发明人： Tzu-Fang Huang ,  Yung-Cheng Lu ,  Li-Qun Xia ,  Ellie Yieh ,  Wai-Fan Yau ,  David W. Cheung ,  Ralf B. Willecke ,  Kuowei Liu ,  Ju-Hyung Lee ,  Farhad K. Moghadam ,  Yeming Jim Ma

IPC分类号： H01L21/02 ,  H01L21/469

CPC分类号： H01L21/31612 ,  C23C16/045 ,  C23C16/401 ,  H01L21/02126 ,  H01L21/02208 ,  H01L21/02274 ,  H01L21/0228 ,  H01L21/02304 ,  H01L21/02362 ,  H01L21/31633 ,  H01L21/76801 ,  H01L21/76808 ,  H01L21/76829 ,  H01L21/76835 ,  H01L2221/1031

摘要： A silicon oxide layer is produced by plasma enhanced decomposition of an organosilicon compound to deposit films having a carbon content of at least 1% by atomic weight. An optional carrier gas may be introduced to facilitate the deposition process at a flow rate less than or equal to the flow rate of the organosilicon compounds. An oxygen rich surface may be formed adjacent the silicon oxide layer by temporarily increasing oxidation of the organosilicon compound.

摘要翻译： 氧化硅层通过有机硅化合物的等离子体增强分解产生，以沉积碳原子量至少为1％的膜。 可以引入任选的载气，以便以小于或等于有机硅化合物的流速的流速促进沉积过程。 可以通过暂时增加有机硅化合物的氧化而在氧化硅层附近形成富氧表面。

公开(公告)号：US07094683B2

公开(公告)日：2006-08-22

申请号：US10633909

申请日：2003-08-04

申请人： Chen-Nan Yeh ,  Yung-Cheng Lu

发明人： Chen-Nan Yeh ,  Yung-Cheng Lu

IPC分类号： H01L21/4763

CPC分类号： H01L21/76807 ,  H01L21/76804

摘要： A method for forming a dual damascene opening to protect a low-K dielectric insulating layer including providing a semiconductor process wafer comprising a via opening extending though a thickness portion of at least one dielectric insulating layer; depositing a first dielectric layer stack layer comprising at least one dielectric insulating layer over the at least one dielectric insulating to seal the via opening; blanket depositing a second dielectric layer stack comprising at least one dielectric layer to form a hardmask over and contacting the first dielectric layer stack; photolithographically patterning and etching through a thickness of the hardmask and the first dielectric layer stack to form a trench opening etching pattern overlying and encompassing the via opening while leaving the via opening sealed; and, etching through a thickness portion of the at least one dielectric insulating layer to form a dual damascene opening.

摘要翻译： 一种用于形成双镶嵌开口以保护低K介电绝缘层的方法，包括提供半导体工艺晶片，其包括通过至少一个介电绝缘层的厚度部分延伸的通孔; 在所述至少一个电介质绝缘体上沉积包括至少一个介电绝缘层的第一介电层堆叠层，以密封所述通孔开口; 包覆沉积包括至少一个电介质层的第二介电层堆叠，以在第一介电层堆叠之上形成硬掩模，并与第一介电层堆叠接触; 通过硬掩模和第一介电层堆叠的厚度进行光刻图案化和蚀刻，以形成覆盖并包围通孔孔的沟槽开口蚀刻图案，同时使通孔开口密封; 并且蚀刻穿过所述至少一个介电绝缘层的厚度部分以形成双镶嵌开口。

公开(公告)号：US07074708B2

公开(公告)日：2006-07-11

申请号：US10789209

申请日：2004-02-27

申请人： Frederic Gaillard ,  Li-Qun Xia ,  Tian-Hoe Lim ,  Ellie Yieh ,  Wai-Fan Yau ,  Shin-Puu Jeng ,  Kuowei Liu ,  Yung-Cheng Lu

发明人： Frederic Gaillard ,  Li-Qun Xia ,  Tian-Hoe Lim ,  Ellie Yieh ,  Wai-Fan Yau ,  Shin-Puu Jeng ,  Kuowei Liu ,  Yung-Cheng Lu

IPC分类号： H01L21/4763

CPC分类号： H01L21/76834 ,  C23C16/401 ,  H01L21/02126 ,  H01L21/02208 ,  H01L21/02211 ,  H01L21/02271 ,  H01L21/02274 ,  H01L21/0228 ,  H01L21/02304 ,  H01L21/02362 ,  H01L21/314 ,  H01L21/31612 ,  H01L21/31633 ,  H01L21/76801 ,  H01L21/7681 ,  H01L21/76814 ,  H01L21/76828

摘要： A method for processing a substrate including depositing a dielectric layer containing silicon, oxygen, and carbon on the substrate by chemical vapor deposition, wherein the dielectric layer has a carbon content of at least 1% by atomic weight and a dielectric constant of less than about 3, and depositing a silicon and carbon containing layer on the dielectric layer. The dielectric constant of a dielectric layer deposited by reaction of an organosilicon compound having three or more methyl groups is significantly reduced by further depositing an amorphous hydrogenated silicon carbide layer by reaction of an alkylsilane in a plasma of a relatively inert gas.

摘要翻译： 一种用于处理衬底的方法，包括通过化学气相沉积在衬底上沉积含有硅，氧和碳的电介质层，其中所述电介质层的碳含量至少为原子量的1％，介电常数小于约 并且在电介质层上沉积含硅和碳的层。 通过使烷基硅烷在相对惰性气体的等离子体中反应而进一步沉积非晶质氢化碳化硅层，沉积了具有三个或更多个甲基的有机硅化合物沉积的电介质层的介电常数显着降低。

公开(公告)号：US07071093B2

公开(公告)日：2006-07-04

申请号：US10810970

申请日：2004-03-26

申请人： Mong-Song Liang ,  Yung-Cheng Lu ,  Huilin Chang

发明人： Mong-Song Liang ,  Yung-Cheng Lu ,  Huilin Chang

IPC分类号： H01L21/4763

CPC分类号： H01L21/76826 ,  H01L21/3105 ,  H01L21/76825 ,  H01L21/76828

摘要： An integrated method comprises providing a low dielectric material, applying a first treatment altering a first property of the low dielectric material, and applying a second treatment altering a second property of the treated low dielectric material and producing a lower dielectric material with better mechanical stability.

摘要翻译： 集成方法包括提供低电介质材料，施加改变低电介质材料的第一特性的第一处理，以及施加改变所处理的低电介质材料的第二特性并产生具有更好的机械稳定性的较低电介质材料的第二处理。

公开(公告)号：US06930061B2

公开(公告)日：2005-08-16

申请号：US10648616

申请日：2003-08-26

申请人： David Cheung ,  Wai-Fan Yau ,  Robert P. Mandal ,  Shin-Puu Jeng ,  Kuo-Wei Liu ,  Yung-Cheng Lu ,  Michael Barnes ,  Ralf B. Willecke ,  Farhad Moghadam ,  Tetsuya Ishikawa ,  Tze Wing Poon

发明人： David Cheung ,  Wai-Fan Yau ,  Robert P. Mandal ,  Shin-Puu Jeng ,  Kuo-Wei Liu ,  Yung-Cheng Lu ,  Michael Barnes ,  Ralf B. Willecke ,  Farhad Moghadam ,  Tetsuya Ishikawa ,  Tze Wing Poon

IPC分类号： A01C15/02 ,  A01C17/00 ,  C23C16/40 ,  H01L21/316 ,  H01L21/768 ,  H01L21/31

CPC分类号： H01L21/76834 ,  C23C16/401 ,  H01L21/02126 ,  H01L21/02203 ,  H01L21/02208 ,  H01L21/02274 ,  H01L21/0228 ,  H01L21/02304 ,  H01L21/02362 ,  H01L21/31612 ,  H01L21/76801 ,  H01L21/76808 ,  H01L21/7681 ,  H01L21/76829 ,  H01L21/76832 ,  H01L21/76835 ,  H01L2221/1031 ,  Y10T428/31663

摘要： A method and apparatus for depositing a low dielectric constant film by reaction of an organosilicon compound and an oxidizing gas at a constant RF power level from about 10 W to about 200 W or a pulsed RF power level from about 20 W to about 500 W. Dissociation of the oxidizing gas can be increased prior to mixing with the organosilicon compound, preferably within a separate microwave chamber, to assist in controlling the carbon content of the deposited film. The oxidized organosilane or organosiloxane film has good barrier properties for use as a liner or cap layer adjacent other dielectric layers. The oxidized organosilane or organosiloxane film may also be used as an etch stop and an intermetal dielectric layer for fabricating dual damascene structures. The oxidized organosilane or organosiloxane films also provide excellent adhesion between different dielectric layers. A preferred oxidized organosilane film is produced by reaction of methylsilane, CH3SiH3, dimethylsilane, (CH3)2SiH2, or 1,1,3,3-tetramethyl-disiloxane, (CH3)2—SiH—O—SiH—(CH3)2, and nitrous oxide, N2O, at a constant RF power level from about 10 W to about 150 W, or a pulsed RF power level from about 20 W to about 250 W during 10% to 30% of the duty cycle.

摘要翻译： 一种用于通过有机硅化合物和氧化性气体以约10W至约200W的恒定RF功率水平的反应沉积低介电常数膜的方法和设备或从约20W至约500W的脉冲RF功率水平。 在与有机硅化合物混合之前，优选在单独的微波室内可以提高氧化气体的离解，以帮助控制沉积膜的碳含量。 氧化的有机硅烷或有机硅氧烷膜具有良好的屏障性能，用作邻近其它介电层的衬垫层或盖层。 氧化的有机硅烷或有机硅氧烷膜也可以用作蚀刻停止层和用于制造双镶嵌结构的金属间介电层。 氧化的有机硅烷或有机硅氧烷膜也在不同的介电层之间提供优异的粘附性。 优选的氧化有机硅烷膜是通过甲基硅烷，CH 3 SiH 3 3，二甲基硅烷，（CH 3 3）2， 或者1,1,3,3-四甲基二硅氧烷，（CH 3 3）2 -SiH-O-SiH - （CH 3 3）2 N 2和一氧化二氮N 2 O，在约10W至约150W的恒定RF功率水平 ，或在占空比的10％至30％期间的约20W至约250W的脉冲RF功率电平。

公开(公告)号：US20050140029A1

公开(公告)日：2005-06-30

申请号：US10975238

申请日：2004-10-28

申请人： Lih-Ping Li ,  Syun-Ming Jang ,  Pi-Tsung Chen ,  Yung-Cheng Lu

发明人： Lih-Ping Li ,  Syun-Ming Jang ,  Pi-Tsung Chen ,  Yung-Cheng Lu

IPC分类号： H01L21/31 ,  H01L21/316 ,  H01L21/469 ,  H01L21/76 ,  H01L23/29 ,  H01L23/31 ,  H01L23/532

CPC分类号： H01L21/02126 ,  H01L21/02203 ,  H01L21/02211 ,  H01L21/02274 ,  H01L21/02304 ,  H01L21/02362 ,  H01L21/31695 ,  H01L23/3192 ,  H01L23/53238 ,  H01L23/53295 ,  H01L2924/0002 ,  H01L2924/19041 ,  H01L2924/00

摘要： The present invention provides for a heterogeneous low k dielectric comprising a main layer and a sub-layer. The main layer comprises a first low k dielectric material with a first low k dielectric constant and the sub-layer comprises a second low k dielectric material with a second low k dielectric constant. The sub-layer directly adjoins the main layer, and the second low k dielectric constant is greater than the first low k dielectric constant by more than 0.1.

摘要翻译： 本发明提供了包含主层和子层的异质低k电介质。 主层包括具有第一低k介电常数的第一低k介电材料，并且子层包括具有第二低k介电常数的第二低k电介质材料。 子层直接邻接主层，第二低k介电常数大于第一低k介电常数大于0.1。

公开(公告)号：US20050110153A1

公开(公告)日：2005-05-26

申请号：US10797224

申请日：2004-03-10

申请人： Zhen-Cheng Wu ,  Tzu-Jen Chou ,  Weng Chang ,  Yung-Cheng Lu ,  Syun-Ming Jang ,  Mong-Song Liang

发明人： Zhen-Cheng Wu ,  Tzu-Jen Chou ,  Weng Chang ,  Yung-Cheng Lu ,  Syun-Ming Jang ,  Mong-Song Liang

IPC分类号： H01L21/44 ,  H01L21/768 ,  H01L23/48 ,  H01L23/532

CPC分类号： H01L21/76835 ,  H01L21/76807 ,  H01L21/76832 ,  H01L21/76834 ,  H01L23/53223 ,  H01L23/53238 ,  H01L23/5329 ,  H01L23/53295 ,  H01L2924/0002 ,  H01L2924/00

摘要： A semiconductor substrate has a first copper layer, on which an etch stop layer and a dielectric layer are successively formed. A second copper layer penetrates the dielectric layer and the etch stop layer to electrically connect to the first metal layer. The etch stop layer has a dielectric constant smaller than 3.5, and the dielectric layer has a dielectric constant smaller than 3.0.

摘要翻译： 半导体衬底具有第一铜层，其上依次形成有蚀刻停止层和电介质层。 第二铜层穿透电介质层和蚀刻停止层以电连接到第一金属层。 蚀刻停止层的介电常数小于3.5，电介质层的介电常数小于3.0。

公开(公告)号：US20050101119A1

公开(公告)日：2005-05-12

申请号：US10703954

申请日：2003-11-06

申请人： Lih-Ping Li ,  Yung-Cheng Lu

发明人： Lih-Ping Li ,  Yung-Cheng Lu

IPC分类号： H01L21/316 ,  H01L21/768 ,  H01L21/76 ,  H01L21/31 ,  H01L21/469 ,  H01L21/4763

CPC分类号： H01L21/02126 ,  H01L21/022 ,  H01L21/02203 ,  H01L21/02263 ,  H01L21/0234 ,  H01L21/02362 ,  H01L21/31695 ,  H01L21/7682 ,  H01L2221/1036 ,  H01L2221/1047

摘要： A method of manufacturing an insulating layer, including forming a first dielectric layer having a first pore size over a substrate, shrinking the first pore size to a second pore size by a first densification process, forming a second dielectric layer over the first dielectric layer, and increasing an aggregate dielectric constant of the first and second dielectric layers by a second densification process.

公开(公告)号：US06756321B2

公开(公告)日：2004-06-29

申请号：US10264398

申请日：2002-10-05

申请人： Chung-Chi Ko ,  Yung-Cheng Lu ,  Lain-Jong Li ,  Lih-Ping Li ,  Yu-Huei Chen ,  Shu-E Ku

发明人： Chung-Chi Ko ,  Yung-Cheng Lu ,  Lain-Jong Li ,  Lih-Ping Li ,  Yu-Huei Chen ,  Shu-E Ku

IPC分类号： H01L2131

CPC分类号： H01L21/02362 ,  H01L21/02118 ,  H01L21/02126 ,  H01L21/022 ,  H01L21/02211 ,  H01L21/02271 ,  H01L21/02274 ,  H01L21/312 ,  H01L21/3122 ,  H01L21/3127 ,  H01L21/3185 ,  H01L21/76801 ,  H01L21/76807 ,  H01L21/76832 ,  H01L21/76835 ,  Y10S438/902

摘要： A method for forming a capping layer for improved adhesion with an underlying insulating layer in a multiple layer semiconductor device manufacturing process including providing a semiconductor wafer including a process surface comprising a dielectric insulating layer; and, providing a capping layer overlying the dielectric insulating layer according to a chemical vapor deposition CVD) process. The capping layer of the present invention has improved adhesion and a reduced dielectric constant with comparable current leakage compared to capping layers of the prior art.

摘要翻译： 一种用于在多层半导体器件制造工艺中形成用于提高与底层绝缘层的粘附性的覆盖层的方法，包括提供包括包括介电绝缘层的工艺表面的半导体晶片; 并且根据化学气相沉积CVD提供覆盖介电绝缘层的覆盖层）。 与现有技术的覆盖层相比，本发明的覆盖层具有改善的粘附性和降低的介电常数，具有相当的电流泄漏。

公开(公告)号：US06660656B2

公开(公告)日：2003-12-09

申请号：US09957551

申请日：2001-09-19

申请人： David Cheung ,  Wai-Fan Yau ,  Robert P. Mandal ,  Shin-Puu Jeng ,  Kuo-Wei Liu ,  Yung-Cheng Lu ,  Michael Barnes ,  Ralf B. Willecke ,  Farhad Moghadam ,  Tetsuya Ishikawa ,  Tze Wing Poon

发明人： David Cheung ,  Wai-Fan Yau ,  Robert P. Mandal ,  Shin-Puu Jeng ,  Kuo-Wei Liu ,  Yung-Cheng Lu ,  Michael Barnes ,  Ralf B. Willecke ,  Farhad Moghadam ,  Tetsuya Ishikawa ,  Tze Wing Poon

IPC分类号： C23C1640

CPC分类号： H01L21/76834 ,  C23C16/401 ,  H01L21/02126 ,  H01L21/02203 ,  H01L21/02208 ,  H01L21/02274 ,  H01L21/0228 ,  H01L21/02304 ,  H01L21/02362 ,  H01L21/31612 ,  H01L21/76801 ,  H01L21/76808 ,  H01L21/7681 ,  H01L21/76829 ,  H01L21/76832 ,  H01L21/76835 ,  H01L2221/1031 ,  Y10T428/31663

摘要： A method and apparatus for depositing a low dielectric constant film by reaction of an organosilicon compound and an oxidizing gas at a constant RF power level from about 10W to about 200W or a pulsed RF power level from about 20W to about 500W. Dissociation of the oxidizing gas can be increased prior to mixing with the organosilicon compound, preferably within a separate microwave chamber, to assist in controlling the carbon content of the deposited film. The oxidized organosilane or organosiloxane film has good barrier properties for use as a liner or cap layer adjacent other dielectric layers. The oxidized organosilane or organosiloxane film may also be used as an etch stop and an intermetal dielectric layer for fabricating dual damascene structures. The oxidized organosilane or organosiloxane films also provide excellent adhesion between different dielectric layers. A preferred oxidized organosilane film is produced by reaction of methylsilane, CH3SiH3, dimethylsilane, (CH3)2SiH2, or 1,1,3,3-tetramethyl-disiloxane, (CH3)2—SiH—O—SiH—(CH3)2, and nitrous oxide, N2O, at a constant RF power level from about 10W to about 150W, or a pulsed RF power level from about 20W to about 250W during 10% to 30% of the duty cycle.

摘要翻译： 一种用于通过有机硅化合物和氧化性气体以约10W至约200W的恒定RF功率水平的反应沉积低介电常数膜的方法和装置或约20W至约500W的脉冲RF功率水平。 在与有机硅化合物混合之前，优选在单独的微波室内可以提高氧化气体的离解，以帮助控制沉积膜的碳含量。 氧化的有机硅烷或有机硅氧烷膜具有良好的屏障性能，用作邻近其它介电层的衬垫层或盖层。 氧化的有机硅烷或有机硅氧烷膜也可以用作蚀刻停止层和用于制造双镶嵌结构的金属间介电层。 氧化的有机硅烷或有机硅氧烷膜也在不同的介电层之间提供优异的粘附性。 优选的氧化有机硅烷膜是通过甲基硅烷，CH 3 SiH 3，二甲基硅烷，（CH 3）2 SiH 2，1,1,3,3-四甲基 - 二硅氧烷，（CH 3）2 -SiH-O-SiH-（CH 3）2， 和一氧化二氮，N2O，在约10W至约150W的恒定RF功率水平，或占空比的10％至30％期间的约20W至约250W的脉冲RF功率水平。