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    METHOD OF PRODUCING LAMINATED DEVICE
    102.
    发明申请
    METHOD OF PRODUCING LAMINATED DEVICE 有权
    生产层压装置的方法

    公开(公告)号：US20130011972A1

    公开(公告)日：2013-01-10

    申请号：US13618280

    申请日：2012-09-14

    Applicant: Martin Standing

    Inventor： Martin Standing

    IPC: H01L21/50

    CPC classification number: H05K1/185 ,  H01L21/4846 ,  H01L23/3107 ,  H01L23/5389 ,  H01L25/072 ,  H01L25/16 ,  H01L2924/0002 ,  H01L2924/12044 ,  H01L2924/13055 ,  H01L2924/13091 ,  H01L2924/14 ,  H05K1/16 ,  H05K3/429 ,  H05K2201/09718 ,  H05K2201/10643 ,  H01L2924/00

    Abstract: A method of producing a laminate insert package includes providing a first metal layer, printing a first dielectric layer on the first metal layer, providing a second metal layer, printing a second dielectric layer on the second metal layer, and printing a dielectric spacer layer on the first dielectric layer. At least one semiconductor chip is attached to either the first or the second metal layer. A first layer assembly comprising the first metal layer, the first dielectric layer, the dielectric spacer layer and a second layer assembly comprising the second metal layer and the second dielectric layer are brought together. The first and second layer assemblies are laminated to form a laminate insert package, whereby the at least one semiconductor chip is embedded within the laminate insert package.

    Abstract translation: 一种制造叠层嵌件封装的方法包括提供第一金属层，在第一金属层上印刷第一介电层，提供第二金属层，在第二金属层上印刷第二介电层，以及将介质间隔层印刷在 第一介电层。 至少一个半导体芯片附接到第一或第二金属层。 包括第一金属层，第一介电层，电介质间隔层和包括第二金属层和第二介电层的第二层组件的第一层组件被聚集在一起。 第一层和第二层组件被层压以形成层压嵌件封装，由此将至少一个半导体芯片嵌入在层叠插件封装内。

    Surface mountable PPTC device with integral weld plate
    104.
    发明授权
    Surface mountable PPTC device with integral weld plate 有权
    具有整体焊接板的表面贴装PPTC装置

    公开(公告)号：US07920045B2

    公开(公告)日：2011-04-05

    申请号：US10802127

    申请日：2004-03-15

    Applicant: Daniel A. Chandler ,  Matthew P. Galla

    Inventor： Daniel A. Chandler ,  Matthew P. Galla

    IPC: H01C7/10

    CPC classification number: H01C1/1406 ,  H01C1/144 ,  H01C7/02 ,  H05K3/328 ,  H05K2201/10492 ,  H05K2201/10643

    Abstract: A surface mount circuit protection device includes a laminar PTC resistive element having first and second major surfaces and a thickness therebetween. A first electrode layer substantially coextensive the first surface is formed of a first metal material of a type adapted to be soldered to a printed circuit substrate. A second electrode layer formed at the second major surface includes structure forming or defining a weld plate. The metal weld plate has a thermal mass and thickness capable of withstanding resistance micro spot welding of a strap interconnect without significant resultant damage to the device. The device is preferably surface mounted to a printed circuit board assembly forming a battery protection circuit connected to a battery/cell by battery strap interconnects, wherein one of the battery strap interconnects is micro spot welded to the weld plate of the device.

    Abstract translation: 表面安装电路保护装置包括具有第一和第二主表面的层状PTC电阻元件和它们之间的厚度。 基本上共同延伸第一表面的第一电极层由适于焊接到印刷电路基板的第一金属材料形成。 形成在第二主表面处的第二电极层包括形成或限定焊接板的结构。 金属焊接板具有热质量和厚度，能够耐受带状互连的电阻微点焊，而不会对器件造成严重的损害。 该装置优选地表面安装到印刷电路板组件，其形成通过电池带互连连接到电池/电池的电池保护电路，其中电池带互连中的一个被微点焊接到装置的焊接板。

    EMBEDDED LAMINATED DEVICE
    105.
    发明申请
    EMBEDDED LAMINATED DEVICE 有权
    嵌入式层压器件

    公开(公告)号：US20110031611A1

    公开(公告)日：2011-02-10

    申请号：US12538470

    申请日：2009-08-10

    Applicant: Martin Standing

    Inventor： Martin Standing

    IPC: H01L23/522 ,  H01L21/768

    CPC classification number: H05K1/185 ,  H01L21/4846 ,  H01L23/3107 ,  H01L23/5389 ,  H01L25/072 ,  H01L25/16 ,  H01L2924/0002 ,  H01L2924/12044 ,  H01L2924/13055 ,  H01L2924/13091 ,  H01L2924/14 ,  H05K1/16 ,  H05K3/429 ,  H05K2201/09718 ,  H05K2201/10643 ,  H01L2924/00

    Abstract: An electronic device includes at least one semiconductor chip, each semiconductor chip defining a first main face and a second main face opposite to the first main face. A first metal layer is coupled to the first main face of the at least one semiconductor chip and a second metal layer is coupled to the second main face of the at least one semiconductor chip. A third metal layer overlies the first metal layer and a fourth metal layer overlies the second metal layer. A first through-connection extends from the third metal layer to the fourth metal layer, the first through-connection being electrically connected with the first metal layer and electrically disconnected from the second metal layer. A second through-connection extends from the third metal layer to the fourth metal layer, the second through-connection being electrically connected with the second metal layer and electrically disconnected from the first metal layer.

    Abstract translation: 电子设备包括至少一个半导体芯片，每个半导体芯片限定第一主面和与第一主面相对的第二主面。 第一金属层耦合到至少一个半导体芯片的第一主面，第二金属层耦合到至少一个半导体芯片的第二主面。 第三金属层覆盖在第一金属层上，第四金属层覆盖在第二金属层上。 第一贯通连接从第三金属层延伸到第四金属层，第一贯通连接与第一金属层电连接并与第二金属层电连接。 第二贯通连接从第三金属层延伸到第四金属层，第二贯通连接与第二金属层电连接并与第一金属层电连接。

    Circuit board configuration
    106.
    发明授权
    Circuit board configuration 有权
    电路板配置

    公开(公告)号：US07672140B2

    公开(公告)日：2010-03-02

    申请号：US12009895

    申请日：2008-01-22

    Applicant: Bruce Lane

    Inventor： Bruce Lane

    IPC: H05K7/00

    CPC classification number: H05K1/184 ,  H05K3/34 ,  H05K3/42 ,  H05K2201/09645 ,  H05K2201/10166 ,  H05K2201/10174 ,  H05K2201/10643

    Abstract: A circuit board configuration and method of packaging electronic component embedded into the circuit board in a manner that supports the electronic component thermally, electrically, and mechanically thereof, comprising a circuit board having a first surface and a circuit trace on the first surface; a recess or slot formed on the first surface defined by at least one sidewall that is oblique to the first surface of the circuit board; two or more plated surfaces on the at least one oblique sidewall and electrically connected to the circuit trace; and an electronic component having two or more electrical contact surfaces mounted to the two or more plated surfaces such that the electronic component is physically mounted to the oblique sidewall and in electrical communication with the circuit trace. The circuit board configuration may further comprise an encapsulant at least one end of the electronic component and a conductive material between the oblique sidewall and the electronic component to seal the electronic component inside the slot.

    Abstract translation: 一种电路板配置和方法，其以以电，电和机械方式支撑所述电子部件的方式包装嵌入到所述电路板中的电子部件，所述电子部件包括在所述第一表面上具有第一表面和电路迹线的电路板; 在由所述电路板的第一表面倾斜的至少一个侧壁限定的所述第一表面上形成的凹部或槽; 在所述至少一个倾斜侧壁上的两个或更多个电镀表面并电连接到所述电路迹线; 以及电子部件，其具有安装到所述两个或更多个电镀表面的两个或更多个电接触表面，使得所述电子部件物理地安装到所述倾斜侧壁并与所述电路迹线电连通。 电路板配置还可以包括密封剂电子部件的至少一个端部和在倾斜侧壁和电子部件之间的导电材料，以密封槽内的电子部件。

    Circuit board configuration
    108.
    发明申请
    Circuit board configuration 有权
    电路板配置

    公开(公告)号：US20090183905A1

    公开(公告)日：2009-07-23

    申请号：US12009895

    申请日：2008-01-22

    Applicant: Bruce Ray Lane

    Inventor： Bruce Ray Lane

    IPC: H05K1/18

    CPC classification number: H05K1/184 ,  H05K3/34 ,  H05K3/42 ,  H05K2201/09645 ,  H05K2201/10166 ,  H05K2201/10174 ,  H05K2201/10643

    Abstract: A circuit board configuration and method of packaging electronic component embedded into the circuit board in a manner that supports the electronic component thermally, electrically, and mechanically thereof, comprising a circuit board having a first surface and a circuit trace on the first surface; a recess or slot formed on the first surface defined by at least one sidewall that is oblique to the first surface of the circuit board; two or more plated surfaces on the at least one oblique sidewall and electrically connected to the circuit trace; and an electronic component having two or more electrical contact surfaces mounted to the two or more plated surfaces such that the electronic component is physically mounted to the oblique sidewall and in electrical communication with the circuit trace. The circuit board configuration may further comprise an encapsulant at least one end of the electronic component and a conductive material between the oblique sidewall and the electronic component to seal the electronic component inside the slot.

    Abstract translation: 一种电路板配置和方法，其以以电，电和机械方式支撑所述电子部件的方式包装嵌入到所述电路板中的电子部件，所述电子部件包括在所述第一表面上具有第一表面和电路迹线的电路板; 在由所述电路板的第一表面倾斜的至少一个侧壁限定的所述第一表面上形成的凹部或槽; 在所述至少一个倾斜侧壁上的两个或更多个电镀表面并电连接到所述电路迹线; 以及电子部件，其具有安装到所述两个或更多个电镀表面的两个或更多个电接触表面，使得所述电子部件物理地安装到所述倾斜侧壁并与所述电路迹线电连通。 电路板配置还可以包括密封剂电子部件的至少一个端部和在倾斜侧壁和电子部件之间的导电材料，以密封槽内的电子部件。

    Lead plate-attached coin-type battery whose lead plate is attached to exclusively either an outer can or a cap
    109.
    发明申请
    Lead plate-attached coin-type battery whose lead plate is attached to exclusively either an outer can or a cap 有权
    铅板附币币型电池，其铅板仅安装在外罐或盖上

    公开(公告)号：US20080081253A1

    公开(公告)日：2008-04-03

    申请号：US11905282

    申请日：2007-09-28

    Applicant: Tomoyuki Shose ,  Katsuyuki Kida ,  Masao Kondou ,  Yasuo Akai

    Inventor： Tomoyuki Shose ,  Katsuyuki Kida ,  Masao Kondou ,  Yasuo Akai

    IPC: H01M2/02

    CPC classification number: H01M2/0413 ,  H01M2/0222 ,  H01M10/052 ,  H05K3/341 ,  H05K2201/0373 ,  H05K2201/10462 ,  H05K2201/10643 ,  H05K2201/10659 ,  Y02P70/613 ,  Y10S228/901

    Abstract: A lead plate-attached coin-type battery is constituted from a combination of a coin-type battery and a positive lead plate. In the coin-type battery, a negative cap seals the aperture of a positive outer can. In a lateral view, the positive lead plate is crank-shaped, and one end thereof is attached to the outer surface of the positive outer can of the coin-type battery. A lead plate is not attached to the negative cap. One or more projections that project in the Z axis direction are provided on the negative cap. In the lead plate-attached coin-type battery, the positive lead plate and negative cap have been attached to respective conductive lands on a circuit board by a solder reflow method.

    Abstract translation: 引线板式硬币型电池由硬币型电池和正极引线板的组合构成。 在硬币型电池中，负极帽密封正外壳的孔径。 在侧视图中，正极引线板是曲柄形的，其一端连接到硬币型电池的正外壳的外表面。 引线板未连接到负极盖。 在Z轴方向上投影的一个或多个突起设置在负极盖上。 在带引线板的硬币型电池中，通过焊料回流法将正极引线板和负极盖安装在电路板上的各个导电焊盘上。

    Press-activated electronic component discharging facilitating apparatus
    110.
    发明授权
    Press-activated electronic component discharging facilitating apparatus 有权
    按压式电子元件放电促进装置

    公开(公告)号：US07177158B1

    公开(公告)日：2007-02-13

    申请号：US11365267

    申请日：2006-02-28

    Applicant: Zi-Gui Luo ,  Fred Chen

    Inventor： Zi-Gui Luo ,  Fred Chen

    IPC: H05K7/00 ,  H05K1/16

    CPC classification number: H05K3/301 ,  H01M2/0222 ,  H01M6/16 ,  H01M10/425 ,  H05K3/325 ,  H05K2201/10037 ,  H05K2201/10053 ,  H05K2201/10265 ,  H05K2201/10643

    Abstract: A press-activated electronic component discharging facilitating apparatus is proposed, which is designed for use with a battery-powered electronic component, such as a CMOS (Complementary Metal Oxide Semiconductor) memory unit installed on a computer motherboard, for providing the CMOS memory unit with a user-operated press-activated discharging facilitating function, and which is characterized by the capability of allowing the user to facilitate the discharging of the CMOS memory unit simply by pressing the battery cell used to power the CMOS memory unit, without having to dismount the battery cell from the motherboard and flip hardware jumpers as in the case of prior art. This feature allows the discharging process of the CMOS memory to be carried out more conveniently and efficiently.

    Abstract translation: 提出了一种按压激活的电子元件放电促进装置，其被设计用于与电池供电的电子部件一起使用，诸如安装在计算机主板上的CMOS（互补金属氧化物半导体）存储器单元，用于向CMOS存储器单元提供 用户操作的按压激活放电促进功能，并且其特征在于，允许用户简单地通过按压用于为CMOS存储器单元供电的电池单元而容易地放电CMOS存储器单元的能力，而不必卸下 如现有技术的情况，来自主板的电池单元和翻转硬件跳线。 该特征允许更方便和有效地执行CMOS存储器的放电过程。

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