公开(公告)号：US20200263297A1

公开(公告)日：2020-08-20

申请号：US16748299

申请日：2020-01-21

Applicant: ASM IP Holding B.V.

Inventor： Henri Jussila ,  Chiyu Zhu ,  Qi Xie ,  Jiyeon Kim ,  Tom E. Blomberg

IPC: C23C16/455 ,  H01L21/02 ,  C23C16/34 ,  C23C16/40

Abstract: Vapor deposition processes such as atomic layer deposition (ALD) processes employing a deposition enhancing precursor can be used to form a variety of oxide and nitride films, including metal oxide, metal nitride, metal oxynitride, silicon oxide and silicon nitride films. For example, the methods can be used to deposit transition metal nitrides, transition metal oxides, and silicon oxides and nitrides. In some embodiments the deposition enhancing precursor comprises a Group II metal such as Mg, Sr, Ba or Ca. Atomic layer deposition processes may comprise a deposition cycle comprising a first sub-cycle in which a substrate is contacted with a deposition enhancing precursor and an oxygen or nitrogen reactant and a second sub-cycle in which the substrate is contacted with a metal or silicon precursor and an oxygen or nitrogen reactant. In some embodiments the methods advantageously enable improved thin film formation, for example increased deposition rates.

公开(公告)号：US10367080B2

公开(公告)日：2019-07-30

申请号：US15144506

申请日：2016-05-02

Applicant: ASM IP Holding B.V.

Inventor： Fu Tang ,  Qi Xie ,  Jan Willem Maes ,  Xiaoqiang Jiang ,  Michael Eugene Givens

IPC: H01L21/02 ,  H01L21/28 ,  H01L29/66

Abstract: A method for forming layers suitable for a V-NAND stack is disclosed. Specifically, the method may include multiple cycles for forming an oxide and a nitride in order to form an oxynitride layer.

公开(公告)号：US20190088555A1

公开(公告)日：2019-03-21

申请号：US15707786

申请日：2017-09-18

Applicant: ASM IP Holding B.V.

Inventor： Qi Xie ,  Chiyu Zhu ,  Kiran Shrestha ,  Pauline Calka ,  Oreste Madia ,  Jan Willem Maes ,  Michael Eugene Givens

IPC: H01L21/8238 ,  H01L29/49 ,  H01L27/092 ,  H01L29/51

Abstract: A method for forming a semiconductor device structure is disclosure. The method may include, depositing an NMOS gate dielectric and a PMOS gate dielectric over a semiconductor substrate, depositing a first work function metal over the NMOS gate dielectric and over the PMOS gate dielectric, removing the first work function metal over the PMOS gate dielectric, and depositing a second work function metal over the NMOS gate dielectric and over the PMOS gate dielectric. Semiconductor device structures including desired metal gate electrodes deposited by the methods of the disclosure are also disclosed.

公开(公告)号：US20190067095A1

公开(公告)日：2019-02-28

申请号：US16117530

申请日：2018-08-30

Applicant: ASM IP Holding B.V.

Inventor： Chiyu Zhu ,  Kiran Shrestha ,  Qi Xie ,  Bhushan Zope

IPC: H01L21/768 ,  C23C16/455 ,  C23C16/448

Abstract: There is provided a method of forming a layer, comprising depositing a seed layer on the substrate; and depositing a bulk layer on the seed layer. Depositing the seed layer comprises supplying a first precursor comprising metal and halogen atoms to the substrate; and supplying a first reactant to the substrate. Depositing the bulk layer comprises supplying a second precursor comprising metal and halogen atoms to the seed layer; and, supplying a second reactant to the seed layer.

公开(公告)号：US20190067016A1

公开(公告)日：2019-02-28

申请号：US15691241

申请日：2017-08-30

Applicant: ASM IP Holding B.V.

Inventor： Chiyu Zhu ,  Kiran Shrestha ,  Qi Xie

IPC: H01L21/285 ,  C23C16/455

Abstract: There is provided a method of forming a layer, comprising depositing a seed layer on the substrate and depositing a bulk layer on the seed layer. Depositing the seed layer comprises supplying a first precursor comprising metal and halogen atoms to the substrate; and supplying a first reactant to the substrate. Depositing the bulk layer comprises supplying a second precursor comprising metal and halogen atoms to the seed layer and supplying a second reactant to the seed layer.

公开(公告)号：US10141189B2

公开(公告)日：2018-11-27

申请号：US15394571

申请日：2016-12-29

Applicant: ASM IP Holding B.V.

Inventor： Harald Profijt ,  Qi Xie ,  Jan Willem Maes ,  David Kohen

IPC: H01L21/225 ,  H01L29/66 ,  H01L29/161 ,  H01L29/10 ,  H01L29/06 ,  H01L21/223 ,  H01L21/768 ,  H01L21/385

Abstract: In some embodiments, a compound semiconductor is formed by diffusion of semiconductor species from a source semiconductor layer into semiconductor material in a substrate. The source semiconductor layer may be an amorphous or polycrystalline structure, and provides a source of semiconductor species for later diffusion into the other semiconductor material. Advantageously, such a semiconductor layer may be more conformal than an epitaxially grown, crystalline semiconductor layer. As a result, this more conformal semiconductor layer acts as a uniform source of the semiconductor species for diffusion into the semiconductor material in the substrate. In some embodiments, an interlayer is formed between the source semiconductor layer and the substrate, and then the interlayer is trimmed before depositing the source semiconductor layer. In some other embodiments, the source semiconductor layer is deposited directly on the substrate, and has an amorphous or polycrystalline structure.

公开(公告)号：US10041166B2

公开(公告)日：2018-08-07

申请号：US15795768

申请日：2017-10-27

Applicant: ASM IP Holding B.V.

Inventor： Delphine Longrie ,  Antti Juhani Niskanen ,  Han Wang ,  Qi Xie ,  Jan Willem Maes ,  Shang Chen ,  Toshiharu Watarai ,  Takahiro Onuma ,  Dai Ishikawa ,  Kunitoshi Namba

IPC: C23C16/02 ,  C23C16/455 ,  H01L21/285 ,  H01L21/768

CPC classification number: C23C16/02 ,  C23C16/06 ,  C23C16/345 ,  C23C16/4404 ,  C23C16/4405 ,  C23C16/45525 ,  C23C16/45536 ,  C23C16/56 ,  H01L21/28562 ,  H01L21/76826 ,  H01L21/76849 ,  H01L21/7685 ,  H01L21/76883

Abstract: Metallic layers can be selectively deposited on one surface of a substrate relative to a second surface of the substrate. In some embodiments, the metallic layers are selectively deposited on a first metallic surface relative to a second surface comprising silicon. In some embodiments the reaction chamber in which the selective deposition occurs may optionally be passivated prior to carrying out the selective deposition process. In some embodiments selectivity of above about 50% or even about 90% is achieved.

公开(公告)号：US10032628B2

公开(公告)日：2018-07-24

申请号：US15144481

申请日：2016-05-02

Applicant: ASM IP Holding B.V.

Inventor： Qi Xie ,  David de Roest ,  Jacob Woodruff ,  Michael Eugene Givens ,  Jan Willem Maes ,  Timothee Blanquart

IPC: H01L21/02 ,  H01L21/265 ,  H01L29/36 ,  H01L29/417

CPC classification number: H01L21/0262 ,  H01L21/02532 ,  H01L21/02658 ,  H01L21/02694 ,  H01L21/2254 ,  H01L21/26506 ,  H01L29/0847 ,  H01L29/36 ,  H01L29/41725

Abstract: A method for improving source/drain performance through conformal solid state doping and its resulting device are disclosed. Specifically, the doping takes place through an atomic layer deposition of a dopant layer. Embodiments of the invention may allow for an increased doping layer, improved conformality, and reduced defect formation, in comparison to alternate doping methods, such as ion implantation or epitaxial doping.

公开(公告)号：US09721786B2

公开(公告)日：2017-08-01

申请号：US14992942

申请日：2016-01-11

Applicant: ASM IP Holding B.V.

Inventor： Suvi P. Haukka ,  Fu Tang ,  Michael E. Givens ,  Jan Willem Maes ,  Qi Xie

IPC: H01L21/31 ,  H01L21/02 ,  H01L29/267 ,  H01L29/778 ,  H01L21/28 ,  H01L29/22 ,  H01L29/78 ,  H01L29/66

CPC classification number: H01L21/02175 ,  H01L21/02192 ,  H01L21/02194 ,  H01L21/0228 ,  H01L21/02334 ,  H01L21/0237 ,  H01L21/02395 ,  H01L21/02557 ,  H01L21/02568 ,  H01L21/0262 ,  H01L21/02661 ,  H01L21/28264 ,  H01L29/2203 ,  H01L29/267 ,  H01L29/66795 ,  H01L29/7786 ,  H01L29/78

Abstract: In some aspects, methods of forming a metal sulfide thin film are provided. According to some methods, a metal sulfide thin film is deposited on a substrate in a reaction space in a cyclical process where at least one cycle includes alternately and sequentially contacting the substrate with a first vapor-phase metal reactant and a second vapor-phase sulfur reactant. In some aspects, methods of forming a three-dimensional architecture on a substrate surface are provided. In some embodiments, the method includes forming a metal sulfide thin film on the substrate surface and forming a capping layer over the metal sulfide thin film. The substrate surface may comprise a high-mobility channel.

公开(公告)号：US09711350B2

公开(公告)日：2017-07-18

申请号：US14729510

申请日：2015-06-03

Applicant: ASM IP Holding B.V.

Inventor： Qi Xie ,  Fu Tang ,  Michael Givens ,  Petri Raisanen ,  Jan Willem Maes

IPC: H01L21/31 ,  H01L21/469 ,  H01L21/02 ,  H01L29/16 ,  H01L29/20 ,  H01L29/10 ,  H01L21/28 ,  H01L29/51

CPC classification number: H01L21/02247 ,  H01L21/02112 ,  H01L21/02205 ,  H01L21/02249 ,  H01L21/02255 ,  H01L21/0228 ,  H01L21/02301 ,  H01L21/2807 ,  H01L29/1033 ,  H01L29/16 ,  H01L29/20 ,  H01L29/518

Abstract: In some embodiments, a semiconductor surface having a high mobility semiconductor may be effectively passivated by nitridation, preferably using hydrazine, a hydrazine derivative, or a combination thereof. The surface may be the semiconductor surface of a transistor channel region. In some embodiments, a semiconductor surface oxide layer is formed at the semiconductor surface and the passivation is accomplished by forming a semiconductor oxynitride layer at the surface, with the nitridation contributing nitrogen to the surface oxide to form the oxynitride layer. The semiconductor oxide layer may be deposited by atomic layer deposition (ALD) and the nitridation may also be conducted as part of the ALD.