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    Threading-dislocation-free nanoheteroepitaxy of Ge on Si using self-directed touch-down of Ge through a thin SiO2 layer
    123.
    发明授权
    Threading-dislocation-free nanoheteroepitaxy of Ge on Si using self-directed touch-down of Ge through a thin SiO2 layer 有权
    使用Ge通过薄SiO 2层的自我定向触摸，Si上的Ge的穿线无位错纳米外延

    公开(公告)号：US07888244B2

    公开(公告)日：2011-02-15

    申请号：US12420389

    申请日：2009-04-08

    Applicant: Sang M. Han ,  Qiming Li

    Inventor： Sang M. Han ,  Qiming Li

    IPC: H01L21/36

    CPC classification number: H01L21/0245 ,  H01L21/02381 ,  H01L21/02521 ,  H01L21/02532 ,  H01L21/02642 ,  H01L21/02647

    Abstract: A method of forming a virtually defect free lattice mismatched nanoheteroepitaxial layer is disclosed. The method includes forming an interface layer on a portion of a substrate. A plurality of seed pads are then formed by self-directed touchdown by exposing the interface layer to a material comprising a semiconductor material. The plurality of seed pads, having an average width of about 1 nm to 10 nm, are interspersed within the interface layer and contact the substrate. An epitaxial layer is then formed by lateral growth of the seed pads over the interface layer.

    Abstract translation: 公开了形成几乎无缺陷的晶格失配的纳米外延层的方法。 该方法包括在衬底的一部分上形成界面层。 然后通过将界面层暴露于包含半导体材料的材料，通过自我定向的触地来形成多个种子垫。 具有约1nm至10nm的平均宽度的多个种子垫分散在界面层内并与基底接触。 然后通过界面层上的种子垫的横向生长形成外延层。

    Fabrication of enclosed nanochannels using silica nanoparticles
    124.
    发明授权
    Fabrication of enclosed nanochannels using silica nanoparticles 有权
    使用二氧化硅纳米粒子制造封闭的纳米通道

    公开(公告)号：US07825037B2

    公开(公告)日：2010-11-02

    申请号：US11549732

    申请日：2006-10-16

    Applicant: Steven R. J. Brueck ,  Deying Xia

    Inventor： Steven R. J. Brueck ,  Deying Xia

    IPC: H01L21/31 ,  H01L21/469

    CPC classification number: B81C1/00071 ,  B82Y30/00 ,  Y10S977/78 ,  Y10S977/84 ,  Y10T137/0324 ,  Y10T137/3006 ,  Y10T137/8593

    Abstract: In accordance with the invention, there is a method of forming a nanochannel including depositing a photosensitive film stack over a substrate and forming a pattern on the film stack using interferometric lithography. The method can further include depositing a plurality of silica nanoparticles to form a structure over the pattern and removing the pattern while retaining the structure formed by the plurality of silica nanoparticles, wherein the structure comprises an enclosed nanochannel.

    Abstract translation: 根据本发明，存在一种形成纳米通道的方法，其包括在衬底上沉积感光膜堆叠并且使用干涉光刻在膜堆上形成图案。 该方法可以进一步包括沉积多个二氧化硅纳米颗粒以在图案上形成结构并除去图案，同时保留由多个二氧化硅纳米颗粒形成的结构，其中该结构包括封闭的纳米通道。

    Densely stacked and strain-compensated quantum dot active regions
    125.
    发明授权
    Densely stacked and strain-compensated quantum dot active regions 有权
    密集叠层和应变补偿量子点有源区

    公开(公告)号：US07795609B2

    公开(公告)日：2010-09-14

    申请号：US11462777

    申请日：2006-08-07

    Applicant: Diana L. Huffaker ,  Noppadon Nuntawong

    Inventor： Diana L. Huffaker ,  Noppadon Nuntawong

    IPC: H01L29/66

    CPC classification number: H01S5/34 ,  B82Y20/00

    Abstract: Embodiments provide a quantum dot active structure and a methodology for its fabrication. The quantum dot active structure includes a substrate, a plurality of alternating regions of a quantum dot active region and a strain-compensation region, and a cap layer. The strain-compensation region is formed to eliminate the compressive strain of an adjacent quantum dot active region, thus allowing quantum dot active regions to be densely-stacked. The densely-stacked quantum dot active region provides increased optical modal gain for semiconductor light emitting devices such as edge emitting lasers, vertical cavity lasers, detectors, micro-cavity emitters, optical amplifiers or modulators.

    Abstract translation: 实施例提供量子点有源结构及其制造方法。 量子点有源结构包括基板，量子点有源区域和应变补偿区域的多个交替区域和盖层。 形成应变补偿区域以消除相邻量子点有源区域的压缩应变，从而允许量子点有源区域被密集堆叠。 密集堆叠的量子点有源区域为诸如边缘发射激光器，垂直腔激光器，检测器，微腔发射器，光放大器或调制器的半导体发光器件提供增加的光学模态增益。

    Hollow sphere metal oxides
    126.
    发明授权
    Hollow sphere metal oxides 有权
    中空球体金属氧化物

    公开(公告)号：US07744673B2

    公开(公告)日：2010-06-29

    申请号：US11876338

    申请日：2007-10-22

    Applicant: Xingmao Jiang ,  Charles Jeffrey Brinker

    Inventor： Xingmao Jiang ,  Charles Jeffrey Brinker

    IPC: B22F9/24

    CPC classification number: B01J13/0095 ,  B01J13/02 ,  B22F3/1112 ,  B22F2001/0029 ,  B22F2998/00 ,  B22F2999/00 ,  B22F1/0018 ,  B22F9/22 ,  B22F2201/013

    Abstract: In accordance with invention, there are methods for fabricating hollow spheres and nanofoams. The method for making hollow spheres can include providing a homogeneous precursor solution including a first solvent and one or more anhydrous precursor species and forming aerosol droplets having a first size distribution using the homogeneous precursor solution in an anhydrous carrier gas. The method can also include transporting the aerosol droplets through an aerosol reactor including a reactant to form a plurality of hollow spheres, wherein each of the plurality of hollow spheres can be formed by one or more chemical reactions occurring at a surface of the aerosol droplet. The method can further include controlling size and thickness of the hollow spheres by one or more of the precursor solution concentration, aerosol droplet size, temperature, residence time of the aerosol droplets in the aerosol reactor, and the reactant distribution in the aerosol reactor.

    Abstract translation: 根据本发明，存在制造中空球体和纳米烟雾的方法。 制备中空球体的方法可以包括提供包含第一溶剂和一种或多种无水前体物质的均匀前体溶液，并使用均匀的前体溶液在无水载气中形成具有第一尺寸分布的气雾剂液滴。 该方法还可以包括通过包括反应物的气溶胶反应器运送气溶胶液滴以形成多个中空球体，其中多个中空球体中的每一个可以通过在气溶胶液滴的表面处发生的一个或多个化学反应形成。 该方法还可以包括通过前体溶液浓度，气溶胶液滴尺寸，温度，气溶胶微滴在气溶胶反应器中的停留时间以及气溶胶反应器中的反应物分布中的一种或多种来控制中空球的尺寸和厚度。

    Hybrid integration based on wafer-bonding of devices to AlSb monolithically grown on Si
    127.
    发明授权
    Hybrid integration based on wafer-bonding of devices to AlSb monolithically grown on Si 有权
    基于硅片上单晶硅生长的AlSb器件的晶圆结合的混合集成

    公开(公告)号：US07700395B2

    公开(公告)日：2010-04-20

    申请号：US11622306

    申请日：2007-01-11

    Applicant: Diana L. Huffaker ,  Larry R. Dawson ,  Ganesh Balakrishnan

    Inventor： Diana L. Huffaker ,  Larry R. Dawson ,  Ganesh Balakrishnan

    IPC: H01L21/00

    CPC classification number: H01L21/187 ,  H01S5/0215 ,  H01S5/028 ,  H01S5/183

    Abstract: Exemplary embodiments provide a semiconductor fabrication method including a combination of monolithic integration techniques with wafer bonding techniques. The resulting semiconductor devices can be used in a wide variety of opto-electronic and/or electronic applications such as lasers, light emitting diodes (LEDs), phototvoltaics, photodetectors and transistors. In an exemplary embodiment, the semiconductor device can be formed by first forming an active-device structure including an active-device section disposed on a thinned III-V substrate. The active-device section can include OP and/or EP VCSEL devices. A high-quality monolithic integration structure can then be formed with low defect density through an interfacial misfit dislocation. In the high-quality monolithic integration structure, a thinned III-V mating layer can be formed over a silicon substrate. The thinned III-V substrate of the active-device structure can subsequently be wafer-bonded onto the thinned III-V mating layer of the high-quality monolithic integration structure forming an optoelectronic semiconductor device on silicon.

    Abstract translation: 示例性实施例提供了包括单片集成技术与晶片接合技术的组合的半导体制造方法。 所得到的半导体器件可以用于各种光电子和/或电子应用中，例如激光器，发光二极管（LED），光伏电池，光电检测器和晶体管。 在示例性实施例中，半导体器件可以通过首先形成有源器件结构来形成，该有源器件结构包括设置在薄化III-V衬底上的有源器件部分。 有源器件部分可以包括OP和/或EP VCSEL器件。 然后可以通过界面失配位错形成具有低缺陷密度的高质量单片整合结构。 在高质量的单块集成结构中，可以在硅衬底上形成薄的III-V配合层。 有源器件结构的薄化III-V衬底可以随后被晶片结合到在硅上形成光电半导体器件的高质量单片集成结构的薄化III-V配合层上。

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