公开(公告)号：US20160308068A1

公开(公告)日：2016-10-20

申请号：US15198119

申请日：2016-06-30

Applicant: Semiconductor Energy Laboratory Co., Ltd.

Inventor： Masahiro TAKAHASHI ,  Kengo AKIMOTO ,  Shunpei YAMAZAKI

IPC: H01L29/786 ,  H01L29/04 ,  H01L21/02 ,  G02F1/1362 ,  H01L27/12 ,  C01G15/00 ,  G02F1/1368 ,  G02F1/1343 ,  H01L29/24 ,  H01L29/66

CPC classification number: H01L29/7869 ,  C01G15/006 ,  C01P2006/40 ,  G02F1/134309 ,  G02F1/136213 ,  G02F1/1368 ,  G02F2201/123 ,  H01L21/02565 ,  H01L21/02609 ,  H01L27/1225 ,  H01L27/1285 ,  H01L27/3262 ,  H01L29/045 ,  H01L29/24 ,  H01L29/66969 ,  H01L29/78696

Abstract: To provide an oxide semiconductor film having stable electric conductivity and a highly reliable semiconductor device having stable electric characteristics by using the oxide semiconductor film. The oxide semiconductor film contains indium (In), gallium (Ga), and zinc (Zn) and includes a c-axis-aligned crystalline region aligned in the direction parallel to a normal vector of a surface where the oxide semiconductor film is formed. Further, the composition of the c-axis-aligned crystalline region is represented by In1+δGa1−δO3(ZnO)m (0

Abstract translation: 为了提供具有稳定的导电性的氧化物半导体膜和通过使用氧化物半导体膜具有稳定的电特性的高度可靠的半导体器件。 氧化物半导体膜含有铟（In），镓（Ga）和锌（Zn），并且包括在与形成氧化物半导体膜的表面的法线向平行的方向上排列的c轴取向的结晶区。 此外，c轴取向的结晶区域的组成由In1 +δGa1-δO3（ZnO）m（满足0 <δ<1且m = 1〜3）表示，氧化物半导体膜的整体的组成 包括c轴对准的结晶区域由In x Ga y O 3（ZnO）m（0

公开(公告)号：US20160254257A1

公开(公告)日：2016-09-01

申请号：US15150744

申请日：2016-05-10

Applicant: Semiconductor Energy Laboratory Co., Ltd.

Inventor： Shunpei YAMAZAKI ,  Kengo AKIMOTO ,  Shigeki KOMORI ,  Hideki UOCHI ,  Tomoya FUTAMURA ,  Takahiro KASAHARA

IPC: H01L27/02 ,  H01L29/786 ,  G02F1/1343 ,  G02F1/1368 ,  G02F1/1339 ,  G02F1/1333 ,  H01L27/12 ,  H01L29/24

CPC classification number: H01L27/0266 ,  G02F1/133305 ,  G02F1/1339 ,  G02F1/13394 ,  G02F1/134309 ,  G02F1/13624 ,  G02F1/1368 ,  H01L27/1225 ,  H01L27/124 ,  H01L27/1255 ,  H01L29/247 ,  H01L29/7869 ,  H01L29/78693 ,  H01L29/78696

Abstract: A protective circuit includes a non-linear element, which further includes a gate electrode, a gate insulating layer covering the gate electrode, a pair of first and second wiring layers whose end portions overlap with the gate electrode over the gate insulating layer and in which a conductive layer and a second oxide semiconductor layer are stacked, and a first oxide semiconductor layer which overlaps with at least the gate electrode and which is in contact with side face portions of the gate insulating layer and the conductive layer of the first wiring layer and the second wiring layer and a side face portion and a top face portion of the second oxide semiconductor layer. Over the gate insulating layer, oxide semiconductor layers with different properties are bonded to each other, whereby stable operation can be performed as compared with Schottky junction. Thus, the junction leakage can be decreased and the characteristics of the non-linear element can be improved.

Abstract translation: 保护电路包括非线性元件，其还包括栅电极，覆盖栅电极的栅极绝缘层，一对第一和第二布线层，其端部与栅极绝缘层上的栅极重叠，并且其中 堆叠导电层和第二氧化物半导体层，以及与至少栅电极重叠并与栅极绝缘层和第一布线层的导电层的侧面部分接触的第一氧化物半导体层和 第二布线层和第二氧化物半导体层的侧面部分和顶面部分。 在栅极绝缘层上，具有不同性质的氧化物半导体层彼此结合，由此可以进行与肖特基结的稳定操作。 因此，可以降低结漏电，提高非线性元件的特性。

公开(公告)号：US20160218226A1

公开(公告)日：2016-07-28

申请号：US15090937

申请日：2016-04-05

Applicant: Semiconductor Energy Laboratory Co., Ltd.

Inventor： Shunpei YAMAZAKI ,  Masayuki SAKAKURA ,  Ryosuke WATANABE ,  Junichiro SAKATA ,  Kengo AKIMOTO ,  Akiharu MIYANAGA ,  Takuya HIROHASHI ,  Hideyuki KISHIDA

IPC: H01L29/786 ,  H01L29/04 ,  H01L29/24

CPC classification number: H01L29/78696 ,  H01L21/2636 ,  H01L27/1225 ,  H01L29/04 ,  H01L29/045 ,  H01L29/12 ,  H01L29/24 ,  H01L29/41733 ,  H01L29/66969 ,  H01L29/7869

Abstract: It is an object to provide a highly reliable semiconductor device with good electrical characteristics and a display device including the semiconductor device as a switching element. In a transistor including an oxide semiconductor layer, a needle crystal group provided on at least one surface side of the oxide semiconductor layer grows in a c-axis direction perpendicular to the surface and includes an a-b plane parallel to the surface, and a portion except for the needle crystal group is an amorphous region or a region in which amorphousness and microcrystals are mixed. Accordingly, a highly reliable semiconductor device with good electrical characteristics can be formed.

公开(公告)号：US20160111282A1

公开(公告)日：2016-04-21

申请号：US14972964

申请日：2015-12-17

Applicant: Semiconductor Energy Laboratory Co., Ltd.

Inventor： Kengo AKIMOTO ,  Junichiro SAKATA ,  Takuya HIROHASHI ,  Masahiro TAKAHASHI ,  Hideyuki KISHIDA ,  Akiharu MIYANAGA

IPC: H01L21/02 ,  H01L21/28 ,  H01L29/66

CPC classification number: H01L29/7869 ,  H01L21/02565 ,  H01L21/28079 ,  H01L21/28158 ,  H01L29/04 ,  H01L29/66742 ,  H01L29/66969 ,  H01L29/78693

Abstract: It is an object to provide an oxide semiconductor which is suitable for use in a semiconductor device. Alternatively, it is another object to provide a semiconductor device using the oxide semiconductor. Provided is a semiconductor device including an In—Ga—Zn—O based oxide semiconductor layer in a channel formation region of a transistor. In the semiconductor device, the In—Ga—Zn—O based oxide semiconductor layer has a structure in which crystal grains represented by InGaO3(ZnO)m (m=1) are included in an amorphous structure represented by InGaO3(ZnO)m (m>0).

公开(公告)号：US20150325704A1

公开(公告)日：2015-11-12

申请号：US14803483

申请日：2015-07-20

Applicant: Semiconductor Energy Laboratory Co., Ltd.

Inventor： Shunpei YAMAZAKI ,  Yusuke NONAKA ,  Takayuki INOUE ,  Masashi TSUBUKU ,  Kengo AKIMOTO ,  Akiharu MIYANAGA

IPC: H01L29/786 ,  H01L29/04

CPC classification number: H01L29/78606 ,  H01L23/552 ,  H01L23/564 ,  H01L29/04 ,  H01L29/66969 ,  H01L29/7869 ,  H01L29/78696 ,  H01L2924/0002 ,  H01L2924/00

Abstract: An object is to manufacture a semiconductor device including an oxide semiconductor film, which has stable electric characteristics and high reliability. A crystalline oxide semiconductor film is formed, without performing a plurality of steps, as follows: by utilizing a difference in atomic weight of plural kinds of atoms included in an oxide semiconductor target, zinc with low atomic weight is preferentially deposited on an oxide insulating film to form a seed crystal including zinc; and tin, indium, or the like with high atomic weight is deposited on the seed crystal while causing crystal growth. Further, a crystalline oxide semiconductor film is formed by causing crystal growth using a seed crystal with a hexagonal crystal structure including zinc as a nucleus, whereby a single crystal oxide semiconductor film or a substantially single crystal oxide semiconductor film is formed.

Abstract translation: 本发明的目的是制造具有稳定的电特性和高可靠性的氧化物半导体膜的半导体装置。 通过利用包含在氧化物半导体靶中的多种原子的原子量的差异，形成结晶氧化物半导体膜，而不进行多个步骤，优选将低原子量的锌沉积在氧化物绝缘膜上 形成包含锌的晶种; 并且具有高原子量的锡，铟等沉积在晶种上同时引起晶体生长。 此外，通过使用具有包含锌作为核的六方晶系结构的晶种进行晶体生长来形成结晶氧化物半导体膜，从而形成单晶氧化物半导体膜或大致单晶氧化物半导体膜。

公开(公告)号：US20150303280A1

公开(公告)日：2015-10-22

申请号：US14790609

申请日：2015-07-02

Applicant: Semiconductor Energy Laboratory Co., Ltd.

Inventor： Shunpei YAMAZAKI ,  Kengo AKIMOTO

IPC: H01L29/66 ,  H01L29/417 ,  H01L29/49 ,  H01L29/26

CPC classification number: H01L29/7869 ,  G02F1/13306 ,  G02F1/136286 ,  G02F1/1368 ,  G09G3/3648 ,  G09G2300/0426 ,  G09G2300/0857 ,  G09G2310/08 ,  H01L27/1225 ,  H01L27/1285 ,  H01L29/24 ,  H01L29/26 ,  H01L29/41775 ,  H01L29/4908 ,  H01L29/66742 ,  H01L29/66969 ,  H01L29/78606 ,  H01L29/78618 ,  H01L29/78636 ,  H01L29/78693 ,  H01L29/78696

Abstract: A thin film transistor structure in which a source electrode and a drain electrode formed from a metal material are in direct contact with an oxide semiconductor film may lead to high contact resistance. One cause of high contact resistance is that a Schottky junction is formed at a contact plane between the source and drain electrodes and the oxide semiconductor film. An oxygen-deficient oxide semiconductor layer which includes crystal grains with a size of 1 nm to 10 nm and has a higher carrier concentration than the oxide semiconductor film serving as a channel formation region is provided between the oxide semiconductor film and the source and drain electrodes.

Abstract translation: 其中由金属材料形成的源电极和漏电极与氧化物半导体膜直接接触的薄膜晶体管结构可能导致高接触电阻。 高接触电阻的一个原因是在源电极和漏电极和氧化物半导体膜之间的接触平面处形成肖特基结。 在氧化物半导体膜与源电极和漏电极之间，设置氧含量不足的氧化物半导体层，其含有尺寸为1nm〜10nm，比作为沟道形成区域的氧化物半导体膜高的载流子浓度的晶粒 。

公开(公告)号：US20150221778A1

公开(公告)日：2015-08-06

申请号：US14677262

申请日：2015-04-02

Applicant: Semiconductor Energy Laboratory Co., Ltd.

Inventor： Hidekazu MIYAIRI ,  Takeshi OSADA ,  Kengo AKIMOTO ,  Shunpei YAMAZAKI

IPC: H01L29/786

CPC classification number: H01L29/78648 ,  H01L27/1225 ,  H01L27/124 ,  H01L29/42384 ,  H01L29/78645 ,  H01L29/7869 ,  H01L29/78696

Abstract: As a display device has a higher definition, the number of pixels, gate lines, and signal lines are increased. When the number of the gate lines and the signal lines are increased, there occurs a problem that it is difficult to mount an IC chip including a driver circuit for driving the gate and signal lines by bonding or the like, whereby manufacturing cost is increased. A pixel portion and a driver circuit for driving the pixel portion are provided over the same substrate, and at least part of the driver circuit includes a thin film transistor using an oxide semiconductor interposed between gate electrodes provided above and below the oxide semiconductor. The pixel portion and the driver portion are provided over the same substrate, whereby manufacturing cost can be reduced.

Abstract translation: 作为显示装置具有更高的清晰度，像素数，栅极线和信号线的数量增加。 当栅极线和信号线的数量增加时，存在难以安装包括用于通过接合等驱动栅极和信号线的驱动电路的IC芯片，由此增加制造成本的问题。 用于驱动像素部分的像素部分和驱动电路设置在相同的基板上，驱动电路的至少一部分包括薄膜晶体管，该薄膜晶体管使用介于氧化物半导体上方和下方的栅电极之间的氧化物半导体。 像素部分和驱动器部分设置在相同的基板上，由此可以降低制造成本。

公开(公告)号：US20150179676A1

公开(公告)日：2015-06-25

申请号：US14640393

申请日：2015-03-06

Applicant: Semiconductor Energy Laboratory Co., Ltd.

Inventor： Shunpei YAMAZAKI ,  Kengo AKIMOTO ,  Atsushi UMEZAKI

IPC: H01L27/12 ,  H01L29/786 ,  G02F1/1362 ,  H01L27/32

CPC classification number: H01L27/1225 ,  G02F1/13624 ,  H01L27/124 ,  H01L27/3276 ,  H01L29/7869

Abstract: With an increase in the definition of a display device, the number of pixels is increased, and thus the numbers of gate lines and signal lines are increased. Due to the increase in the numbers of gate lines and signal lines, it is difficult to mount an IC chip having a driver circuit for driving the gate and signal lines by bonding or the like, which causes an increase in manufacturing costs. A pixel portion and a driver circuit for driving the pixel portion are formed over one substrate. At least a part of the driver circuit is formed using an inverted staggered thin film transistor in which an oxide semiconductor is used. The driver circuit as well as the pixel portion is provided over the same substrate, whereby manufacturing costs are reduced.

Abstract translation: 随着显示装置的定义的增加，像素的数量增加，因此栅极线和信号线的数量增加。 由于栅极线和信号线的数量增加，难以安装具有用于通过接合等驱动栅极和信号线的驱动电路的IC芯片，这导致制造成本的增加。 用于驱动像素部分的像素部分和驱动电路形成在一个衬底上。 使用其中使用氧化物半导体的反交错薄膜晶体管形成驱动电路的至少一部分。 驱动电路以及像素部分设置在相同的基板上，由此降低了制造成本。

公开(公告)号：US20150179675A1

公开(公告)日：2015-06-25

申请号：US14639149

申请日：2015-03-05

Applicant: Semiconductor Energy Laboratory Co., Ltd.

Inventor： Shunpei YAMAZAKI ,  Junichiro SAKATA ,  Masashi TSUBUKU ,  Kengo AKIMOTO ,  Miyuki HOSOBA ,  Masayuki SAKAKURA ,  Yoshiaki OIKAWA

IPC: H01L27/12 ,  G02F1/1368 ,  G02F1/1333 ,  H01L29/786

CPC classification number: H01L21/477 ,  G02F1/133345 ,  G02F1/1368 ,  H01L21/02565 ,  H01L21/02664 ,  H01L27/1225 ,  H01L27/1248 ,  H01L27/1251 ,  H01L27/1259 ,  H01L29/66969 ,  H01L29/7869 ,  H01L29/78696

Abstract: An object is to provide a display device with excellent display characteristics, where a pixel circuit and a driver circuit provided over one substrate are formed using transistors which have different structures corresponding to characteristics of the respective circuits. The driver circuit portion includes a driver circuit transistor in which a gate electrode layer, a source electrode layer, and a drain electrode layer are formed using a metal film, and a channel layer is formed using an oxide semiconductor. The pixel portion includes a pixel transistor in which a gate electrode layer, a source electrode layer, and a drain electrode layer are formed using an oxide conductor, and a semiconductor layer is formed using an oxide semiconductor. The pixel transistor is formed using a light-transmitting material, and thus, a display device with higher aperture ratio can be manufactured.

公开(公告)号：US20150076497A1

公开(公告)日：2015-03-19

申请号：US14540167

申请日：2014-11-13

Applicant: Semiconductor Energy Laboratory Co., Ltd.

Inventor： Shunpei YAMAZAKI ,  Kengo AKIMOTO

IPC: H01L29/786 ,  H01L29/45

CPC classification number: H01L29/7869 ,  H01L27/1225 ,  H01L29/45 ,  H01L29/66742

Abstract: A semiconductor device includes an oxide semiconductor layer including a channel formation region which includes an oxide semiconductor having a wide band gap and a carrier concentration which is as low as possible, and a source electrode and a drain electrode which include an oxide conductor containing hydrogen and oxygen vacancy, and a barrier layer which prevents diffusion of hydrogen and oxygen between an oxide conductive layer and the oxide semiconductor layer. The oxide conductive layer and the oxide semiconductor layer are electrically connected to each other through the barrier layer.

Abstract translation: 半导体器件包括氧化物半导体层，其包括沟道形成区域，该沟道形成区域包括具有宽带隙的氧化物半导体和尽可能低的载流子浓度，以及源极和漏极，其包括含有氢的氧化物导体和 氧空位和防止氧和氧在氧化物导电层和氧化物半导体层之间的扩散的阻挡层。 氧化物导电层和氧化物半导体层通过阻挡层彼此电连接。