公开(公告)号：US20110186949A1

公开(公告)日：2011-08-04

申请号：US13084996

申请日：2011-04-12

申请人： Shunpei YAMAZAKI ,  Jun KOYAMA ,  Kiyoshi KATO ,  Takaaki KOEN ,  Yuto YAKUBO ,  Makoto YANAGISAWA ,  Hisashi OHTANI ,  Eiji SUGIYAMA ,  Nozomi HORIKOSHI

发明人： Shunpei YAMAZAKI ,  Jun KOYAMA ,  Kiyoshi KATO ,  Takaaki KOEN ,  Yuto YAKUBO ,  Makoto YANAGISAWA ,  Hisashi OHTANI ,  Eiji SUGIYAMA ,  Nozomi HORIKOSHI

IPC分类号： H01L29/66

CPC分类号： G06K19/07735 ,  G06K19/07722 ,  G06K19/07794 ,  H01L23/295 ,  H01L23/3157 ,  H01L2924/0002 ,  H01L2924/09701 ,  H01L2924/12044 ,  H01L2924/19041 ,  H01L2924/3011 ,  H01L2924/3025 ,  H01L2924/00

摘要： A semiconductor device capable of wireless communication, which has high reliability in terms of resistance to external force, in particular, pressing force and can prevent electrostatic discharge in an integrated circuit without preventing reception of an electric wave. The semiconductor device includes an on-chip antenna connected to the integrated circuit and a booster antenna which transmits a signal or power included in a received electric wave to the on-chip antenna without contact. In the semiconductor device, the integrated circuit and the on-chip antenna are interposed between a pair of structure bodies formed by impregnating a fiber body with a resin. One of the structure bodies is provided between the on-chip antenna and the booster antenna. A conductive film having a surface resistance value of approximately 106 to 1014 Ω/cm2 is formed on at least one surface of each structure body.

摘要翻译： 一种能够进行无线通信的半导体装置，其在外力方面具有高的可靠性，特别是按压力，并且能够防止集成电路中的静电放电，而不会妨碍电波的接收。 半导体器件包括连接到集成电路的片上天线和将接收到的电波中包含的信号或功率发送到片上天线而不接触的增强天线。 在半导体器件中，集成电路和片上天线插入通过用树脂浸渍纤维体而形成的一对结构体之间。 其中一个结构体设置在片上天线和增强天线之间。 在每个结构体的至少一个表面上形成表面电阻值为大约106至1014Ω·cm 2 / cm 2的导电膜。

公开(公告)号：US20110109351A1

公开(公告)日：2011-05-12

申请号：US12938533

申请日：2010-11-03

申请人： Shunpei YAMAZAKI ,  Jun KOYAMA ,  Hiroyuki MIYAKE

发明人： Shunpei YAMAZAKI ,  Jun KOYAMA ,  Hiroyuki MIYAKE

IPC分类号： H03K3/00 ,  H01L29/786 ,  H01L21/44

CPC分类号： H01L27/1225 ,  H01L21/02603 ,  H01L27/0883 ,  H01L27/1251 ,  H01L27/127 ,  H01L27/1288 ,  H01L29/045 ,  H01L29/24 ,  H01L29/7869 ,  H01L29/78693 ,  H01L29/78696

摘要： An oxide semiconductor layer which is intrinsic or substantially intrinsic and includes a crystalline region in a surface portion of the oxide semiconductor layer is used for the transistors. An intrinsic or substantially intrinsic semiconductor from which an impurity which is to be an electron donor (donor) is removed from an oxide semiconductor and which has a larger energy gap than a silicon semiconductor is used. Electrical characteristics of the transistors can be controlled by controlling the potential of a pair of conductive films which are provided on opposite sides from each other with respect to the oxide semiconductor layer, each with an insulating film arranged therebetween, so that the position of a channel formed in the oxide semiconductor layer is determined.

摘要翻译： 晶体管使用本征或基本上固有的并且包括氧化物半导体层的表面部分中的结晶区域的氧化物半导体层。 使用从氧化物半导体去除作为电子给体（供体）的杂质并且具有比硅半导体更大的能隙的本征或本质上的本征半导体。 可以通过控制一对导电膜的电位来控制晶体管的电特性，所述一对导电膜相对于氧化物半导体层彼此相对设置，每个具有布置在其间的绝缘膜，使得沟道的位置 确定在氧化物半导体层中形成的氧化物半导体层。

公开(公告)号：US20110108837A1

公开(公告)日：2011-05-12

申请号：US12938402

申请日：2010-11-03

申请人： Shunpei YAMAZAKI ,  Jun KOYAMA ,  Hiroyuki MIYAKE

发明人： Shunpei YAMAZAKI ,  Jun KOYAMA ,  Hiroyuki MIYAKE

IPC分类号： H01L29/786 ,  H01L21/44

CPC分类号： H01L27/1229 ,  G09G3/20 ,  G09G2310/0267 ,  G09G2310/0275 ,  G09G2310/0286 ,  G11C19/28 ,  H01L27/1225 ,  H01L27/1251 ,  H01L27/3262 ,  H01L29/045 ,  H01L29/1033 ,  H01L29/24 ,  H01L29/247 ,  H01L29/41733 ,  H01L29/42372 ,  H01L29/45 ,  H01L29/78648 ,  H01L29/7869 ,  H01L29/78693

摘要： An object of an embodiment of the present invention is to manufacture a semiconductor device with high display quality and high reliability, which includes a pixel portion and a driver circuit portion capable of high-speed operation over one substrate, using transistors having favorable electric characteristics and high reliability as switching elements. Two kinds of transistors, in each of which an oxide semiconductor layer including a crystalline region on one surface side is used as an active layer, are formed in a driver circuit portion and a pixel portion. Electric characteristics of the transistors can be selected by choosing the position of the gate electrode layer which determines the position of the channel. Thus, a semiconductor device including a driver circuit portion capable of high-speed operation and a pixel portion over one substrate can be manufactured.

摘要翻译： 本发明的实施例的目的是制造具有高显示质量和高可靠性的半导体器件，其包括能够使用具有良好电特性的晶体管在一个衬底上进行高速操作的像素部分和驱动器电路部分，以及 高可靠性作为开关元件。 在驱动器电路部分和像素部分中形成两个晶体管，每个晶体管的一个表面侧上包括结晶区域的氧化物半导体层用作有源层。 可以通过选择确定通道位置的栅电极层的位置来选择晶体管的电特性。 因此，可以制造包括能够高速操作的驱动电路部分和一个基板上的像素部分的半导体器件。

公开(公告)号：US20110102697A1

公开(公告)日：2011-05-05

申请号：US12912076

申请日：2010-10-26

申请人： Jun KOYAMA ,  Shunpei YAMAZAKI

发明人： Jun KOYAMA ,  Shunpei YAMAZAKI

IPC分类号： G02F1/136

CPC分类号： G02F1/1368 ,  G02F1/13306 ,  G02F1/133345 ,  G02F1/133512 ,  G02F1/133784 ,  G02F1/1339 ,  G02F1/13394 ,  G02F1/134309 ,  G02F1/134336 ,  G02F1/13439 ,  G02F1/13454 ,  G02F1/1362 ,  G02F1/136286 ,  G02F1/137 ,  G02F2001/133302 ,  G02F2001/133357 ,  G02F2001/133388 ,  G02F2001/133742 ,  G02F2001/13793 ,  G02F2201/121 ,  G02F2201/123

摘要： When a pixel portion and a driver circuit are formed over one substrate and a counter electrode is formed over an entire surface of a counter substrate, the driver circuit may be adversely affected by an optimized voltage of the counter electrode. A semiconductor device according to the present invention has a structure in which: a liquid crystal layer is provided between a pair of substrates; one of the substrates is provided with a pixel electrode and a driver circuit; the other of the substrates is a counter substrate which is provided with two counter electrode layers in different potentials; and one of the counter electrode layers overlaps with the pixel electrode with the liquid crystal layer therebetween and the other of the counter electrode layers overlaps with the driver circuit with the liquid crystal layer therebetween. An oxide semiconductor layer is used for the driver circuit.

摘要翻译： 当像素部分和驱动电路形成在一个衬底上并且相对电极形成在对向衬底的整个表面上时，驱动电路可能受到对电极的优化电压的不利影响。 根据本发明的半导体器件具有以下结构：在一对基板之间设置液晶层; 其中一个基板设置有像素电极和驱动电路; 另一个基板是相对基板，其具有不同电位的两个对电极层; 相对电极层中的一个与像素电极重叠，液晶层在其间，另一个对电极层与驱动电路重叠，液晶层在其间。 氧化物半导体层用于驱动电路。

公开(公告)号：US20110101334A1

公开(公告)日：2011-05-05

申请号：US12912190

申请日：2010-10-26

申请人： Shunpei YAMAZAKI ,  Jun KOYAMA ,  Kiyoshi KATO

发明人： Shunpei YAMAZAKI ,  Jun KOYAMA ,  Kiyoshi KATO

IPC分类号： H01L27/108

CPC分类号： H01L27/088 ,  G11C11/404 ,  G11C11/405 ,  G11C16/02 ,  H01L27/0207 ,  H01L27/1052 ,  H01L27/115 ,  H01L27/11517 ,  H01L27/1156 ,  H01L27/1225

摘要： It is an object to provide a semiconductor having a novel structure. In the semiconductor device, a plurality of memory elements are connected in series and each of the plurality of memory elements includes first to third transistors thus forming a memory circuit. A source or a drain of a first transistor which includes an oxide semiconductor layer is in electrical contact with a gate of one of a second and a third transistor. The extremely low off current of a first transistor containing the oxide semiconductor layer allows storing, for long periods of time, electrical charges in the gate electrode of one of the second and the third transistor, whereby a substantially permanent memory effect can be obtained. The second and the third transistors which do not contain an oxide semiconductor layer allow high-speed operations when using the memory circuit.

摘要翻译： 本发明的目的是提供具有新颖结构的半导体。 在半导体器件中，多个存储器元件串联连接，并且多个存储元件中的每一个包括第一至第三晶体管，从而形成存储器电路。 包括氧化物半导体层的第一晶体管的源极或漏极与第二和第三晶体管之一的栅极电接触。 含有氧化物半导体层的第一晶体管的极低的截止电流允许长时间地在第二和第三晶体管之一的栅电极中存储电荷，由此可以获得基本上永久的记忆效应。 不含氧化物半导体层的第二和第三晶体管在使用存储电路时允许高速操作。

公开(公告)号：US20110101332A1

公开(公告)日：2011-05-05

申请号：US12910908

申请日：2010-10-25

申请人： Shunpei YAMAZAKI ,  Keitaro IMAI ,  Jun KOYAMA

发明人： Shunpei YAMAZAKI ,  Keitaro IMAI ,  Jun KOYAMA

IPC分类号： H01L29/12

CPC分类号： H01L27/10802 ,  G11C11/404 ,  G11C11/405 ,  G11C16/02 ,  H01L21/8258 ,  H01L27/0688 ,  H01L27/088 ,  H01L27/0922 ,  H01L27/105 ,  H01L27/1156 ,  H01L27/12 ,  H01L27/1225 ,  H01L29/7869

摘要： The semiconductor device includes: a transistor having an oxide semiconductor layer; and a logic circuit formed using a semiconductor material other than an oxide semiconductor. One of a source electrode and a drain electrode of the transistor is electrically connected to at least one input of the logic circuit, and at least one input signal is applied to the logic circuit through the transistor. The off-current of the transistor is preferably 1×10−13 A or less.

摘要翻译： 半导体器件包括：具有氧化物半导体层的晶体管; 以及使用除了氧化物半导体之外的半导体材料形成的逻辑电路。 晶体管的源电极和漏电极中的一个电连接到逻辑电路的至少一个输入端，并且至少一个输入信号通过晶体管施加到逻辑电路。 晶体管的截止电流优选为1×10-13A以下。

公开(公告)号：US20110090183A1

公开(公告)日：2011-04-21

申请号：US12901023

申请日：2010-10-08

申请人： Shunpei YAMAZAKI ,  Ryo ARASAWA ,  Jun KOYAMA ,  Masashi TSUBUKU ,  Kosei NODA

发明人： Shunpei YAMAZAKI ,  Ryo ARASAWA ,  Jun KOYAMA ,  Masashi TSUBUKU ,  Kosei NODA

IPC分类号： G09G5/00 ,  G09G3/36

CPC分类号： G09G3/3614 ,  G02F1/133553 ,  G02F1/13439 ,  G02F1/1368 ,  G02F2201/123 ,  G02F2202/10 ,  G09G3/3648 ,  G09G3/3677 ,  G09G2300/08 ,  G09G2310/0286 ,  G09G2310/08 ,  G09G2330/021 ,  H01L21/02164 ,  H01L21/02266 ,  H01L21/02565 ,  H01L21/02631 ,  H01L21/467 ,  H01L21/477 ,  H01L27/1225 ,  H01L27/1255 ,  H01L29/24 ,  H01L29/42356 ,  H01L29/45 ,  H01L29/66969 ,  H01L29/78648 ,  H01L29/7869

摘要： In a liquid crystal display device including a plurality of pixels in a display portion and configured to performed display in a plurality of frame periods, each of the frame periods includes a writing period and a holding period, and after an image signal is input to each of the plurality of pixels in the writing period, a transistor included in each of the plurality of pixels is turned off and the image signal is held for at least 30 seconds in the holding period. The pixel includes a semiconductor layer including an oxide semiconductor layer, and the oxide semiconductor layer has a carrier concentration of less than 1×1014/cm3.

摘要翻译： 在包括显示部分中的多个像素并且被配置为在多个帧周期中进行显示的液晶显示装置中，每个帧周期包括写入周期和保持周期，并且在将图像信号输入到每个 在所述写入周期中的所述多个像素中，包括在所述多个像素中的每一个中的晶体管被​​截止，并且所述图像信号在所述保持周期中保持至少30秒。 像素包括具有氧化物半导体层的半导体层，氧化物半导体层的载流子浓度小于1×10 14 / cm 3。

公开(公告)号：US20110089417A1

公开(公告)日：2011-04-21

申请号：US12906565

申请日：2010-10-18

申请人： Shunpei YAMAZAKI ,  Jun KOYAMA ,  Keitaro IMAI

发明人： Shunpei YAMAZAKI ,  Jun KOYAMA ,  Keitaro IMAI

IPC分类号： H01L29/12

CPC分类号： H01L29/7869 ,  H01L21/84 ,  H01L27/0688 ,  H01L27/1207 ,  H01L27/1225

摘要： An objet of the present invention is to provide a semiconductor device with a new structure. Disclosed is a semiconductor device including a first transistor which includes a channel formation region on a substrate containing a semiconductor material, impurity regions formed with the channel formation region interposed therebetween, a first gate insulating layer over the channel formation region, a first gate electrode over the first gate insulating layer, and a first source electrode and a first drain electrode which are electrically connected to the impurity region; and a second transistor which includes a second gate electrode over the substrate containing a semiconductor material, a second gate insulating layer over the second gate electrode, an oxide semiconductor layer over the second gate insulating layer, and a second source electrode and a second drain electrode which are electrically connected to the oxide semiconductor layer.

摘要翻译： 本发明的目的是提供一种具有新结构的半导体器件。 公开了一种半导体器件，包括：第一晶体管，其在包含半导体材料的衬底上包括沟道形成区域，形成有沟道形成区域的杂质区域，沟道形成区域上的第一栅极绝缘层， 所述第一栅极绝缘层以及与所述杂质区电连接的第一源电极和第一漏电极; 以及第二晶体管，其在包含半导体材料的衬底上方包括第二栅极电极，在第二栅极电极上方的第二栅极绝缘层，在第二栅极绝缘层上方的氧化物半导体层，以及第二源极电极和第二漏极电极 其电连接到氧化物半导体层。

公开(公告)号：US20110025729A1

公开(公告)日：2011-02-03

申请号：US12902382

申请日：2010-10-12

申请人： Shunpei YAMAZAKI ,  Jun KOYAMA

发明人： Shunpei YAMAZAKI ,  Jun KOYAMA

IPC分类号： G09G5/10

CPC分类号： G09G3/3413 ,  G02F1/136209 ,  G02F1/136213 ,  G02F1/1368 ,  G09G3/003 ,  G09G3/20 ,  G09G3/2025 ,  G09G3/3406 ,  G09G3/3648 ,  G09G2310/0235 ,  G09G2310/024 ,  G09G2310/08 ,  G09G2320/0247

摘要： A display with high resolution and reduced flicker of image. The driving method of this invention, or the field sequential driving method, divides one frame of image into a plurality of subframes, i.e., divides the period of one image frame into a plurality of subframe periods; displays red, green and blue images during the corresponding subframe periods; and, when these color images are to be displayed, turns on the corresponding red, green and blue backlights successively to feed light to the display section.

摘要翻译： 具有高分辨率和减少图像闪烁的显示。 本发明的驱动方法或场顺序驱动方法将一帧图像划分为多个子帧，即将一个图像帧的周期划分为多个子帧周期; 在相应的子帧期间显示红色，绿色和蓝色图像; 并且当要显示这些彩色图像时，依次打开相应的红色，绿色和蓝色背光，以将光馈送到显示部分。

公开(公告)号：US20100253478A1

公开(公告)日：2010-10-07

申请号：US12754416

申请日：2010-04-05

申请人： Jun KOYAMA ,  Kiyoshi KATO ,  Shunpei YAMAZAKI

发明人： Jun KOYAMA ,  Kiyoshi KATO ,  Shunpei YAMAZAKI

IPC分类号： H04Q5/22

CPC分类号： H04W52/028 ,  Y02D70/122 ,  Y02D70/166

摘要： An object is to provide a data processing device which achieves multiple functions or easy additional providing of a function while suppressing adverse influence on a communication distance or to improve resistance to electrostatic discharge in the data processing device. The data processing device includes an antenna which transmits and receives a first signal to/from a first terminal device through wireless communication, an integrated circuit which executes a process in accordance with the first signal, and a terminal portion which transmits and receives a second signal to/from a second terminal device and has an exposed conductive portion on its surface. A protection circuit is provided between at least one terminal of terminals of the terminal portion and a power supply terminal of a high potential and between the one terminal and a power supply terminal of a low potential.

摘要翻译： 本发明的目的是提供一种能够实现多种功能的数据处理装置，或容易地附加提供功能，同时抑制对通信距离的不利影响或提高数据处理装置中的静电放电的抵抗力。 数据处理装置包括通过无线通信向第一终端装置发送第一信号的接收天线，执行与第一信号对应的处理的集成电路以及发送接收第二信号的终端部 到/从第二终端设备，并且在其表面上具有暴露的导电部分。 在端子部分的端子的至少一个端子和高电位的电源端子之间以及在一个端子和低电位的电源端子之间提供保护电路。