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公开(公告)号:US20110122670A1
公开(公告)日:2011-05-26
申请号:US12947846
申请日:2010-11-17
申请人: Shunpei YAMAZAKI , Jun KOYAMA , Kiyoshi KATO
发明人: Shunpei YAMAZAKI , Jun KOYAMA , Kiyoshi KATO
IPC分类号: G11C5/06
CPC分类号: G11C7/10 , G11C5/06 , G11C5/147 , G11C7/12 , G11C7/18 , G11C7/22 , G11C8/08 , G11C11/24 , G11C11/4097 , G11C16/0433 , G11C16/28 , H01L21/02554 , H01L21/02565 , H01L21/02631 , H01L23/528 , H01L27/0688 , H01L27/105 , H01L27/108 , H01L27/115 , H01L27/11551 , H01L27/1156 , H01L27/1207 , H01L27/1225 , H01L29/22 , H01L29/24 , H01L29/26 , H01L29/78 , H01L29/78603 , H01L29/7869 , H01L2924/0002 , H01L2924/00
摘要: An object of the present invention is to provide a semiconductor device combining transistors integrating on a same substrate transistors including an oxide semiconductor in their channel formation region and transistors including non-oxide semiconductor in their channel formation region. An application of the present invention is to realize substantially non-volatile semiconductor memories which do not require specific erasing operation and do not suffer from damages due to repeated writing operation. Furthermore, the semiconductor device is well adapted to store multivalued data. Manufacturing methods, application circuits and driving/reading methods are explained in details in the description.
摘要翻译: 本发明的目的是提供一种半导体器件,其组合晶体管,其集成在其沟道形成区域中包括氧化物半导体的相同衬底晶体管和在其沟道形成区域中包括非氧化物半导体的晶体管。 本发明的应用是实现基本上不需要特定擦除操作的非易失性半导体存储器,并且不会因重复的写入操作而遭受损坏。 此外,半导体器件很适合于存储多值数据。 在说明书中详细说明制造方法,应用电路和驱动/读取方法。
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公开(公告)号:US20090180326A1
公开(公告)日:2009-07-16
申请号:US12407539
申请日:2009-03-19
申请人: Shunpei YAMAZAKI , Jun KOYAMA , Kiyoshi KATO
发明人: Shunpei YAMAZAKI , Jun KOYAMA , Kiyoshi KATO
IPC分类号: G11C16/06
CPC分类号: G11C11/5621 , G11C11/5628 , G11C11/5642 , G11C11/5671 , G11C16/0433 , G11C16/10 , G11C16/16 , G11C16/26 , G11C16/32
摘要: There is provided a non-volatile memory which enables high accuracy threshold control in a writing operation. In the present invention, a drain voltage and a drain current of a memory transistor are controlled to carry out a writing operation of a hot electron injection system, which is wherein a charge injection speed does not depend on a threshold voltage. FIGS. 1A and 1B are views of a circuit structure for controlling the writing. In FIGS. 1A and 1B, an output of an operational amplifier 103 is connected to a control gate of a memory transistor 101, a constant current source 102 is connected to a drain electrode, and a source electrode is grounded. The constant current source 102 and a voltage Vpgm are respectively connected to two input terminals of the operational amplifier 103.
摘要翻译: 提供了一种在写入操作中实现高精度阈值控制的非易失性存储器。 在本发明中,控制存储晶体管的漏极电压和漏极电流,进行热电子注入系统的写入动作,其中电荷注入速度不依赖于阈值电压。 图 图1A和1B是用于控制写入的电路结构的视图。 在图 如图1A和1B所示,运算放大器103的输出连接到存储晶体管101的控制栅极,恒流源102连接到漏电极,源电极接地。 恒流源102和电压Vpgm分别连接到运算放大器103的两个输入端。
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公开(公告)号:US20110186949A1
公开(公告)日:2011-08-04
申请号:US13084996
申请日:2011-04-12
申请人: Shunpei YAMAZAKI , Jun KOYAMA , Kiyoshi KATO , Takaaki KOEN , Yuto YAKUBO , Makoto YANAGISAWA , Hisashi OHTANI , Eiji SUGIYAMA , Nozomi HORIKOSHI
发明人: Shunpei YAMAZAKI , Jun KOYAMA , Kiyoshi KATO , Takaaki KOEN , Yuto YAKUBO , Makoto YANAGISAWA , Hisashi OHTANI , Eiji SUGIYAMA , Nozomi HORIKOSHI
IPC分类号: H01L29/66
CPC分类号: G06K19/07735 , G06K19/07722 , G06K19/07794 , H01L23/295 , H01L23/3157 , H01L2924/0002 , H01L2924/09701 , H01L2924/12044 , H01L2924/19041 , H01L2924/3011 , H01L2924/3025 , H01L2924/00
摘要: A semiconductor device capable of wireless communication, which has high reliability in terms of resistance to external force, in particular, pressing force and can prevent electrostatic discharge in an integrated circuit without preventing reception of an electric wave. The semiconductor device includes an on-chip antenna connected to the integrated circuit and a booster antenna which transmits a signal or power included in a received electric wave to the on-chip antenna without contact. In the semiconductor device, the integrated circuit and the on-chip antenna are interposed between a pair of structure bodies formed by impregnating a fiber body with a resin. One of the structure bodies is provided between the on-chip antenna and the booster antenna. A conductive film having a surface resistance value of approximately 106 to 1014 Ω/cm2 is formed on at least one surface of each structure body.
摘要翻译: 一种能够进行无线通信的半导体装置,其在外力方面具有高的可靠性,特别是按压力,并且能够防止集成电路中的静电放电,而不会妨碍电波的接收。 半导体器件包括连接到集成电路的片上天线和将接收到的电波中包含的信号或功率发送到片上天线而不接触的增强天线。 在半导体器件中,集成电路和片上天线插入通过用树脂浸渍纤维体而形成的一对结构体之间。 其中一个结构体设置在片上天线和增强天线之间。 在每个结构体的至少一个表面上形成表面电阻值为大约106至1014Ω·cm 2 / cm 2的导电膜。
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公开(公告)号:US20110101334A1
公开(公告)日:2011-05-05
申请号:US12912190
申请日:2010-10-26
申请人: Shunpei YAMAZAKI , Jun KOYAMA , Kiyoshi KATO
发明人: Shunpei YAMAZAKI , Jun KOYAMA , Kiyoshi KATO
IPC分类号: H01L27/108
CPC分类号: H01L27/088 , G11C11/404 , G11C11/405 , G11C16/02 , H01L27/0207 , H01L27/1052 , H01L27/115 , H01L27/11517 , H01L27/1156 , H01L27/1225
摘要: It is an object to provide a semiconductor having a novel structure. In the semiconductor device, a plurality of memory elements are connected in series and each of the plurality of memory elements includes first to third transistors thus forming a memory circuit. A source or a drain of a first transistor which includes an oxide semiconductor layer is in electrical contact with a gate of one of a second and a third transistor. The extremely low off current of a first transistor containing the oxide semiconductor layer allows storing, for long periods of time, electrical charges in the gate electrode of one of the second and the third transistor, whereby a substantially permanent memory effect can be obtained. The second and the third transistors which do not contain an oxide semiconductor layer allow high-speed operations when using the memory circuit.
摘要翻译: 本发明的目的是提供具有新颖结构的半导体。 在半导体器件中,多个存储器元件串联连接,并且多个存储元件中的每一个包括第一至第三晶体管,从而形成存储器电路。 包括氧化物半导体层的第一晶体管的源极或漏极与第二和第三晶体管之一的栅极电接触。 含有氧化物半导体层的第一晶体管的极低的截止电流允许长时间地在第二和第三晶体管之一的栅电极中存储电荷,由此可以获得基本上永久的记忆效应。 不含氧化物半导体层的第二和第三晶体管在使用存储电路时允许高速操作。
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公开(公告)号:US20100253478A1
公开(公告)日:2010-10-07
申请号:US12754416
申请日:2010-04-05
申请人: Jun KOYAMA , Kiyoshi KATO , Shunpei YAMAZAKI
发明人: Jun KOYAMA , Kiyoshi KATO , Shunpei YAMAZAKI
IPC分类号: H04Q5/22
CPC分类号: H04W52/028 , Y02D70/122 , Y02D70/166
摘要: An object is to provide a data processing device which achieves multiple functions or easy additional providing of a function while suppressing adverse influence on a communication distance or to improve resistance to electrostatic discharge in the data processing device. The data processing device includes an antenna which transmits and receives a first signal to/from a first terminal device through wireless communication, an integrated circuit which executes a process in accordance with the first signal, and a terminal portion which transmits and receives a second signal to/from a second terminal device and has an exposed conductive portion on its surface. A protection circuit is provided between at least one terminal of terminals of the terminal portion and a power supply terminal of a high potential and between the one terminal and a power supply terminal of a low potential.
摘要翻译: 本发明的目的是提供一种能够实现多种功能的数据处理装置,或容易地附加提供功能,同时抑制对通信距离的不利影响或提高数据处理装置中的静电放电的抵抗力。 数据处理装置包括通过无线通信向第一终端装置发送第一信号的接收天线,执行与第一信号对应的处理的集成电路以及发送接收第二信号的终端部 到/从第二终端设备,并且在其表面上具有暴露的导电部分。 在端子部分的端子的至少一个端子和高电位的电源端子之间以及在一个端子和低电位的电源端子之间提供保护电路。
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公开(公告)号:US20130002312A1
公开(公告)日:2013-01-03
申请号:US13529120
申请日:2012-06-21
申请人: Shunpei YAMAZAKI , Jun KOYAMA
发明人: Shunpei YAMAZAKI , Jun KOYAMA
CPC分类号: H01L27/0266 , G09G3/3283 , G09G3/3677 , G09G3/3688 , G09G2300/0426 , G09G2310/0267 , G09G2310/0275 , G09G2310/0286 , G09G2330/04 , G11C19/28 , H01L27/1225 , H02H9/044 , Y10T29/49117 , Y10T428/24364 , Y10T428/24372 , Y10T428/2438
摘要: Provided are a driver circuit which suppresses damage of a semiconductor element due to ESD in a manufacturing process, a method of manufacturing the driver circuit. Further provided are a driver circuit provided with a protection circuit with low leakage current, and a method of manufacturing the driver circuit. By providing a protection circuit in a driver circuit to be electrically connected to a semiconductor element in the driver circuit, and by forming, at the same time, a transistor which serves as the semiconductor element in the driver circuit and a transistor included in the protection circuit in the driver circuit, damage of the semiconductor element due to ESD is suppressed in the process of manufacturing the driver circuit. Further, by using an oxide semiconductor film for the transistor included in the protection circuit in the driver circuit, leakage current in the protection circuit is reduced.
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公开(公告)号:US20120314151A1
公开(公告)日:2012-12-13
申请号:US13592911
申请日:2012-08-23
申请人: Shunpei YAMAZAKI , Jun KOYAMA
发明人: Shunpei YAMAZAKI , Jun KOYAMA
CPC分类号: H01L29/78696 , H01L27/124 , H01L27/127 , H01L27/3262 , H01L29/4908 , H01L29/78621 , H01L29/78624 , H01L29/78627 , H01L33/0041 , H01L2029/7863
摘要: The purpose of the present invention is to provide a reliable semiconductor device comprising TFTs having a large area integrated circuit with low wiring resistance. One of the features of the present invention is that an LDD region including a region which overlaps with a gate electrode and a region which does not overlap with the gate electrode is provided in one TFT. Another feature of the present invention is that gate electrode comprises a first conductive layer and a second conductive layer and portion of the gate wiring has a clad structure comprising the first conductive layer and the second conductive layer with a low resistance layer interposed therebetween
摘要翻译: 本发明的目的是提供一种包括具有低布线电阻的大面积集成电路的TFT的可靠的半导体器件。 本发明的特征之一是在一个TFT中设置包括与栅电极重叠的区域和不与栅电极重叠的区域的LDD区域。 本发明的另一特征在于,栅电极包括第一导电层和第二导电层,并且栅极配线的一部分具有包含第一导电层和第二导电层的包层结构,其间具有低电阻层
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公开(公告)号:US20120299003A1
公开(公告)日:2012-11-29
申请号:US13568186
申请日:2012-08-07
申请人: Shunpei YAMAZAKI , Jun KOYAMA , Atsushi HIROSE , Masashi TSUBUKU , Kosei NODA
发明人: Shunpei YAMAZAKI , Jun KOYAMA , Atsushi HIROSE , Masashi TSUBUKU , Kosei NODA
IPC分类号: H01L29/22 , H01L27/15 , H01L29/786
CPC分类号: H01L27/1225 , H01L21/823412 , H01L27/124 , H01L27/1255 , H01L27/156 , H01L27/3213 , H01L29/24 , H01L29/36 , H01L29/7869 , H01L29/78693 , H01L33/025 , H01L2924/0002 , H04M1/0266 , H04R1/02 , H01L2924/00
摘要: An object is to obtain a semiconductor device having a high sensitivity in detecting signals and a wide dynamic range, using a thin film transistor in which an oxide semiconductor layer is used. An analog circuit is formed with the use of a thin film transistor including an oxide semiconductor which has a function as a channel formation layer, has a hydrogen concentration of 5×1019 atoms/cm3 or lower, and substantially functions as an insulator in the state where no electric field is generated. Thus, a semiconductor device having a high sensitivity in detecting signals and a wide dynamic range can be obtained.
摘要翻译: 目的是获得使用其中使用氧化物半导体层的薄膜晶体管,在检测信号和宽动态范围中具有高灵敏度的半导体器件。 使用具有作为沟道形成层的功能的氧化物半导体的薄膜晶体管形成模拟电路,其氢浓度为5×1019个原子/ cm3以下,并且在该状态下基本上起绝缘体的作用 其中不产生电场。 因此,可以获得在检测信号中具有高灵敏度和宽动态范围的半导体器件。
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公开(公告)号:US20120206325A1
公开(公告)日:2012-08-16
申请号:US13367711
申请日:2012-02-07
申请人: Shunpei YAMAZAKI , Jun KOYAMA
发明人: Shunpei YAMAZAKI , Jun KOYAMA
IPC分类号: G09G3/36
CPC分类号: G09G3/003 , G02B27/0093 , G02B27/2214 , G02F1/13471 , G09G3/3611 , H04N13/31 , H04N13/315 , H04N13/356 , H04N13/373
摘要: A display device includes a display panel and a shutter panel that is provided on the viewer side of the display panel and includes a first liquid crystal element and a second liquid crystal element adjacent to each other. In a first display state, a first light-shielding region and a first light-transmitting region are formed in the shutter panel by the first liquid crystal element, and light from the display panel is emitted through the first light-transmitting region. In a second display state, a second light-shielding region larger than the first light-shielding region and a second light-transmitting region smaller than the first light-transmitting region are formed in the shutter panel by the first liquid crystal element and the second liquid crystal element, and light from the display panel is emitted through the second light-transmitting region.
摘要翻译: 显示装置包括显示面板和快门面板,其设置在显示面板的观察者侧,并且包括彼此相邻的第一液晶元件和第二液晶元件。 在第一显示状态下,通过第一液晶元件在快门面板中形成第一遮光区域和第一透光区域,并且通过第一透光区域发射来自显示面板的光。 在第二显示状态下,通过第一液晶元件在快门面板中形成比第一遮光区域大的第二遮光区域和小于第一透光区域的第二透光区域, 液晶元件,并且来自显示面板的光通过第二透光区域发射。
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公开(公告)号:US20120113058A1
公开(公告)日:2012-05-10
申请号:US13348707
申请日:2012-01-12
申请人: Shunpei YAMAZAKI , Jun KOYAMA
发明人: Shunpei YAMAZAKI , Jun KOYAMA
IPC分类号: G06F3/042
CPC分类号: G06F3/0421 , G06F3/03545 , H01L27/14609 , H01L27/14643 , H01L27/14678 , H01L27/288 , H01L27/307 , H01L27/3227 , H01L27/323 , H01L27/3234 , H01L27/3244 , H04N1/00347 , H04N1/00392 , H04N1/024 , H04N1/02445 , H04N1/02472 , H04N1/02805 , H04N2201/0081 , H04N2201/0089
摘要: Problems exist in areas such as image visibility, endurance of the device, precision, miniaturization, and electric power consumption in an information device having a conventional resistive film method or optical method pen input function. Both EL elements and photoelectric conversion elements are arranged in each pixel of a display device in an information device of the present invention having a pen input function. Information input is performed by the input of light to the photoelectric conversion elements in accordance with a pen that reflects light by a pen tip. An information device with a pen input function, capable of displaying a clear image without loss of brightness in the displayed image, having superior endurance, capable of being miniaturized, and having good precision can thus be obtained.
摘要翻译: 在具有传统的电阻膜方法或光学方法笔输入功能的信息装置中存在诸如图像可视性,装置的耐久性,精度,小型化和电力消耗等方面的问题。 EL元件和光电转换元件都布置在具有笔输入功能的本发明的信息装置中的显示装置的每个像素中。 通过根据用笔尖反射光的笔将光输入到光电转换元件来执行信息输入。 因此,可以获得具有笔输入功能的信息装置,能够在显示图像中显示清晰的图像而不损失亮度,具有优异的耐久性,能够小型化并且具有良好的精度。
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