公开(公告)号：US10224759B2

公开(公告)日：2019-03-05

申请号：US14792891

申请日：2015-07-07

Applicant: RF Micro Devices, Inc.

Inventor： Nadim Khlat

IPC: H02J7/00 ,  H02J50/20 ,  H02J7/04

Abstract: Aspects disclosed in the detailed description include a wireless charging circuit comprising a radio frequency (RF) power harvesting circuit. In one aspect, the RF power harvesting circuit is configured to harvest a wireless RF charging signal provided by a wireless charging station to generate a direct-current (DC) charging signal to charge a battery, for example, a lithium-ion (Li-ion) battery, in a battery-operated electronic device. In another aspect, a wireless charging controller controls the RF power harvesting circuit to dynamically increase or decrease an effective charging power of the DC charging signal according to a target charging power determined according to a charging profile of the battery. By dynamically adjusting the effective charging power provided to the battery according to the charging profile of the battery, it is possible to provide fast charging to the battery while protecting the battery from overcharging damage.

公开(公告)号：US10121718B2

公开(公告)日：2018-11-06

申请号：US14885202

申请日：2015-10-16

Applicant: RF Micro Devices, Inc.

Inventor： Dirk Robert Walter Leipold ,  Julio C. Costa ,  Baker Scott ,  George Maxim

IPC: H01L23/29 ,  H01L23/31 ,  H01L21/304 ,  H01L21/02 ,  H01L21/683 ,  H01L23/373 ,  H01L23/00 ,  H05K1/02 ,  H05K1/18 ,  H01Q1/50 ,  H01L23/36 ,  H01L21/56 ,  H01L23/20 ,  H01L23/367 ,  H01L21/306 ,  H01L23/522 ,  H01L49/02

CPC classification number: H01L23/315 ,  H01L21/02266 ,  H01L21/02282 ,  H01L21/304 ,  H01L21/30604 ,  H01L21/565 ,  H01L21/6835 ,  H01L23/20 ,  H01L23/291 ,  H01L23/293 ,  H01L23/3121 ,  H01L23/3135 ,  H01L23/36 ,  H01L23/367 ,  H01L23/3731 ,  H01L23/3737 ,  H01L23/5223 ,  H01L23/5227 ,  H01L23/5228 ,  H01L23/562 ,  H01L24/17 ,  H01L28/10 ,  H01L28/20 ,  H01L28/40 ,  H01L2221/68327 ,  H01L2221/6834 ,  H01L2221/68381 ,  H01L2224/131 ,  H01L2224/13147 ,  H01L2224/16225 ,  H01L2224/16227 ,  H01L2224/73204 ,  H01L2224/92125 ,  H01L2924/0002 ,  H01L2924/19011 ,  H01L2924/19041 ,  H01L2924/19042 ,  H01L2924/19043 ,  H01Q1/50 ,  H05K1/0203 ,  H05K1/181 ,  H01L2924/00 ,  H01L2924/014 ,  H01L2924/00014

Abstract: A printed circuit module having a protective layer in place of a low-resistivity handle layer and methods for manufacturing the same are disclosed. The printed circuit module includes a printed circuit substrate with a thinned die attached to the printed circuit substrate. The thinned die includes at least one device layer over the printed circuit substrate and at least one deep well within the at least one device layer. A protective layer is disposed over the at least one deep well, wherein the protective layer has a thermal conductivity greater than 2 watts per meter Kelvin (W/mK) and an electrical resistivity of greater than 106 Ohm-cm.

公开(公告)号：US10090762B2

公开(公告)日：2018-10-02

申请号：US14831080

申请日：2015-08-20

Applicant: RF Micro Devices, Inc.

Inventor： Mohammad Ahsanul Adeeb ,  Philippe Gorisse ,  Nadim Khlat ,  Michael R. Kay

IPC: H02M3/156 ,  H02M3/158

Abstract: A direct current (DC) voltage converter configured to transition between operation modes is disclosed. A voltage selection circuitry is provided in a DC voltage conversion circuit to control a buck-boost converter that generates a DC output voltage. As opposed to conventional methods of switching the buck-boost converter between a buck mode and a boost mode based on a single switching threshold, the voltage selection circuitry is configured to switch the buck-boost converter between the buck mode and the boost mode based on multiple voltage thresholds. Each of the multiple voltage thresholds defines a respective range for the DC output voltage. By controlling the buck-boost converter based on multiple voltage thresholds, it is possible to provide a smoother transition between the buck mode and the boost mode, thus reducing voltage errors in the DC output voltage and improving reliability of the DC voltage conversion circuit.

公开(公告)号：US10075200B2

公开(公告)日：2018-09-11

申请号：US14560399

申请日：2014-12-04

Applicant: RF Micro Devices, Inc.

Inventor： Thomas Philip Budka

IPC: H04B1/00

CPC classification number: H04B1/006

Abstract: Antenna switching circuitry includes an antenna node, a number of signal path nodes, and a number of switching elements. Each one of the switching elements is coupled between a different one of the signal path nodes and the antenna node. At least two of the signal path nodes are coupled together in order to form a low distortion node, such that the switching elements between the low distortion node and the antenna node are used to pass a low-distortion radio frequency (RF) signal. By coupling two of the signal path nodes together, a low distortion signal path is created to the antenna. Creating a low distortion signal path using multiple switching elements allows for the size of the switching elements to remain small, which reduces the parasitic capacitance of each one of the switches and therefore the insertion loss of the antenna switching circuitry.

公开(公告)号：US10056518B2

公开(公告)日：2018-08-21

申请号：US14746958

申请日：2015-06-23

Applicant: RF Micro Devices, Inc.

Inventor： Kevin Wesley Kobayashi ,  Ricke Waylan Clark

IPC: H01L31/11 ,  H01L29/205 ,  H01L29/10 ,  H01L29/417 ,  H01L27/144 ,  H01L29/737 ,  H01L29/06 ,  H01L29/08 ,  H01L27/02 ,  H01L27/06 ,  H01L27/082

CPC classification number: H01L31/1105 ,  H01L27/0207 ,  H01L27/0605 ,  H01L27/0825 ,  H01L27/1443 ,  H01L29/0692 ,  H01L29/0817 ,  H01L29/0821 ,  H01L29/1004 ,  H01L29/205 ,  H01L29/41708 ,  H01L29/7371

Abstract: An active photonic device having a Darlington configuration is disclosed. The active photonic device includes a substrate with a collector layer over the substrate. The collector layer includes an inner collector region and an outer collector region that substantially surrounds the inner collector region. A base layer resides over the collector layer. The base layer includes an inner base region and an outer base region that substantially surrounds and is spaced apart from the inner base region. An emitter layer resides over the base layer. The emitter layer includes an inner emitter region that is ring-shaped and resides over and extends substantially around an outer periphery of the inner base region. The emitter layer further includes an outer emitter region that is ring-shaped and resides over and extends substantially around the outer base region. A connector structure electrically couples the inner emitter region with the outer base region.

公开(公告)号：US10020206B2

公开(公告)日：2018-07-10

申请号：US15173037

申请日：2016-06-03

Applicant: RF Micro Devices, Inc.

Inventor： Thomas Scott Morris ,  David Jandzinski ,  Stephen Parker ,  Jon Chadwick ,  Julio C. Costa

IPC: H01L23/29 ,  H01L21/56 ,  H01L25/065 ,  H01L23/31 ,  H01L23/373 ,  H01L23/433 ,  H01L23/00

Abstract: The present disclosure relates to enhancing the thermal performance of encapsulated flip chip dies. According to an exemplary process, a plurality of flip chip dies are attached on a top surface of a carrier, and a first mold compound is applied over the top surface of the carrier to encapsulate the plurality of flip chip dies. The first mold compound is thinned down to expose a substrate of each flip chip die and the substrate of each flip chip die is then substantially etched away to provide an etched flip chip die that has an exposed surface at the bottom of a cavity. Next, a second mold compound with high thermal conductivity is applied to substantially fill each cavity and the top surface of the second mold compound is planarized. Finally, the encapsulated etched flip chip dies can be marked, singulated, and tested as a module.

公开(公告)号：US09997376B2

公开(公告)日：2018-06-12

申请号：US15173037

申请日：2016-06-03

Applicant: RF Micro Devices, Inc.

Inventor： Thomas Scott Morris ,  David Jandzinski ,  Stephen Parker ,  Jon Chadwick ,  Julio C. Costa

IPC: H01L23/29 ,  H01L21/56 ,  H01L25/065 ,  H01L23/31 ,  H01L23/373 ,  H01L23/433 ,  H01L23/00

Abstract: The present disclosure relates to enhancing the thermal performance of encapsulated flip chip dies. According to an exemplary process, a plurality of flip chip dies are attached on a top surface of a carrier, and a first mold compound is applied over the top surface of the carrier to encapsulate the plurality of flip chip dies. The first mold compound is thinned down to expose a substrate of each flip chip die and the substrate of each flip chip die is then substantially etched away to provide an etched flip chip die that has an exposed surface at the bottom of a cavity. Next, a second mold compound with high thermal conductivity is applied to substantially fill each cavity and the top surface of the second mold compound is planarized. Finally, the encapsulated etched flip chip dies can be marked, singulated, and tested as a module.

公开(公告)号：US09973169B2

公开(公告)日：2018-05-15

申请号：US14954224

申请日：2015-11-30

Applicant: RF Micro Devices, Inc.

Inventor： Kurt G. Steiner ,  Curtiss Hella ,  Benjamin P. Abbott ,  Daniel Chesire ,  Chad Thompson ,  Alan S. Chen

IPC: H03H9/64 ,  H03H3/10 ,  H03H9/145 ,  H03H9/02 ,  H03H3/04 ,  H03H9/13

CPC classification number: H03H9/6489 ,  H03H3/04 ,  H03H3/10 ,  H03H9/02622 ,  H03H9/02834 ,  H03H9/02921 ,  H03H9/02929 ,  H03H9/02937 ,  H03H9/131 ,  H03H9/14541

Abstract: Embodiments of a Surface Acoustic Wave (SAW) device, or filter, and methods of fabrication thereof are disclosed. In some embodiments, the SAW filter comprises a piezoelectric substrate and an Interdigitated Transducer (IDT) on a surface of the piezoelectric substrate. The IDT includes multiple fingers, each comprising a metal stack. The SAW filter further includes a cap layer on a surface of the IDT opposite the piezoelectric substrate and on areas of the surface of the piezoelectric substrate exposed by the IDT. The cap layer has a thickness in a range of and including 10 to 500 Angstroms and a high electrical resistivity (and thus a low electrical conductivity). For instance, in some embodiments, the electrical resistivity of the cap layer is greater than 10 kilo-ohm meters (KΩ·m). The SAW filter further includes an oxide overcoat layer on a surface of the cap layer opposite the IDT and the piezoelectric substrate.

公开(公告)号：US09960054B2

公开(公告)日：2018-05-01

申请号：US15173037

申请日：2016-06-03

Applicant: RF Micro Devices, Inc.

Inventor： Thomas Scott Morris ,  David Jandzinski ,  Stephen Parker ,  Jon Chadwick ,  Julio C. Costa

IPC: H01L23/29 ,  H01L21/56 ,  H01L25/065 ,  H01L23/31 ,  H01L23/373 ,  H01L23/433 ,  H01L23/00

Abstract: The present disclosure relates to enhancing the thermal performance of encapsulated flip chip dies. According to an exemplary process, a plurality of flip chip dies are attached on a top surface of a carrier, and a first mold compound is applied over the top surface of the carrier to encapsulate the plurality of flip chip dies. The first mold compound is thinned down to expose a substrate of each flip chip die and the substrate of each flip chip die is then substantially etched away to provide an etched flip chip die that has an exposed surface at the bottom of a cavity. Next, a second mold compound with high thermal conductivity is applied to substantially fill each cavity and the top surface of the second mold compound is planarized. Finally, the encapsulated etched flip chip dies can be marked, singulated, and tested as a module.

公开(公告)号：US09942994B2

公开(公告)日：2018-04-10

申请号：US14750384

申请日：2015-06-25

Applicant: RF Micro Devices, Inc.

Inventor： Thomas Scott Morris ,  Ulrik Riis Madsen ,  Donald Joseph Leahy

IPC: H01L23/552 ,  H05K3/40 ,  H01L23/498 ,  H05K1/11 ,  H05K9/00 ,  H05K3/30 ,  H01L21/56 ,  H01L23/00

CPC classification number: H05K3/4038 ,  H01L21/561 ,  H01L23/49827 ,  H01L23/552 ,  H01L24/97 ,  H01L2924/1461 ,  H05K1/115 ,  H05K3/301 ,  H05K9/0024 ,  H05K2201/0715 ,  Y10T29/49165 ,  H01L2924/00

Abstract: In one embodiment, a meta-module having circuitry for two or more modules is formed on a substrate, which is preferably a laminated substrate. The circuitry for the different modules is initially formed on the single meta-module. Each module will have one or more component areas in which the circuitry is formed. A metallic structure is formed on or in the substrate for each component area to be shielded. A single body, such as an overmold body, is then formed over all of the modules on the meta-module. At least a conductive vertical interconnect access structure (vias) associated with each component area to be shielded is then exposed through the body by a cutting, drilling, or similar operation. Next, an electromagnetic shield material is applied to the exterior surface of the body of each of the component areas to be shielded and in contact with the exposed conductive vias.