公开(公告)号：US20030015347A1

公开(公告)日：2003-01-23

申请号：US10174455

申请日：2002-06-17

Applicant: FormFactor, Inc

Inventor： Benjamin N. Eldridge ,  Gary W. Grube ,  Igor Y. Khandros ,  Alec Madsen ,  Gaetan L. Mathieu

IPC: H05K001/00

CPC classification number: H01R13/2407 ,  G01R1/06711 ,  G01R1/06727 ,  H01R4/26 ,  H01R9/091 ,  H01R12/57 ,  H01R13/2442 ,  H01R2201/20 ,  Y10T29/49004 ,  Y10T29/49128 ,  Y10T29/49165

Abstract: An apparatus and method providing improved interconnection elements and tip structures for effecting pressure connections between terminals of electronic components is described. The tip structure of the present invention has a sharpened blade oriented on the upper surface of the tip structure such that the length of the blade is substantially parallel to the direction of horizontal movement of the tip structure as the tip structure deflects across the terminal of an electronic component. In this manner, the sharpened substantially parallel oriented blade slices cleanly through any non-conductive layer(s) on the surface of the terminal and provides a reliable electrical connection between the interconnection element and the terminal of the electrical component.

Abstract translation: 描述了提供改进的互连元件和尖端结构以实现电子部件的端子之间的压力连接的装置和方法。 本发明的尖端结构具有尖端结构的上表面上定向的锋利的叶片，使得叶片的长度基本上平行于尖端结构的水平移动方向，因为尖端结构偏转穿过端部 电子元件 以这种方式，锋利的基本上平行的定向叶片切片通过终端表面上的任何非导电层清洁，并且在互连元件和电气部件的端子之间提供可靠的电连接。

公开(公告)号：US20020175697A1

公开(公告)日：2002-11-28

申请号：US10208173

申请日：2002-07-29

Applicant: FormFactor, Inc.

Inventor： Charles A. Miller ,  Richard S. Roy

IPC: G01R031/26

CPC classification number: G01R31/3193 ,  G01R31/31905

Abstract: A system for testing integrated circuit devices is disclosed in which a tester communicates with a known good device through a channel. Tester-DUT interface circuitry is provided for monitoring the channel while the tester is writing data as part of a test sequence to locations in the known good device. In response, the interface circuitry writes the data to corresponding locations in each of a number of devices under test (DUTs). The interface circuitry monitors the channel while the tester is reading from the locations in the known good device (KGD), and in response performs a comparison between DUT data read from the corresponding locations in the DUTs and expected responses obtained form the KGD.

Abstract translation: 公开了一种用于测试集成电路器件的系统，其中测试器通过通道与已知的良好器件进行通信。 测试仪 - DUT接口电路用于监视通道，同时测试人员将数据作为测试序列的一部分写入已知的良好设备中的位置。 作为响应，接口电路将数据写入被测设备（DUT）中的每一个中的相应位置。 当测试仪从已知的良好设备（KGD）中的位置读取时，接口电路监视通道，并且响应于从被测设备中的相应位置读取的DUT数据和从KGD获得的预期响应之间的比较。

公开(公告)号：US20020145032A1

公开(公告)日：2002-10-10

申请号：US09753296

申请日：2000-12-29

Applicant: FORMFACTOR INC

Inventor： Igor Y. Khandros ,  Thomas H. Dozier ,  Gary W. Grube ,  Gaetan L. Mathieu

IPC: B23K031/02 ,  H05K003/00 ,  H01R009/00 ,  B21D039/00

CPC classification number: H05K3/4015 ,  G01R1/06744 ,  H01L24/11 ,  H01L24/13 ,  H01L2224/1111 ,  H01L2224/1112 ,  H01L2224/11334 ,  H01L2224/13018 ,  H01L2224/13144 ,  H01L2224/13582 ,  H01L2224/13644 ,  H01L2224/13655 ,  H01L2224/45144 ,  H01L2224/81192 ,  H01L2924/00011 ,  H01L2924/01012 ,  H01L2924/10253 ,  H01L2924/10329 ,  H01L2924/12042 ,  H01L2924/14 ,  H05K2203/049 ,  Y10T29/49146 ,  Y10T29/49147 ,  Y10T29/49149 ,  Y10T29/49204 ,  H01L2924/00012 ,  H01L2224/1134 ,  H01L2924/00014 ,  H01L2924/00 ,  H01L2924/01004

Abstract: Interconnection elements for electronic components, exhibiting desirable mechanical characteristic (such as resiliency, for making pressure contacts) are formed by using a shaping tool (512) to shape an elongate core element (502) of a soft material (such as gold or soft copper wire) to have a springable shape (including cantilever beam, S-shape, U-shape), and overcoating the shaped core element with a hard material (such as nickel and its alloys), to impart to desired spring (resilient) characteristic to the resulting composite interconnection element. A final overcoat of a material having superior electrical qualities (e.g., electrical conductivity and/or solderability) may be applied to the composite interconnection element. The resulting interconnection elements may be mounted to a variety of electronic components, including directly to semiconductor dies and wafers (in which case the overcoat material anchors the composite interconnection element to a terminal (or the like) on the electronic component), may be mounted to support substrates for use as interposers and may be mounted to substrates for use as probe cards or probe card inserts. The shaping tool may be an anvil (622) and a die (624), and may nick or sever successive shaped portions of the elongate elements, and the elongate element may be of an inherently hard (springy) material. Methods of fabricating interconnection elements on sacrificial substrates are described. Methods of fabricating tip structures (258) and contact tips at the end of interconnection elements are also described.

Abstract translation: 通过使用成形工具（512）来形成软质材料（例如金或软铜）的细长芯元件（502），形成用于电子部件的互连元件，其具有期望的机械特性（例如弹性，用于形成压力接触） 电线）具有弹性形状（包括悬臂梁，S形，U形），并用硬质材料（例如镍及其合金）涂覆成形芯元件，以赋予期望的弹簧（弹性）特性 所得到的复合互连元件。 可以对复合互连元件施加具有优异电气质量（例如导电性和/或可焊性）的材料的最终外涂层。 所得到的互连元件可以安装到各种电子部件，包括直接连接到半导体管芯和晶片（在这种情况下，外罩材料将复合互连元件锚定到电子部件上的端子等），可以被安装 以支撑用作内插件的基板，并且可以安装到用作探针卡或探针卡插入件的基板。 成型工具可以是砧座（622）和模具（624），并且可以切割或切断细长元件的连续成形部分，并且细长元件可以是固有的硬（弹性）材料。 描述了在牺牲基板上制造互连元件的方法。 还描述了在互连元件的末端处制造尖端结构（258）和接触尖端的方法。

公开(公告)号：US20020053734A1

公开(公告)日：2002-05-09

申请号：US10034528

申请日：2001-12-27

Applicant: FormFactor, Inc.

Inventor： Benjamin N. Eldridge ,  Gary W. Grube ,  Igor Y. Khandros ,  Gaetan L. Mathieu

IPC: H05K001/00 ,  H01R012/00 ,  H01L023/34 ,  H01R009/00

CPC classification number: B23K20/004 ,  B23K2101/40 ,  C25D5/08 ,  C25D5/22 ,  C25D7/12 ,  C25D21/02 ,  G01R1/07342 ,  G01R1/07378 ,  G01R31/2884 ,  G01R31/2886 ,  H01L21/4853 ,  H01L21/4889 ,  H01L21/563 ,  H01L22/20 ,  H01L23/49811 ,  H01L24/11 ,  H01L24/12 ,  H01L24/16 ,  H01L24/72 ,  H01L24/81 ,  H01L25/0652 ,  H01L25/16 ,  H01L2224/1134 ,  H01L2224/13099 ,  H01L2224/16145 ,  H01L2224/45144 ,  H01L2224/73203 ,  H01L2224/81801 ,  H01L2224/85201 ,  H01L2225/0651 ,  H01L2225/06527 ,  H01L2225/06555 ,  H01L2225/06572 ,  H01L2924/00013 ,  H01L2924/01004 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01012 ,  H01L2924/01013 ,  H01L2924/01015 ,  H01L2924/01019 ,  H01L2924/01022 ,  H01L2924/01027 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01042 ,  H01L2924/01045 ,  H01L2924/01046 ,  H01L2924/01047 ,  H01L2924/01049 ,  H01L2924/0105 ,  H01L2924/01051 ,  H01L2924/01074 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/01322 ,  H01L2924/014 ,  H01L2924/10253 ,  H01L2924/10329 ,  H01L2924/12042 ,  H01L2924/14 ,  H01L2924/1532 ,  H01L2924/15787 ,  H01L2924/19041 ,  H01L2924/30107 ,  H01L2924/3011 ,  H01L2924/3025 ,  H05K1/141 ,  H05K3/20 ,  H05K3/308 ,  H05K3/326 ,  H05K3/3421 ,  H05K3/3426 ,  H05K3/368 ,  H05K3/4015 ,  H05K2201/068 ,  H05K2201/1031 ,  H05K2201/10318 ,  H05K2201/10757 ,  H05K2201/10878 ,  H05K2201/10909 ,  H05K2201/10946 ,  Y02P70/611 ,  Y02P70/613 ,  Y10T29/49155 ,  Y10T29/49222 ,  H01L2924/00

Abstract: A probe card assembly includes a probe card, a space transformer having resilient contact structures (probe elements) mounted directly to (i.e., without the need for additional connecting wires or the like) and extending from terminals on a surface thereof, and an interposer disposed between the space transformer and the probe card. The space transformer and interposer are nullstacked upnull so that the orientation of the space transformer, hence the orientation of the tips of the probe elements, can be adjusted without changing the orientation of the probe card. Suitable mechanisms for adjusting the orientation of the space transformer, and for determining what adjustments to make, are disclosed. The interposer has resilient contact structures extending from both the top and bottom surfaces thereof, and ensures that electrical connections are maintained between the space transformer and the probe card throughout the space transformer's range of adjustment, by virtue of the interposer's inherent compliance. Multiple die sites on a semiconductor wafer are readily probed using the disclosed techniques, and the probe elements can be arranged to optimize probing of an entire wafer. Composite interconnection elements having a relatively soft core overcoated by a relatively hard shell, as the resilient contact structures are described.

公开(公告)号：US20010020743A1

公开(公告)日：2001-09-13

申请号：US09753312

申请日：2000-12-29

Applicant: FormFactor. Inc.

Inventor： Benjamin N. Eldridge ,  Igor Y. Khandros ,  David V. Pedersen ,  Ralph G. Whitten

IPC: H01L023/13 ,  H01L023/528 ,  H01L023/14

CPC classification number: G01R1/07307 ,  G01R31/2884 ,  G01R31/31723 ,  H01L22/32 ,  H01L23/50 ,  H01L23/60 ,  H01L2224/0401 ,  H01L2224/05554 ,  H01L2224/16 ,  H01L2924/00013 ,  H01L2924/01079 ,  H01L2924/10253 ,  H01L2224/29099 ,  H01L2924/00

Abstract: One embodiment of the present invention concerns an integrated circuit that includes bond pads and special contact pads or points. The bond pads are for interfacing the integrated circuit as a whole with an external circuit, and are to be bonded to a package or circuit board. The bond pads are disposed on the die in a predetermined alignment such as a peripheral, grid, or lead-on-center alignment. The special contact pads are used to provide external test patterns to internal circuits and/or to externally monitor results from testing the internal circuits. The special contact pads may be advantageously located on the integrated circuit with a high degree of positional freedom. For one embodiment, the special contact pads may be disposed on the die at a location that is not in the same alignment as the bond pads. The special contact pads may be smaller than the bond pads so as not to increase the die size due to the special contact pads. The special contact points may also be used to externally program internal circuits (e.g., nonvolatile circuits) at the die or package level. The special contact points may also be used to select redundant circuits for faulty circuits.