公开(公告)号：US08339229B2

公开(公告)日：2012-12-25

申请号：US13176763

申请日：2011-07-06

Applicant: Tsung-Chan Wu

Inventor： Tsung-Chan Wu

IPC: H01F27/29

CPC classification number: H05K7/026 ,  H01F3/08 ,  H01F5/00 ,  H01F17/043 ,  H01F27/02 ,  H01F27/24 ,  H01F27/2828 ,  H01F27/29 ,  H01F27/292 ,  H01F37/00 ,  H05K1/18

Abstract: An inductor includes a first core, a conducting wire, a second core and a first lead frame. There is an accommodating space formed on a first side of the first core and there is a recess portion formed on a second side of the first core, wherein the first side is opposite to the second side. The first core has a first height. The conducting wire is disposed in the accommodating space. The second core is disposed on the first side of the first core and covers the accommodating space. The first lead frame has an embedded portion embedded in the recess portion. The embedded portion has a second height. After embedding the embedded portion in the recess portion of the first core, a total height of the embedded portion and the first core is smaller than the sum of the first height and the second height.

Abstract translation: 电感器包括第一芯，导线，第二芯和第一引线框架。 在第一芯体的第一侧上形成有容纳空间，在第一芯体的第二侧形成有凹部，其中第一面与第二面相反。 第一个核心有一个高度。 导线布置在容纳空间中。 第二芯设置在第一芯的第一侧上并覆盖容纳空间。 第一引线框架具有嵌入在凹部中的嵌入部分。 嵌入部分具有第二高度。 在嵌入部分嵌入第一芯部的凹部中之后，嵌入部分和第一芯部的总高度小于第一高度和第二高度之和。

公开(公告)号：US08339218B2

公开(公告)日：2012-12-25

申请号：US12871892

申请日：2010-08-30

Applicant: Chia-Cheng Chuang

Inventor： Chia-Cheng Chuang

IPC: H03H5/00 ,  H03H7/00

CPC classification number: H03H7/42 ,  H03H7/09 ,  H03H7/1775 ,  H03H7/1791

Abstract: By having stages of a single-to-balanced band pass filter, except for a stage which receives a single-terminal signal, to not be coupled to ground, noises cannot have an available path to enter the single-to-balanced band pass filter so that common-mode signals may be reduced in magnitude.

Abstract translation: 通过具有单平衡带通滤波器的级，除了接收单端信号的级，不耦合到地，噪声不能具有进入单平衡带通滤波器的可用路径 使得共模信号的幅度可能会减小。

公开(公告)号：US20120236519A1

公开(公告)日：2012-09-20

申请号：US13485954

申请日：2012-06-01

Applicant: Da-Jung Chen ,  Chun-Tiao Liu ,  BAU-RU LU

Inventor： Da-Jung Chen ,  Chun-Tiao Liu ,  BAU-RU LU

IPC: H05K5/00 ,  H05K3/30

CPC classification number: H05K1/181 ,  H01F27/022 ,  H01F27/027 ,  H01F27/24 ,  H01F27/29 ,  H01F27/40 ,  H01L23/24 ,  H01L23/3121 ,  H01L23/552 ,  H01L23/645 ,  H01L24/73 ,  H01L25/16 ,  H01L2224/32225 ,  H01L2224/48227 ,  H01L2224/73265 ,  H01L2924/1305 ,  H01L2924/13055 ,  H01L2924/13091 ,  H01L2924/181 ,  H01L2924/30107 ,  H01L2924/3025 ,  H05K3/3421 ,  H05K2201/1003 ,  H05K2201/10515 ,  H05K2201/10537 ,  H05K2201/10924 ,  Y02P70/611 ,  Y10T29/49146 ,  H01L2924/00012 ,  H01L2924/00

Abstract: The present invention discloses an electronic package structure. The body has a top surface with a cavity thereon, the first conductive element is disposed in the cavity, and the second conductive element is disposed in the body. The first external electrode electrically connected to the first conductive element and the second external electrode electrically connected to the second conductive element are both disposed on the top surface of the body or a first surface formed by the top surface of the encapsulation compound and the exposed portions of the top surface of the body which are not covered by the encapsulation compound.

Abstract translation: 本发明公开了一种电子封装结构。 本体具有其上具有空腔的顶表面，第一导电元件设置在空腔中，并且第二导电元件设置在主体中。 电连接到第一导电元件的第一外部电极和与第二导电元件电连接的第二外部电极都设置在主体的顶表面上或由封装化合物的顶表面形成的第一表面和暴露部分 的未被封装化合物覆盖的身体的顶表面。

公开(公告)号：US08247891B2

公开(公告)日：2012-08-21

申请号：US12491096

申请日：2009-06-24

Applicant: Chau-Chun Wen ,  Da-Jung Chen ,  Bau-Ru Lu ,  Chun-Hsien Lu

Inventor： Chau-Chun Wen ,  Da-Jung Chen ,  Bau-Ru Lu ,  Chun-Hsien Lu

IPC: H01L23/495 ,  H01L23/10 ,  H01L23/34 ,  H01L23/28

CPC classification number: H01L23/4334 ,  H01L23/3735 ,  H01L23/49531 ,  H01L23/49586 ,  H01L23/62 ,  H01L24/48 ,  H01L25/0655 ,  H01L25/072 ,  H01L2224/48091 ,  H01L2224/48137 ,  H01L2224/48247 ,  H01L2224/73265 ,  H01L2924/00014 ,  H01L2924/09701 ,  H01L2924/1305 ,  H01L2924/13055 ,  H01L2924/13091 ,  H01L2924/1532 ,  H01L2924/181 ,  H01L2924/00 ,  H01L2924/00012 ,  H01L2224/45099 ,  H01L2224/45015 ,  H01L2924/207

Abstract: A chip package structure including a substrate, at least one chip, a plurality of leads, a heat dissipation device, a molding compound, and at least one insulating sheet is provided. The chip is disposed on the substrate. The leads are electrically connected to the substrate. The molding compound having a top surface encapsulates the chip, the substrate, and a portion of the leads. The heat dissipation device is disposed on the top surface of the molding compound. The insulating sheet disposed between the heat dissipation device and at least one of the leads has a bending line dividing the insulating sheet into a main body disposed on the molding compound and a bending portion extending from the main body.

Abstract translation: 提供了包括基板，至少一个芯片，多个引线，散热装置，模塑料和至少一个绝缘片的芯片封装结构。 芯片设置在基板上。 引线电连接到基板。 具有顶表面的模制化合物封装芯片，衬底和引线的一部分。 散热装置设置在模塑料的顶表面上。 布置在散热装置与至少一个引线之间的绝缘片具有将绝缘片划分为设置在模制化合物上的主体和从主体延伸的弯曲部的弯曲线。

公开(公告)号：US08089741B2

公开(公告)日：2012-01-03

申请号：US12509484

申请日：2009-07-26

Applicant: Chung-Hsiung Wang ,  Hung-Ming Lin ,  Kuo-Shu Chen ,  Wen-Shiang Luo

Inventor： Chung-Hsiung Wang ,  Hung-Ming Lin ,  Kuo-Shu Chen ,  Wen-Shiang Luo

IPC: H02H3/20 ,  H02H9/04 ,  H02H7/20

CPC classification number: C25D5/022

Abstract: An over-voltage protection device and a method for manufacturing the over-voltage protection device are provided. The over-voltage protection device includes a substrate, a pair of electrode layers, a mask layer, and a sealing layer. The electrode layers are disposed on the substrate, and a gap is formed between the electrode layers. The mask layer is disposed over the gap and a portion of the electrode layers. The sealing layer covers the mask layer and the gap.

Abstract translation: 提供了一种过电压保护装置和用于制造过电压保护装置的方法。 过电压保护装置包括基板，一对电极层，掩模层和密封层。 电极层设置在基板上，并且在电极层之间形成间隙。 掩模层设置在间隙和电极层的一部分之上。 密封层覆盖掩模层和间隙。

公开(公告)号：US07982304B2

公开(公告)日：2011-07-19

申请号：US12540021

申请日：2009-08-12

Applicant: Bau-Ru Lu ,  Chau-Chun Wen ,  Da-Jung Chen ,  Chun-Hsien Lu

Inventor： Bau-Ru Lu ,  Chau-Chun Wen ,  Da-Jung Chen ,  Chun-Hsien Lu

IPC: H01L23/48

CPC classification number: H01L23/49811 ,  H01L23/36 ,  H01L23/3735 ,  H01L24/45 ,  H01L24/48 ,  H01L24/49 ,  H01L24/73 ,  H01L2224/32225 ,  H01L2224/45144 ,  H01L2224/48091 ,  H01L2224/48137 ,  H01L2224/48227 ,  H01L2224/48247 ,  H01L2224/49 ,  H01L2224/73265 ,  H01L2924/01013 ,  H01L2924/01014 ,  H01L2924/01023 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01074 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/1305 ,  H01L2924/13055 ,  H01L2924/15312 ,  H01L2924/1532 ,  H01L2924/181 ,  H01L2924/1815 ,  H01L2924/00014 ,  H01L2924/00 ,  H01L2924/00012

Abstract: A chip package structure including a substrate, at least one chip, a heat dissipation device, at least one first conductive bar, a molding compound, and at least one second conductive bar is provided. The chip and the heat dissipation device are respectively disposed on a first and a second surface of the substrate. The first conductive bar has two opposite end surfaces, wherein one end surface is disposed on the first surface of the substrate, the other end surface is extended away from the substrate, and a fastening slot is disposed between the two end surfaces and passes through the other end surface. The molding compound encapsulates the substrate, the chip, part of the heat dissipation device, and the first conductive bar. The second conductive bar is disposed on one surface of the molding compound and has a protrusion portion fastened to the fastening slot of the first conductive bar.

Abstract translation: 提供一种芯片封装结构，包括基板，至少一个芯片，散热装置，至少一个第一导电棒，模塑料和至少一个第二导电棒。 芯片和散热装置分别设置在基板的第一和第二表面上。 第一导电棒具有两个相对的端面，其中一个端面设置在基板的第一表面上，另一端表面远离基板延伸，并且紧固槽设置在两个端面之间并穿过 另一端面。 模塑料封装基板，芯片，散热装置的一部分和第一导电棒。 第二导电棒设置在模制化合物的一个表面上，并且具有紧固到第一导电棒的紧固槽的突起部分。

公开(公告)号：US07924112B2

公开(公告)日：2011-04-12

申请号：US12196814

申请日：2008-08-22

Applicant: Ching-Hung Liu ,  Chen-Chung Liu ,  Keng-Hong Wang

Inventor： Ching-Hung Liu ,  Chen-Chung Liu ,  Keng-Hong Wang

IPC: H03H7/42 ,  H01P3/08

CPC classification number: H01P5/10

Abstract: A balun includes a first, second, and third metallic layers, a first dielectric layer disposed between the second and third metallic layers, and a dielectric substrate. The second metallic layer includes a first spiral line having sequentially connected first line segments and a second spiral line having sequentially connected second line segments. A first distance between each two opposite sides of a first region encircled by the innermost first line segments is greater than a second distance between each two adjacent parallel first line segments. A third distance between each two opposite sides of a second region encircled by the innermost second line segments is greater than a fourth distance between each two adjacent parallel second line segments. The third metallic layer includes a third and a fourth spiral lines. The first metallic layer and other elements as a whole are disposed on an opposite surface of the dielectric substrate.

Abstract translation: 平衡 - 不平衡转换器包括第一，第二和第三金属层，设置在第二和第三金属层之间的第一介电层和电介质基板。 第二金属层包括具有顺序连接的第一线段的第一螺旋线和具有顺序连接的第二线段的第二螺旋线。 由最内部的第一线段包围的第一区域的每个两个相对侧之间的第一距离大于每两个相邻的平行的第一线段之间的第二距离。 由最内部第二线段包围的第二区域的每两个相对侧之间的第三距离大于每两个相邻的平行的第二线段之间的第四距离。 第三金属层包括第三和第四螺旋线。 第一金属层和其它元件作为整体设置在电介质基板的相对表面上。

公开(公告)号：US20110057766A1

公开(公告)日：2011-03-10

申请号：US12773152

申请日：2010-05-04

Applicant: Ching-Feng CHEN ,  Kun-Hong SHIH ,  Yen-Ting LIN ,  Yin-Tien YEH

Inventor： Ching-Feng CHEN ,  Kun-Hong SHIH ,  Yen-Ting LIN ,  Yin-Tien YEH

IPC: H01C1/034

CPC classification number: H01C17/006 ,  H01C7/003 ,  H01C7/13 ,  H01C17/02 ,  H01C17/065

Abstract: A surface mount resistor includes a resistance body, a first protective layer, a heat-transfer layer, a second protective layer and two electrode layers. The resistance body has a first end portion, a second end portion and a central portion between the first end portion and the second end portion. The first protective layer is disposed on the central portion of the resistance body, and the first end portion and the second end portion are exposed. The heat-transfer layer is plated on at least part of the resistance body. The second protective layer is disposed on at least part of the heat-transfer layer. The electrode layers are respectively arranged on the first end portion and the second end portion, and electrically connected with the heat-transfer layer.

Abstract translation: 表面贴装电阻器包括电阻体，第一保护层，传热层，第二保护层和两个电极层。 电阻体具有在第一端部和第二端部之间的第一端部，第二端部和中心部。 第一保护层设置在电阻体的中心部分，第一端部和第二端部露出。 传热层被电镀在电阻体的至少一部分上。 第二保护层设置在传热层的至少一部分上。 电极层分别设置在第一端部和第二端部上，与传热层电连接。

公开(公告)号：US20100309638A1

公开(公告)日：2010-12-09

申请号：US12783792

申请日：2010-05-20

Applicant: Da-Jung Chen ,  Chi-Feng Huang ,  Yi-Tsung Chen ,  Huei-Ren You ,  Jeng-Jen Li

Inventor： Da-Jung Chen ,  Chi-Feng Huang ,  Yi-Tsung Chen ,  Huei-Ren You ,  Jeng-Jen Li

IPC: H05K7/02

CPC classification number: H01L23/49861 ,  H01L23/49548 ,  H01L24/16 ,  H01L24/45 ,  H01L24/48 ,  H01L24/49 ,  H01L24/73 ,  H01L2224/32145 ,  H01L2224/32225 ,  H01L2224/32245 ,  H01L2224/45124 ,  H01L2224/45144 ,  H01L2224/45147 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2224/48247 ,  H01L2224/49175 ,  H01L2224/73265 ,  H01L2924/01013 ,  H01L2924/01019 ,  H01L2924/01079 ,  H01L2924/16152 ,  H01L2924/181 ,  H01L2924/3025 ,  H01L2924/00014 ,  H01L2924/00 ,  H01L2224/48145 ,  H01L2924/00012

Abstract: An electronic element packaging module including a lead frame, an insulating layer and at least one electronic element is provided. The lead frame is a patterned metal sheet and has a first surface, a second surface opposite thereto and a through trench passing from the first surface to the second surface. A substrate portion and a plurality of lead portions around the substrate portion of the lead frame are defined by the through trench. The second surface of the lead frame is exposed outside the electronic element packaging module. The insulating layer disposed in the through trench has a third surface and a forth surface substantially coplanar with the first and the second surfaces, respectively. The electronic element disposed on the first surface is coupled to the lead frame.

Abstract translation: 提供了一种包括引线框架，绝缘层和至少一个电子元件的电子元件封装模块。 引线框架是图案化金属片，并且具有第一表面，与其相对的第二表面和从第一表面延伸到第二表面的通孔。 通过沟槽限定引线框架的基板部分周围的基板部分和多个引线部分。 引线框架的第二表面暴露在电子元件封装模块的外部。 布置在通孔中的绝缘层分别具有与第一表面和第二表面大致共面的第三表面和第四表面。 布置在第一表面上的电子元件连接到引线框架。

公开(公告)号：US20100219924A1

公开(公告)日：2010-09-02

申请号：US12709912

申请日：2010-02-22

Applicant: Tsung-Chan Wu ,  Roger Hsieh ,  Yi-Min Huang ,  Lan-Chin Hsieh

Inventor： Tsung-Chan Wu ,  Roger Hsieh ,  Yi-Min Huang ,  Lan-Chin Hsieh

IPC: H01F27/02

CPC classification number: H01F17/045 ,  H01F2017/048

Abstract: An electronic device including a core, at least a wire and a magnetic material is provided. The core includes a pillar, a top board and a bottom board. The pillar is disposed between the top board and the bottom board. An area of the top board is smaller than an area of the bottom board. A winding space is fanned among the top board, the bottom board and the pillar. The wire is winded around the pillar and located in the winding space. The magnetic material fills the winding space to encapsulate the wire. The magnetic material includes a resin and a metallic powder, wherein an average particle diameter of the magnetic powder is smaller than 20 μm.

Abstract translation: 提供了包括芯，至少线和磁性材料的电子设备。 核心包括柱子，顶板和底板。 支柱设置在顶板和底板之间。 顶板的面积小于底板的面积。 在顶板，底板和支柱之间蜿蜒的空间。 电线缠绕在支柱上并位于绕组空间中。 磁性材料填充绕组空间以封装电线。 磁性材料包括树脂和金属粉末，其中磁粉的平均粒径小于20μm。