公开(公告)号：US20080096456A1

公开(公告)日：2008-04-24

申请号：US11955330

申请日：2007-12-12

Applicant: Tae-Ill Yoon ,  Jong-Woon Moon ,  Sung-Hee Cho ,  Sung-Kee Kang ,  Hun-Young Kim ,  Hyun-Jung Lee

Inventor： Tae-Ill Yoon ,  Jong-Woon Moon ,  Sung-Hee Cho ,  Sung-Kee Kang ,  Hun-Young Kim ,  Hyun-Jung Lee

IPC: H01J9/02

CPC classification number: B82Y30/00 ,  B22F1/0007 ,  B22F1/025 ,  B22F9/24 ,  B82Y10/00 ,  H01J1/304 ,  H01J9/025 ,  H01J2201/30446

Abstract: Disclosed is a carbon-based composite particle for an electron emission source comprising: a particle of a material selected from the group consisting of metals, oxides, and ceramic materials; and a carbon-based material such as a carbon nanotube which is partially buried inside of the particle and which partially protrudes from the surface of the particle.

Abstract translation: 公开了一种用于电子发射源的碳基复合颗粒，包括：选自金属，氧化物和陶瓷材料的材料的颗粒; 以及碳粒子等碳系材料，其部分地埋设在粒子的内部，并从粒子的表面部分地突出。

公开(公告)号：US20160197042A1

公开(公告)日：2016-07-07

申请号：US15071452

申请日：2016-03-16

Applicant: EUN-OK LEE ,  Nam-Gun Kim ,  Gyuhwan Oh ,  Heesook Park ,  Hyun-Jung Lee ,  Kyungho Jang

Inventor： EUN-OK LEE ,  Nam-Gun Kim ,  Gyuhwan Oh ,  Heesook Park ,  Hyun-Jung Lee ,  Kyungho Jang

IPC: H01L23/532

CPC classification number: H01L23/5329 ,  H01L21/764 ,  H01L21/7682 ,  H01L21/76831 ,  H01L21/76889 ,  H01L21/76895 ,  H01L21/76897 ,  H01L23/53209 ,  H01L27/10814 ,  H01L27/10823 ,  H01L27/10855 ,  H01L27/10876 ,  H01L27/10888 ,  H01L2924/0002 ,  H01L2924/00

Abstract: A spacer covering a sidewall of a contact plug includes a relatively more damaged first portion and a relatively less damaged second portion. An interface of the first and second portions of the spacer is spaced apart from a metal silicide layer of the contact plug. Thus reliability of the semiconductor device may be improved. Related fabrication methods are also described.

Abstract translation: 覆盖接触塞的侧壁的间隔件包括相对更受损的第一部分和相对较少受损的第二部分。 间隔物的第一和第二部分的界面与接触塞的金属硅化物层间隔开。 因此，可以提高半导体器件的可靠性。 还描述了相关的制造方法。

公开(公告)号：US09214382B2

公开(公告)日：2015-12-15

申请号：US14290620

申请日：2014-05-29

Applicant: Eun-Ok Lee ,  Nam-Gun Kim ,  Gyuhwan Oh ,  Heesook Park ,  Hyun-Jung Lee ,  Kyungho Jang

Inventor： Eun-Ok Lee ,  Nam-Gun Kim ,  Gyuhwan Oh ,  Heesook Park ,  Hyun-Jung Lee ,  Kyungho Jang

IPC: H01L21/764 ,  H01L27/108

CPC classification number: H01L23/5329 ,  H01L21/764 ,  H01L21/7682 ,  H01L21/76831 ,  H01L21/76889 ,  H01L21/76895 ,  H01L21/76897 ,  H01L23/53209 ,  H01L27/10814 ,  H01L27/10823 ,  H01L27/10855 ,  H01L27/10876 ,  H01L27/10888 ,  H01L2924/0002 ,  H01L2924/00

Abstract: A spacer covering a sidewall of a contact plug includes a relatively more damaged first portion and a relatively less damaged second portion. An interface of the first and second portions of the spacer is spaced apart from a metal silicide layer of the contact plug. Thus reliability of the semiconductor device may be improved. Related fabrication methods are also described.

Abstract translation: 覆盖接触塞的侧壁的间隔件包括相对更受损的第一部分和相对较少受损的第二部分。 间隔物的第一和第二部分的界面与接触塞的金属硅化物层间隔开。 因此，可以提高半导体器件的可靠性。 还描述了相关的制造方法。

公开(公告)号：US09159745B2

公开(公告)日：2015-10-13

申请号：US12982406

申请日：2010-12-30

Applicant: Ki-Won Kim ,  Kap-Soo Yoon ,  Do-Hyun Kim ,  Hyun-Jung Lee

Inventor： Ki-Won Kim ,  Kap-Soo Yoon ,  Do-Hyun Kim ,  Hyun-Jung Lee

IPC: H01L27/12 ,  H01L21/02 ,  H01L27/32 ,  H01L29/66

CPC classification number: H01L29/7869 ,  H01L21/02565 ,  H01L27/1225 ,  H01L27/124 ,  H01L27/3262 ,  H01L29/24 ,  H01L29/66765 ,  H01L29/78633

Abstract: A display substrate is provided. The display substrate includes a gate interconnection disposed on an insulating substrate, an oxide semiconductor pattern disposed on the gate interconnection and including an oxide semiconductor, and a data interconnection disposed on the oxide semiconductor pattern to interconnect the gate interconnection. The oxide semiconductor pattern includes a first oxide semiconductor pattern having a first oxide and a first element and a second oxide semiconductor pattern having a second oxide.

Abstract translation: 提供显示基板。 显示基板包括布置在绝缘基板上的栅极互连，设置在栅极互连上并包括氧化物半导体的氧化物半导体图案，以及布置在氧化物半导体图案上以互连栅极互连的数据互连。 氧化物半导体图案包括具有第一氧化物和第一元素的第一氧化物半导体图案以及具有第二氧化物的第二氧化物半导体图案。

公开(公告)号：US09029991B2

公开(公告)日：2015-05-12

申请号：US12927549

申请日：2010-11-16

Applicant: Robert W. Warren ,  Hyun Jung Lee ,  Nic Rossi

Inventor： Robert W. Warren ,  Hyun Jung Lee ,  Nic Rossi

IPC: H01L23/495 ,  H01L21/48 ,  H01L23/00 ,  H01L23/31

CPC classification number: H01L23/49503 ,  H01L21/4828 ,  H01L23/3107 ,  H01L23/49548 ,  H01L24/48 ,  H01L24/97 ,  H01L2224/32013 ,  H01L2224/32245 ,  H01L2224/48091 ,  H01L2224/48247 ,  H01L2224/48465 ,  H01L2224/73265 ,  H01L2224/97 ,  H01L2924/00014 ,  H01L2924/01029 ,  H01L2924/01047 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/014 ,  H01L2924/14 ,  H01L2924/15311 ,  H01L2924/181 ,  H01L2224/85 ,  H01L2224/83 ,  H01L2924/00 ,  H01L2924/00012 ,  H01L2224/45099 ,  H01L2224/45015 ,  H01L2924/207

Abstract: An example semiconductor package with reduced solder voiding is described, which has a leadframe having an I/O pad and a thermal pad, a fabricated semiconductor die having a bond pad, where the fabricated semiconductor die is attached to a top surface of the thermal pad, and a wire bond connecting the bond pad to the I/O pad, where a bottom surface of the thermal pad has channels.

Abstract translation: 描述了具有减少的焊料空隙的示例性半导体封装，其具有具有I / O焊盘和热焊盘的引线框架，具有接合焊盘的制造的半导体管芯，其中所制造的半导体管芯附接到散热焊盘的顶表面 以及将接合焊盘连接到I / O焊盘的引线键合，其中散热焊盘的底表面具有通道。

公开(公告)号：US20130248583A1

公开(公告)日：2013-09-26

申请号：US13532482

申请日：2012-06-25

Applicant: Yun Bog Kim ,  Young Ju Lee ,  Seon Young Myoung ,  Suk Jin Ham ,  Seong Chan Park ,  Hyun Jung Lee

Inventor： Yun Bog Kim ,  Young Ju Lee ,  Seon Young Myoung ,  Suk Jin Ham ,  Seong Chan Park ,  Hyun Jung Lee

IPC: B23K31/12 ,  H04N7/18

CPC classification number: B23K1/008 ,  B23K3/08 ,  H01L21/0273 ,  H05K3/3484 ,  H05K2203/043

Abstract: Disclosed herein is a reflow inspection system. The reflow inspection system according to an embodiment of the present invention includes an oven, a stage on which a reflow inspection target is placed inside the oven, and which includes a temperature detecting sensor for detecting a temperature of the reflow inspection target formed on one side thereof; a light source unit formed on one side of the oven and irradiating the reflow inspection target with light, an imaging unit sucking smoke generated in the reflow inspection target, and obtaining image information of the reflow inspection target to thereby transmit the obtained image information to the outside, an image processing unit processing the image information obtained in the imaging unit, and a control unit connected to the stage, the temperature detecting sensor, and the image processing unit to perform control of a reflow inspection process.

Abstract translation: 这里公开了回流检查系统。 根据本发明实施例的回流检查系统包括炉子，在炉内放置回流检查对象的台，并且包括用于检测形成在一侧的回流检查对象的温度的温度检测传感器 的; 光源单元，其形成在烤箱的一侧，用光照射回流检查对象;成像单元，吸入在回流检查对象物中产生的烟雾，得到回流检查对象的图像信息，从而将获得的图像信息发送到 外部，处理在摄像单元中获得的图像信息的图像处理单元，以及与该台连接的控制单元，温度检测传感器和图像处理单元，以执行回流检查处理的控制。

公开(公告)号：US08455990B2

公开(公告)日：2013-06-04

申请号：US12713141

申请日：2010-02-25

Applicant: Robert W Warren ,  Hyun Jung Lee ,  Nic Rossi

Inventor： Robert W Warren ,  Hyun Jung Lee ,  Nic Rossi

IPC: H01L23/58 ,  H01L21/50

CPC classification number: H01L24/33 ,  H01L23/576 ,  H01L24/45 ,  H01L24/48 ,  H01L24/49 ,  H01L24/73 ,  H01L2224/32225 ,  H01L2224/45124 ,  H01L2224/45144 ,  H01L2224/45147 ,  H01L2224/48095 ,  H01L2224/48227 ,  H01L2224/49 ,  H01L2224/73265 ,  H01L2924/01005 ,  H01L2924/01013 ,  H01L2924/01014 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/0105 ,  H01L2924/01056 ,  H01L2924/01074 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/014 ,  H01L2924/10253 ,  H01L2924/14 ,  H01L2924/15311 ,  H01L2924/181 ,  H01L2924/19042 ,  H01L2924/19107 ,  H01L2924/30107 ,  H01L2924/00014 ,  H01L2924/3512 ,  H01L2924/00 ,  H01L2924/00012

Abstract: A barrier layer can be attached in a semiconductor package to one or more sensitive devices. The barrier layer can be used to obstruct tampering by a malicious agent attempting to access sensitive information on the sensitive device. The barrier layer can cause the sensitive device to become inoperable if physically tampered. Additional other aspects of the protective packaging provide protection against x-ray and thermal probing as well as chemical and electrical tampering attempts.

Abstract translation: 阻挡层可以在半导体封装中附接到一个或多个敏感器件。 阻挡层可用于阻止恶意代理人尝试访问敏感设备上的敏感信息的篡改。 如果物理篡改，屏障层可能导致敏感设备变得不可操作。 保护性包装的其他方面提供了对X射线和热探测以及化学和电气篡改尝试的保护。

公开(公告)号：US20120256123A1

公开(公告)日：2012-10-11

申请号：US13524573

申请日：2012-06-15

Applicant: Jaephil CHO ,  Youn-Han CHANG ,  Sang-Hoon JEON ,  Hyun-Jung LEE

Inventor： Jaephil CHO ,  Youn-Han CHANG ,  Sang-Hoon JEON ,  Hyun-Jung LEE

IPC: H01M4/525

CPC classification number: H01M4/5825 ,  H01M4/366 ,  H01M4/505 ,  H01M4/525 ,  H01M10/0525

Abstract: The present invention relates to a positive active material for a rechargeable lithium battery, a method of preparing the same, and a rechargeable lithium battery including the same. More particularly, the present invention relates to a positive active material for a rechargeable lithium battery including a compound that can reversibly intercalate/deintercalate lithium and a lithium metal phosphate produced through binding with lithium of the compoound, the lithium metal phosphate existing from the surface of the compound to a predetermined depth, a method of preparing the positive active material, and a rechargeable lithium battery having the positive active material. The positive active material can accomplish excellent cycle-life characteristic and also, suppress battery swelling at a high temperature.

Abstract translation: 本发明涉及一种用于可再充电锂电池的正极活性材料及其制备方法，以及包含该锂二次电池的可再充电锂电池。 更具体地说，本发明涉及一种用于可再充电锂电池的正极活性材料，其包括可逆地插入/脱嵌锂的化合物和通过与所述组合物的锂结合而产生的锂金属磷酸盐，所述锂金属磷酸盐从 化合物至预定深度，制备正极活性物质的方法，以及具有正极活性物质的可再充电锂电池。 正极活性物质可以实现优异的循环寿命特性，并且还抑制高温下的电池膨胀。

公开(公告)号：US20120163026A1

公开(公告)日：2012-06-28

申请号：US13181540

申请日：2011-07-13

Applicant: MYOUNG-HA JEON ,  Yeun-Mo Yeon ,  Hyun-Jung Lee

Inventor： MYOUNG-HA JEON ,  Yeun-Mo Yeon ,  Hyun-Jung Lee

IPC: F21V8/00 ,  F21V21/00 ,  F21V15/01

CPC classification number: G02B6/0073 ,  G02B6/0083 ,  H01L33/486 ,  H01L33/62 ,  H01L2224/48091 ,  H01L2224/48247 ,  H01L2224/48257 ,  H01L2224/49109 ,  H01L2924/00014

Abstract: A light-emitting diode (“LED”) package includes a light-emitting chip, a case, first and second lead frames and a dummy lead frame. The light-emitting chip generates light. The case includes a bottom portion and a plurality of sidewalls, wherein the light-emitting chip is positioned in the case. The first and second lead frames are spaced apart from each other and are electrically connected to the light-emitting chip. The dummy lead frame is spaced apart from the light-emitting chip and the first and second lead frames, and is electrically isolated from the light-emitting chip and the first and second lead frames. The dummy lead frame is used as a wiring for connecting the LED package to another LED package, so that the number of signal wirings or a length of a signal wiring may be decreased, and a manufacturing cost of the LED package may be reduced.

Abstract translation: 发光二极管（“LED”）封装包括发光芯片，壳体，第一和第二引线框架以及虚拟引线框架。 发光芯片产生光。 壳体包括底部和多个侧壁，其中发光芯片位于壳体中。 第一引线框架和第二引线框架彼此间隔开并且电连接到发光芯片。 虚拟引线框架与发光芯片和第一引线框架和第二引线框架间隔开，并且与发光芯片和第一引线框架和第二引线框架电隔离。 虚拟引线框架用作将LED封装连接到另一个LED封装的布线，从而可以减少信号布线的数量或信号布线的长度，并且可以降低LED封装的制造成本。

公开(公告)号：US20120119341A1

公开(公告)日：2012-05-17

申请号：US12927549

申请日：2010-11-16

Applicant: Robert W. Warren ,  Hyun Jung Lee ,  Nic Rossi

Inventor： Robert W. Warren ,  Hyun Jung Lee ,  Nic Rossi

IPC: H01L23/495 ,  H01L21/50

CPC classification number: H01L23/49503 ,  H01L21/4828 ,  H01L23/3107 ,  H01L23/49548 ,  H01L24/48 ,  H01L24/97 ,  H01L2224/32013 ,  H01L2224/32245 ,  H01L2224/48091 ,  H01L2224/48247 ,  H01L2224/48465 ,  H01L2224/73265 ,  H01L2224/97 ,  H01L2924/00014 ,  H01L2924/01029 ,  H01L2924/01047 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/014 ,  H01L2924/14 ,  H01L2924/15311 ,  H01L2924/181 ,  H01L2224/85 ,  H01L2224/83 ,  H01L2924/00 ,  H01L2924/00012 ,  H01L2224/45099 ,  H01L2224/45015 ,  H01L2924/207

Abstract: An example semiconductor package with reduced solder voiding is described, which has a leadframe having an I/O pad and a thermal pad, a fabricated semiconductor die having a bond pad, where the fabricated semiconductor die is attached to a top surface of the thermal pad, and a wire bond connecting the bond pad to the I/O pad, where a bottom surface of the thermal pad has channels.

Abstract translation: 描述了具有减少的焊料空隙的示例性半导体封装，其具有具有I / O焊盘和热焊盘的引线框架，具有接合焊盘的制造的半导体管芯，其中所制造的半导体管芯附接到散热焊盘的顶表面 以及将接合焊盘连接到I / O焊盘的引线键合，其中散热焊盘的底表面具有通道。