公开(公告)号：US20100216303A1

公开(公告)日：2010-08-26

申请号：US12774302

申请日：2010-05-05

申请人： Yoshiyuki Ohkura

发明人： Yoshiyuki Ohkura

IPC分类号： H01L21/768 ,  H01L21/02

CPC分类号： H01L23/53295 ,  H01L21/02126 ,  H01L21/02203 ,  H01L21/02282 ,  H01L21/02304 ,  H01L21/0234 ,  H01L21/02348 ,  H01L21/02362 ,  H01L21/31695 ,  H01L21/76807 ,  H01L21/76825 ,  H01L21/76826 ,  H01L21/76835 ,  H01L23/53238 ,  H01L23/5329 ,  H01L2924/0002 ,  H01L2924/00

摘要： A semiconductor device manufacture method has the steps of: (a) coating a low dielectric constant low-level insulating film above a semiconductor substrate formed with a plurality of semiconductor elements; (b) processing the low-level insulating film to increase a mechanical strength of the low-level insulating film; (c) coating a low dielectric constant high-level insulating film above the low-level insulating film; and (d) forming a buried wiring including a wiring pattern in the high-level insulating film and a via conductor in the low-level insulating film. The low-level insulating film and high-level insulating film are made from the same material. The process of increasing the mechanical strength includes an ultraviolet ray irradiation process or a hydrogen plasma applying process.

摘要翻译： 半导体器件制造方法的步骤为：（a）在形成有多个半导体元件的半导体衬底上涂覆低介电常数低电平绝缘膜; （b）处理低级绝缘膜以增加低级绝缘膜的机械强度; （c）在低级绝缘膜之上涂覆低介电常数高级绝缘膜; 以及（d）在高级绝缘膜中形成包括布线图案的掩埋布线和低级绝缘膜中的通路导体。 低级绝缘膜和高级绝缘膜由相同的材料制成。 增加机械强度的过程包括紫外线照射过程或氢等离子体施加过程。

公开(公告)号：US07749897B2

公开(公告)日：2010-07-06

申请号：US12219271

申请日：2008-07-18

申请人： Ken Sugimoto ,  Yoshiyuki Ohkura ,  Hirofumi Watatani ,  Tamotsu Owada ,  Shunn-ichi Fukuyama

发明人： Ken Sugimoto ,  Yoshiyuki Ohkura ,  Hirofumi Watatani ,  Tamotsu Owada ,  Shunn-ichi Fukuyama

IPC分类号： H01L21/4763

CPC分类号： H01L21/76829 ,  H01L21/76808

摘要： A method of manufacturing a semiconductor device comprising a wiring structure that includes a vertical wiring section is disclosed. The method comprises a step of forming an interlayer insulation film made of a low dielectric constant material on a wiring layer, a step of forming a silicon oxide film by CVD using SiH4 gas and CO2 gas on the interlayer insulation film, a step of forming a chemically amplified resist film to cover the silicon oxide film, and a step of forming a first opening in a position on the chemically amplified resist film where the vertical wiring section is to be formed.

摘要翻译： 公开了一种制造包括垂直布线部分的布线结构的半导体器件的方法。 该方法包括在布线层上形成由低介电常数材料制成的层间绝缘膜的步骤，通过在层间绝缘膜上使用SiH 4气体和CO 2气体通过CVD形成氧化硅膜的步骤，形成 化学放大抗蚀剂膜覆盖氧化硅膜，以及在要形成垂直布线部分的化学放大抗蚀剂膜上的位置形成第一开口的步骤。

公开(公告)号：US5691237A

公开(公告)日：1997-11-25

申请号：US455521

申请日：1995-05-31

申请人： Yoshiyuki Ohkura ,  Hideki Harada ,  Tadasi Oshima

发明人： Yoshiyuki Ohkura ,  Hideki Harada ,  Tadasi Oshima

IPC分类号： H01L21/3105 ,  H01L21/316 ,  H01L21/768

CPC分类号： H01L21/31053 ,  H01L21/31051 ,  H01L21/316 ,  H01L21/76819 ,  Y10S148/025

摘要： A semiconductor substrate 11 having concavities and convexities in the upper surface, and silica particles (granular insulators) 15 provided in the concavities to planarize the entire upper surface of the semiconductor substrate 11 are included. First, the silica particles 15 are laid over an upper surface of a semiconductor substrate 11 to provide the granular insulators 15 in cavities in the upper surface of the semiconductor substrate 11, and the silica particles 15 provided on convexities on the upper surface of the semiconductor substrate 11 are removed, whereby the concavities 11 are buried with the silica particles 15 so as to improve global planarizarion.

摘要翻译： 包括在上表面具有凹凸的半导体衬底11和设置在凹凸中的平面化半导体衬底11的整个上表面的二氧化硅颗粒（颗粒绝缘体）15。 首先，将二氧化硅粒子15放置在半导体基板11的上表面上，在半导体基板11的上表面的空腔内形成粒状绝缘体15，在半导体基板11的上表面设置凸部的二氧化硅粒子15 去除基板11，由此凹部11与二氧化硅颗粒15一起被掩埋，以改善全局平面度。

公开(公告)号：US5602060A

公开(公告)日：1997-02-11

申请号：US582808

申请日：1996-01-04

申请人： Michiko Kobayashi ,  Syun-ichi Fukuyama ,  Yoshihiro Nakata ,  Masanori Naitou ,  Hiroshi Kudo ,  Yoshiyuki Ohkura

发明人： Michiko Kobayashi ,  Syun-ichi Fukuyama ,  Yoshihiro Nakata ,  Masanori Naitou ,  Hiroshi Kudo ,  Yoshiyuki Ohkura

IPC分类号： C01B33/12 ,  C08G77/12 ,  C09D183/16 ,  C23C18/12 ,  C30B29/06 ,  H01L21/312 ,  H01L21/316 ,  H01L21/768 ,  H01L23/29 ,  H01L23/522 ,  B05D3/02

CPC分类号： C23C18/1212 ,  C09D183/16 ,  C23C18/122 ,  C23C18/1279 ,  H01L21/312 ,  H01L21/316 ,  H01L23/296 ,  H01L2924/0002

摘要： Process for the production of semiconductor devices comprising the steps of applying a solution of the specified polycarbosilane in a solvent onto a substrate having electrically conductive components fabricated therein, and curing the coated layer of the polycarbosilane at a temperature of not less than 350.degree. C. in an oxidizing atmosphere to thereby covert the polycarbosilane layer to a silicon oxide layer. The resulting silicon oxide layer has a planarized surface and has no cracking and accordingly is useful as a dielectric layer and a protective layer in the production of semiconductor devices having a high reliability.

摘要翻译： 制造半导体器件的方法包括以下步骤：将特定的聚碳硅烷溶液溶解在其上制备导电组分的基片上，并在不低于350℃的温度下固化聚碳硅烷的涂层。 在氧化气氛中，将聚碳硅烷层转变成氧化硅层。 所得到的氧化硅层具有平坦化的表面，并且没有破裂，因此在制造具有高可靠性的半导体器件中可用作介电层和保护层。

公开(公告)号：US08716148B2

公开(公告)日：2014-05-06

申请号：US13070740

申请日：2011-03-24

申请人： Yoshiyuki Ohkura ,  Toshiki Mori

发明人： Yoshiyuki Ohkura ,  Toshiki Mori

IPC分类号： H01L21/311 ,  H01L21/3205

CPC分类号： H01L21/02126 ,  H01L21/02271 ,  H01L21/0234 ,  H01L21/02348 ,  H01L21/3105 ,  H01L21/76808 ,  H01L21/76825 ,  H01L21/76826

摘要： A semiconductor device manufacturing method includes forming an insulation film containing silicon, oxygen and carbon over a semiconductor substrate by chemical vapor deposition; making UV cure on the insulation film being heated at a temperature of 350° C. or below after the forming the insulation film; and making helium plasma processing on the insulation film after the UV cure.

摘要翻译： 半导体器件制造方法包括通过化学气相沉积在半导体衬底上形成含有硅，氧和碳的绝缘膜; 在形成绝缘膜之后，在350℃以下的温度下对绝缘膜进行UV固化; 并在UV固化后对绝缘膜进行氦等离子体处理。

公开(公告)号：US20100051324A1

公开(公告)日：2010-03-04

申请号：US11917445

申请日：2006-06-20

申请人： Vincent Yong Chin Lee ,  Yi Liang Fu ,  Tatsunori Koyanagi ,  Yoshiyuki Ohkura ,  Masahiko Ito

发明人： Vincent Yong Chin Lee ,  Yi Liang Fu ,  Tatsunori Koyanagi ,  Yoshiyuki Ohkura ,  Masahiko Ito

IPC分类号： H05K1/02 ,  G03F7/20

CPC分类号： H05K3/002 ,  H05K1/028 ,  H05K2201/0166 ,  H05K2201/0191 ,  H05K2201/09036 ,  H05K2203/1184

摘要： An aspect of the present invention comprises a method of forming holes in a dielectric substrate comprising the steps of applying a layer of photoresist to a dielectric substrate, exposing portions of the photoresist to actinic radiation through a photomask to form a pattern in the photoresist for an array of holes to be etched in the substrate, developing the photoresist, etching the dielectric substrate to form an array of holes, each hole extending at least partially through the dielectric substrate, and removing the excess photoresist. Another aspect of the present invention is a method of simultaneously forming holes in a dielectric substrate some of which extend partially through the substrate and some of which extend completely through the substrate. Other aspects of the present invention are dielectric substrates formed using the methods of the invention.

摘要翻译： 本发明的一个方面包括一种在电介质衬底中形成孔的方法，包括以下步骤：将光致抗蚀剂层施加到电介质衬底上，将光致抗蚀剂的部分暴露于通过光掩模的光化辐射，以在光致抗蚀剂中形成图案， 在衬底中蚀刻的孔的阵列，显影光致抗蚀剂，蚀刻电介质衬底以形成孔阵列，每个孔至少部分延伸穿过电介质衬底，以及去除多余的光致抗蚀剂。 本发明的另一方面是在电介质基板中同时形成空穴的方法，其中一些部分延伸穿过基底，其中一些完全延伸穿过基底。 本发明的其它方面是使用本发明的方法形成的电介质基片。

公开(公告)号：US20070200235A1

公开(公告)日：2007-08-30

申请号：US11451506

申请日：2006-06-13

申请人： Yoshiyuki Ohkura

发明人： Yoshiyuki Ohkura

IPC分类号： H01L23/48

CPC分类号： H01L23/53295 ,  H01L21/02126 ,  H01L21/02203 ,  H01L21/02282 ,  H01L21/02304 ,  H01L21/0234 ,  H01L21/02348 ,  H01L21/02362 ,  H01L21/31695 ,  H01L21/76807 ,  H01L21/76825 ,  H01L21/76826 ,  H01L21/76835 ,  H01L23/53238 ,  H01L23/5329 ,  H01L2924/0002 ,  H01L2924/00

摘要： A semiconductor device manufacture method has the steps of:(a) coating a low dielectric constant low-level insulating film above a semiconductor substrate formed with a plurality of semiconductor elements; (b) processing the low-level insulating film to increase a mechanical strength of the low-level insulating film; (c) coating a low dielectric constant high-level insulating film above the low-level insulating film; and (d) forming a buried wiring including a wiring pattern in the high-level insulating film and a via conductor in the low-level insulating film. The low-level insulating film and high-level insulating film are made from the same material. The process of increasing the mechanical strength includes an ultraviolet ray irradiation process or a hydrogen plasma applying process.

摘要翻译： 半导体器件制造方法的步骤为：（a）在形成有多个半导体元件的半导体衬底上涂覆低介电常数低电平绝缘膜; （b）处理低级绝缘膜以增加低级绝缘膜的机械强度; （c）在低级绝缘膜之上涂覆低介电常数高级绝缘膜; 以及（d）在高级绝缘膜中形成包括布线图案的掩埋布线和低级绝缘膜中的通路导体。 低级绝缘膜和高级绝缘膜由相同的材料制成。 增加机械强度的过程包括紫外线照射过程或氢等离子体施加过程。

公开(公告)号：US5976703A

公开(公告)日：1999-11-02

申请号：US662233

申请日：1996-06-14

申请人： Yoshihiro Nakata ,  Shyun-ichi Fukuyama ,  Michiko Katayama ,  Joe Yamaguchi ,  Hideki Harada ,  Yoshiyuki Ohkura

发明人： Yoshihiro Nakata ,  Shyun-ichi Fukuyama ,  Michiko Katayama ,  Joe Yamaguchi ,  Hideki Harada ,  Yoshiyuki Ohkura

IPC分类号： C08G77/52 ,  C08G77/48 ,  C08L83/14 ,  H01L21/3205 ,  H01L21/48 ,  H01L21/768 ,  H01L23/498 ,  H05K1/00 ,  H05K3/46 ,  B32B9/04

CPC分类号： H01L21/481 ,  C08L83/14 ,  H01L23/49894 ,  H01L2924/0002 ,  H05K3/4676 ,  Y10S428/901 ,  Y10T428/31663

摘要： A material and a method for planarizing an uneven surface of a substrate, such as those used for making wiring boards and electronic devices and having broad patterns on their surfaces, are provided. The material is a polysilphenylenesiloxane or a copolymer of polysilphenylenesiloxane with an organosiloxane, and is applied to an uneven surface of a substrate, and then heated to be reflowed to thereby be formed into a planarized film or layer. The material allows a substrate containing wiring having a width of up to several hundred micrometers to be planarized.

摘要翻译： 提供了用于平面化基板的不平坦表面的材料和方法，例如用于制造布线板和电子设备并且在其表面上具有宽图案的那些的不平坦表面的方法。 该材料是聚苯基苯基硅氧烷或聚苯基苯基硅氧烷与有机硅氧烷的共聚物，并施加到基板的不平坦表面上，然后加热回流以形成平坦化的膜或层。 该材料允许将宽度高达几百微米的布线的基板平坦化。

公开(公告)号：US5448111A

公开(公告)日：1995-09-05

申请号：US278953

申请日：1994-07-22

申请人： Yoshiyuki Ohkura ,  Hideki Harada

发明人： Yoshiyuki Ohkura ,  Hideki Harada

IPC分类号： H01L21/3105 ,  H01L21/316 ,  H01L21/768 ,  H01L29/40 ,  H01L29/34

CPC分类号： H01L21/31053 ,  H01L21/31051 ,  H01L21/316 ,  H01L21/76819 ,  Y10S148/025

摘要： A semiconductor substrate 11 having concavities and convexities in the upper surface, and silica particles (granular insulators) 15 provided in the concavities to planarize the entire upper surface of the semiconductor substrate 11 are included. First, the silica particles 15 are laid over an upper surface of a semiconductor substrate 11 to provide the granular insulators 15 in cavities in the upper surface of the semiconductor substrate 11, and the silica particles 15 provided on convexities on the upper surface of the semiconductor substrate 11 are removed, whereby the concavities 11 are buried with the silica particles 15 so as to improve global planarizarion.

摘要翻译： 包括在上表面具有凹凸的半导体衬底11和设置在凹凸中的平面化半导体衬底11的整个上表面的二氧化硅颗粒（颗粒绝缘体）15。 首先，将二氧化硅粒子15放置在半导体基板11的上表面上，在半导体基板11的上表面的空腔内形成粒状绝缘体15，在半导体基板11的上表面设置凸部的二氧化硅粒子15 去除基板11，由此凹部11与二氧化硅颗粒15一起被掩埋，以改善全局平面度。