公开(公告)号：US10388509B2

公开(公告)日：2019-08-20

申请号：US15627189

申请日：2017-06-19

Applicant: ASM IP Holding B.V.

Inventor： Joe Margetis ,  John Tolle

IPC: H01L21/02 ,  H01L29/161 ,  H01L21/67 ,  H01L21/768

Abstract: A process for forming a thick defect-free epitaxial layer is disclosed. The process may comprise forming a buffer layer and a sacrificial layer prior to forming the thick defect-free epitaxial layer. The sacrificial layer and the thick defect-free epitaxial layer may be formed of the same material and at the same process conditions.

公开(公告)号：US20190027584A1

公开(公告)日：2019-01-24

申请号：US16000156

申请日：2018-06-05

Applicant: ASM IP Holding B.V.

Inventor： Joe Margetis ,  John Tolle

IPC: H01L29/66 ,  H01L29/78 ,  H01L29/165 ,  H01L29/167 ,  H01L29/08 ,  H01L29/45 ,  H01L23/535 ,  H01L21/02 ,  H01L21/285

Abstract: A method for selectively depositing a Group IV semiconductor on a surface of a substrate is disclosed. The method may include, providing a substrate within a reaction chamber and heating the substrate to a deposition temperature. The method may further include, exposing the substrate to at least one Group IV precursor, and exposing the substrate to at least one Group IIIA halide dopant precursor. Semiconductor device structures including a Group IV semiconductor deposited by the methods of the disclosure are also provided.

公开(公告)号：US20180363139A1

公开(公告)日：2018-12-20

申请号：US15962980

申请日：2018-04-25

Applicant: ASM IP Holding B.V.

Inventor： Shiva Rajavelu ,  John Tolle ,  Rich McCartney

IPC: C23C16/46 ,  C23C16/458

Abstract: A semiconductor processing apparatus is disclosed. The semiconductor processing apparatus may include: a reaction chamber comprising an upper chamber wall and a lower chamber wall connected by vertical sidewalls, the chamber walls being joined by an upstream inlet flange and a downstream outlet flange wherein a longitudinal direction of the chamber extends from the inlet flange to the outlet flange and a plurality of ribs provided on an outer surface of at least the upper chamber wall, the plurality of ribs being orientated transversely to the longitudinal direction of the chamber. The semiconductor processing apparatus may also include at least one array of heating elements disposed above the reaction chamber and at least one variable positioning device coupled to the at least one array of heating elements and configured to controllably adjust the position of the at least one array of heating elements relative to the position of the plurality of ribs. Methods of calibrating a semiconductor processing apparatus are also disclosed.

公开(公告)号：US20170372884A1

公开(公告)日：2017-12-28

申请号：US15627189

申请日：2017-06-19

Applicant: ASM IP Holding B.V.

Inventor： Joe Margetis ,  John Tolle

IPC: H01L21/02 ,  H01L21/67 ,  H01L21/768

CPC classification number: H01L21/02005 ,  H01L21/0245 ,  H01L21/02452 ,  H01L21/02502 ,  H01L21/02507 ,  H01L21/02532 ,  H01L21/02535 ,  H01L21/0262 ,  H01L21/67167 ,  H01L21/7688 ,  H01L29/161

Abstract: A process for forming a thick defect-free epitaxial layer is disclosed. The process may comprise forming a buffer layer and a sacrificial layer prior to forming the thick defect-free epitaxial layer. The sacrificial layer and the thick defect-free epitaxial layer may be formed of the same material and at the same process conditions.

公开(公告)号：US09793115B2

公开(公告)日：2017-10-17

申请号：US15203642

申请日：2016-07-06

Applicant: ASM IP HOLDING, B.V.

Inventor： John Tolle

IPC: H01L21/20 ,  H01L21/02 ,  H01L31/0745 ,  H01L31/18 ,  H01L29/165 ,  C30B25/18 ,  C30B29/52 ,  H01L29/161

CPC classification number: H01L21/02535 ,  C30B25/183 ,  C30B29/52 ,  H01L21/02381 ,  H01L21/0245 ,  H01L21/02532 ,  H01L21/02576 ,  H01L21/02579 ,  H01L21/0262 ,  H01L29/161 ,  H01L29/165 ,  H01L31/0745 ,  H01L31/1812 ,  Y02E10/50

Abstract: Methods of forming germanium-tin films using germane as a precursor are disclosed. Exemplary methods include growing films including germanium and tin in an epitaxial chemical vapor deposition reactor, wherein a ratio of a tin precursor to germane is less than 0.1. Also disclosed are structures and devices including germanium-tin films formed using the methods described herein.

公开(公告)号：US20160362783A1

公开(公告)日：2016-12-15

申请号：US14738012

申请日：2015-06-12

Applicant: ASM IP HOLDING B.V.

Inventor： John Tolle ,  Eric Hill

IPC: C23C16/44 ,  C23C16/458 ,  H05B6/10 ,  C23C16/46

CPC classification number: C23C16/4405 ,  C23C14/021 ,  C23C14/50 ,  C23C16/0209 ,  C23C16/0218 ,  C23C16/458 ,  C23C16/4582 ,  C23C16/46 ,  H05B3/26 ,  H05B6/105

Abstract: A reactor system and related methods are provided which may include a heating element in a wafer tray. The heating element may be used to heat the wafer tray and a substrate or wafer seated on the wafer tray within a reaction chamber assembly, and may be used to cause sublimation of a native oxide of the wafer.

Abstract translation: 提供了反应器系统和相关方法，其可以包括在晶片托盘中的加热元件。 加热元件可用于加热晶片托盘和位于反应室组件内的晶片托盘上的基片或晶片，并可用于引起晶片的天然氧化物的升华。

公开(公告)号：US09514927B2

公开(公告)日：2016-12-06

申请号：US15083136

申请日：2016-03-28

Applicant: ASM IP HOLDING B.V.

Inventor： John Tolle ,  Matthew G. Goodman ,  Robert Michael Vyne ,  Eric R. Hill

IPC: H01L21/02 ,  H01L21/32 ,  H01L21/3205 ,  H01L21/324 ,  H01L21/311 ,  B08B5/00 ,  B08B7/00 ,  C30B23/02 ,  C30B25/18 ,  C30B29/06

CPC classification number: H01L21/02049 ,  B08B5/00 ,  B08B7/0014 ,  B08B7/0071 ,  C30B23/025 ,  C30B25/186 ,  C30B29/06 ,  H01L21/02046 ,  H01L21/02068 ,  H01L21/0217 ,  H01L21/02301 ,  H01L21/02348 ,  H01L21/02532 ,  H01L21/02598 ,  H01L21/02636 ,  H01L21/02661 ,  H01L21/31116 ,  H01L21/3205 ,  H01L21/324

Abstract: A method for integrated circuit fabrication can include removing silicon oxide by a pre-clean process. The pre-clean process can include depositing a halogen-containing material on the surface of a substrate in a first reaction chamber, and transferring the substrate having the halogen-containing material to a second reaction chamber. Silicon oxide material can be removed from a surface of the substrate by sublimating the halogen-containing material in the second reaction chamber. A target material, such as a conductive material, may subsequently be deposited on the substrate surface in the second reaction chamber.

Abstract translation: 用于集成电路制造的方法可以包括通过预清洁工艺去除氧化硅。 预清洁方法可以包括在第一反应室中在基材的表面上沉积含卤素的材料，并将具有含卤素材料的基材转移到第二反应室。 氧化硅材料可以通过升华第二反应室中的含卤物质从基板的表面去除。 诸如导电材料的目标材料随后可以沉积在第二反应室中的基板表面上。

公开(公告)号：US20160192502A1

公开(公告)日：2016-06-30

申请号：US14586438

申请日：2014-12-30

Applicant: ASM IP HOLDING B.V.

Inventor： John Tolle ,  Matthew G. Goodman

IPC: H05K3/00

CPC classification number: H01L21/0206 ,  B05D3/002 ,  B05D3/02 ,  B05D3/04 ,  B05D3/0433 ,  H01L21/02041 ,  H01L21/02046 ,  H01L21/306

Abstract: In some embodiments, a method for integrated circuit fabrication includes removing oxide material from a surface of a substrate, where the surface includes silicon and germanium. Removing the oxide material includes depositing a halogen-containing pre-clean material on a silicon oxide-containing surface and sublimating a portion of the halogen-containing pre-clean material to expose the silicon on the surface. A passivation film is deposited on the exposed silicon. The passivation film may include chlorine. The passivation film may prevent contamination of the silicon surface by chemical species from the later sublimation, which may be at a higher temperature than the earlier sublimation. Subsequently, a remaining portion of the halogen-containing pre-clean material and the passivation film are sublimated. A target material, such as a conductive material, may subsequently be deposited on the substrate surface.

Abstract translation: 在一些实施例中，用于集成电路制造的方法包括从衬底的表面去除氧化物材料，其中表面包括硅和锗。 除去氧化物材料包括将含卤素的预清洁材料沉积在含氧化硅的表面上并升华部分含卤素的预清洁材料以暴露表面上的硅。 钝化膜沉积在暴露的硅上。 钝化膜可以包括氯。 钝化膜可以防止来自稍后升华的化学物质对硅表面的污染，其可能处于比先前的升华更高的温度。 随后，将含卤素预清洁材料和钝化膜的剩余部分升华。 可以随后将诸如导电材料的靶材料沉积在衬底表面上。

公开(公告)号：US20160051964A1

公开(公告)日：2016-02-25

申请号：US14465252

申请日：2014-08-21

Applicant: ASM IP Holding B.V.

Inventor： John Tolle ,  Eric Hill ,  Jereld Lee Winkler

IPC: B01J19/24 ,  C23C16/455 ,  C23C16/46 ,  C23C16/52 ,  H01J37/32 ,  B01J19/00 ,  C23C16/50

CPC classification number: C23C16/46 ,  C23C16/452 ,  C23C16/50 ,  C23C16/52 ,  H01J37/32357 ,  H01J37/32422 ,  H01J37/3244 ,  H01J37/32816

Abstract: A system and method for providing intermediate reactive species to a reaction chamber are disclosed. The system includes an intermediate reactive species formation chamber fluidly coupled to the reaction chamber to provide intermediate reactive species to the reaction chamber. A pressure control device can be used to control an operating pressure of the intermediate reactive species formation chamber, and a heater can be used to heat the intermediate reactive species formation chamber to a desired temperature.

Abstract translation: 公开了一种用于向反应室提供中间反应物质的系统和方法。 该系统包括流体耦合到反应室的中间反应物质形成室，以向反应室提供中间反应物质。 可以使用压力控制装置来控制中间反应物质形成室的操作压力，并且可以使用加热器将中间反应物质形成室加热到所需温度。

公开(公告)号：US20150048485A1

公开(公告)日：2015-02-19

申请号：US13966782

申请日：2013-08-14

Applicant: ASM IP Holding B.V.

Inventor： John Tolle

IPC: H01L21/02 ,  H01L29/161

CPC classification number: H01L21/02532 ,  C30B25/183 ,  C30B29/52 ,  H01L21/02535 ,  H01L21/02576 ,  H01L21/02579 ,  H01L21/0262 ,  H01L29/161 ,  H01L29/165

Abstract: Methods of forming germanium-tin films using germane as a precursor are disclosed. Exemplary methods include growing films including germanium and tin in an epitaxial chemical vapor deposition reactor, wherein a ratio of a tin precursor to germane is less than 0.1. Also disclosed are structures and devices including germanium-tin films formed using the methods described herein.

Abstract translation: 公开了使用锗烷作为前体形成锗 - 锡膜的方法。 示例性方法包括在外延化学气相沉积反应器中生长包括锗和锡的膜，其中锡前体与锗烷的比例小于0.1。 还公开了包括使用本文所述的方法形成的锗 - 锡膜的结构和装置。