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    APPARATUS FOR REDUCING POWER CONSUMPTION BY USING CAPACITIVE COUPLING TO PERFORM MAJORITY DETECTION
    13.
    发明申请
    APPARATUS FOR REDUCING POWER CONSUMPTION BY USING CAPACITIVE COUPLING TO PERFORM MAJORITY DETECTION 有权
    通过使用电容耦合来降低功耗以实现主要检测的设备

    公开(公告)号：US20120007699A1

    公开(公告)日：2012-01-12

    申请号：US13235152

    申请日：2011-09-16

    申请人： Ronald Ho ,  Robert J. Drost ,  Robert Hopkins

    发明人： Ronald Ho ,  Robert J. Drost ,  Robert Hopkins

    IPC分类号： H03H7/00

    CPC分类号： G06F1/189

    摘要： One embodiment of the present invention provides a system that reduces power consumption by using capacitive coupling to perform a majority detection operation. The system starts by driving a plurality of signals onto a plurality of driven wires. The signals are then fed from each driven wire through a corresponding coupling capacitor to a single majority detection wire. Next, the system feeds signal on the majority detection wire and a bias voltage to a differential receiver. The output of the differential receiver switches if the signal on the majority-detection wire switches relative to the bias voltage. The system then uses the output of the differential receiver to optimize the signals from the plurality of driven wires for transmission across a long signal route. Optimizing the transmission of signals reduces the power consumed by the computer system.

    摘要翻译： 本发明的一个实施例提供一种通过使用电容耦合来执行多数检测操作来降低功耗的系统。 系统通过将多个信号驱动到多个从动线上开始。 然后，这些信号从每个从动导线通过相应的耦合电容器馈送到单个多数检测线。 接下来，系统将多数检测线上的信号馈送到差分接收器的偏置电压。 如果多数检测线上的信号相对于偏置电压切换，差分接收器的输出将切换。 然后，系统使用差分接收器的输出来优化来自多条驱动线的信号，以便在长信号路径上传输。 优化信号传输减少了计算机系统消耗的功耗。

    Method and apparatus for fabricating semiconductor chips using varying areas of precision
    16.
    发明授权
    Method and apparatus for fabricating semiconductor chips using varying areas of precision 有权
    使用不同精度的区域制造半导体芯片的方法和装置

    公开(公告)号：US07763396B2

    公开(公告)日：2010-07-27

    申请号：US11355757

    申请日：2006-02-16

    申请人： David C. Douglas ,  Ronald Ho ,  Robert J. Drost

    发明人： David C. Douglas ,  Ronald Ho ,  Robert J. Drost

    IPC分类号： G03F9/00

    CPC分类号： G03F7/70433

    摘要： A system that fabricates a semiconductor chip. The system places patterns for components which require fine line-widths within a high resolution region of a reticle, wherein the high resolution region provides sharp focus for a given wavelength of light used by the lithography system. At the same time, the system places patterns for components which do not require fine line-widths outside of the high-resolution region of the reticle, thereby utilizing the region outside of the high-resolution region of the reticle instead of avoiding the region. Note that the coarseness for components placed outside of the high resolution region of the reticle is increased to compensate for the loss of optical focus outside of the high resolution region.

    摘要翻译： 制造半导体芯片的系统。 系统将要求精细线宽的部件的图案放置在标线的高分辨率区域内，其中高分辨率区域为光刻系统使用的给定波长的光提供清晰的焦点。 同时，系统将不需要精细线宽的部件的图案放置在标线片的高分辨率区域之外，从而利用分划板的高分辨率区域之外的区域，而不是避开该区域。 注意，放大在分划板的高分辨率区域之外的分量的粗糙度被增加以补偿高分辨率区域外的光学焦点的损失。

    Multi-phase clocking of integrated circuits using photonics
    17.
    发明授权
    Multi-phase clocking of integrated circuits using photonics 有权
    使用光子学的集成电路的多相时钟

    公开(公告)号：US07747173B1

    公开(公告)日：2010-06-29

    申请号：US11728841

    申请日：2007-03-26

    申请人： Ronald Ho ,  John E. Cunningham ,  Ashok V. Krishnamoorthy ,  Robert J. Drost

    发明人： Ronald Ho ,  John E. Cunningham ,  Ashok V. Krishnamoorthy ,  Robert J. Drost

    IPC分类号： H04B10/00

    CPC分类号： H04B10/801

    摘要： Embodiments of an integrated circuit are described. This integrated circuit includes a clock-generator circuit configured to provide a clock signal and an optical clock path coupled to the clock-generator circuit. Note that the optical clock path is configured to distribute optical signals corresponding to the clock signal. Furthermore, note that a given optical signal has a phase which is different than phases of the other optical signals.

    摘要翻译： 描述集成电路的实施例。 该集成电路包括时钟发生器电路，其被配置为提供时钟信号和耦合到时钟发生器电路的光时钟通路。 注意，光时钟路径被配置为分配对应于时钟信号的光信号。 此外，注意，给定的光信号具有与其它光信号的相位不同的相位。

    Structures and methods for an application of a flexible bridge
    18.
    发明授权
    Structures and methods for an application of a flexible bridge 有权
    应用柔性桥梁的结构和方法

    公开(公告)号：US07671449B2

    公开(公告)日：2010-03-02

    申请号：US11418986

    申请日：2006-05-04

    申请人： Arthur R. Zingher ,  Bruce M. Guenin ,  Ronald Ho ,  Robert J. Drost

    发明人： Arthur R. Zingher ,  Bruce M. Guenin ,  Ronald Ho ,  Robert J. Drost

    IPC分类号： H01L39/00 ,  H01L21/00

    CPC分类号： H01L23/5387 ,  H01L23/48 ,  H01L25/0655 ,  H01L2224/16225 ,  H01L2225/06562 ,  H01L2924/01067 ,  H01L2924/15311 ,  H01R12/62 ,  H05K3/222 ,  H05K2201/1053 ,  H05K2201/10674

    摘要： One embodiment of the present invention provides a system that facilitates high-bandwidth communication using a flexible bridge. This system includes a chip with an active face upon which active circuitry and signal pads reside, and a second component with a surface upon which active circuitry and/or signal pads reside. A flexible bridge provides high-bandwidth communication between the active face of the chip and the surface of the second component. This flexible bridge provides a flexible connection that allows the chip to be moved with six degrees of freedom relative to the second component without affecting communication between the chip and the second component. Hence, the flexible bridge allows the chip and the second component to communicate without requiring precise alignment between the chip and the second component.

    摘要翻译： 本发明的一个实施例提供一种促进使用柔性桥的高带宽通信的系统。 该系统包括具有有源电路和信号焊盘所在的有源面的芯片，以及具有有源电路和/或信号焊盘所在的表面的第二部件。 柔性桥提供芯片的有源面与第二部件的表面之间的高带宽通信。 该柔性桥提供柔性连接，允许芯片相对于第二部件以六个自由度移动，而不影响芯片和第二部件之间的通信。 因此，柔性桥允许芯片和第二部件通信，而不需要芯片和第二部件之间的精确对准。

    Method and apparatus for performing error-detection and error-correction
    19.
    发明授权
    Method and apparatus for performing error-detection and error-correction 有权
    用于执行错误检测和纠错的方法和装置

    公开(公告)号：US07395483B1

    公开(公告)日：2008-07-01

    申请号：US10966083

    申请日：2004-10-15

    申请人： Bernard Tourancheau ,  Ronald Ho ,  Robert J. Drost

    发明人： Bernard Tourancheau ,  Ronald Ho ,  Robert J. Drost

    IPC分类号： H03M13/37

    CPC分类号： H03M13/09 ,  H03M13/098 ,  H03M13/2906

    摘要： One embodiment of the present invention provides a system that facilitates detecting and correcting errors. The system operates by receiving a data packet comprised of p words on a communication pathway, wherein each bit of a word is received on a separate data line in a set of data lines that comprise the communication pathway. The system also receives a time signature t on the communication pathway, wherein t contains per-bit error information for the p words in the data packet. As the data packet is received, the system performs an error-detection operation on each data bit of the data packet in parallel, wherein the error-detection operation generates per-bit error information for each bit position across the p words in the data packet. Finally, the system compares the generated per-bit error-information with the corresponding per-bit error information in the time signature t to determine if there exists an error.

    摘要翻译： 本发明的一个实施例提供一种便于检测和纠正错误的系统。 该系统通过在通信路径上接收由p个字组成的数据分组来进行操作，其中单词的每个比特在包含通信路径的一组数据线中的单独的数据线上被接收。 系统还在通信路径上接收时间签名t，其中t包含数据包中的p个字的每位错误信息。 当接收到数据包时，系统并行对数据包的每个数据位执行错误检测操作，其中错误检测操作针对数据包中的p个字的每个比特位置生成每位错误信息 。 最后，系统将生成的每位错误信息与时间签名t中相应的每位错误信息进行比较，以确定是否存在错误。