-
公开(公告)号：US20180092212A1
公开(公告)日：2018-03-29
申请号：US15702046
申请日：2017-09-12
Applicant: Apple Inc.
Inventor： Paul A. Martinez , Curtis C. Mead , Scott D. Morrison , Giancarlo F. De La Cruz , Lin Chen , Albert Wang , Brad W. Simeral
CPC classification number: H05K1/181 , H01F27/29 , H01G2/06 , H01G4/12 , H01G4/228 , H01G4/30 , H01G4/40 , H03H1/00 , H03H7/0115 , H03H7/38 , H03H2001/0085 , H05K3/3436 , H05K2201/10015 , H05K2201/10022 , H05K2201/1003 , H05K2201/1006 , H05K2201/10515 , H05K2201/10636 , Y02P70/611 , Y02P70/613
Abstract: Methods and systems for producing circuitry using stackable passive components are discussed. More specifically, the present disclosure provides designs and fabrication methods for production of stackable devices that may be used as components in circuitry such as filters and impedance matching adaptors. Such components may be used to save space in printed circuit boards. Moreover, stackable passive components may be dual components, which may be improve the electrical performance in certain types of circuits such as matched component filters.
-
公开(公告)号：US10811192B2
公开(公告)日：2020-10-20
申请号：US16146042
申请日：2018-09-28
Applicant: Apple Inc.
Inventor： Paul A. Martinez , Won Seop Choi , Gang Ning , Chirag V. Shah , Martin Schauer , Curtis C. Mead , Ming Yuan Tsai , Albert Wang
Abstract: Multilayer ceramic capacitor structures may include structural arrangements, materials, and/or substrate modifications that can improve the reliability of the capacitor for long-term usage when faced with environmental stress. Embodiments may implement reduced entryways in the termination patterns of the capacitor to decrease damage potential due to exposure of moisture. Embodiments may implement structures that decrease interfaces with different physical characteristics, which may lead to a reduction in the formation of micro-fractures during regular usage. Methods of manufacture for the features that improve reliability are also detailed.
-
公开(公告)号：US20200105473A1
公开(公告)日：2020-04-02
申请号：US16146042
申请日：2018-09-28
Applicant: Apple Inc.
Inventor： Paul A. Martinez , Won Seop Choi , Gang Ning , Chirag V. Shah , Martin Schauer , Curtis C. Mead , Ming Yuan Tsai , Albert Wang
Abstract: Multilayer ceramic capacitor structures may include structural arrangements, materials, and/or substrate modifications that can improve the reliability of the capacitor for long-term usage when faced with environmental stress. Embodiments may implement reduced entryways in the termination patterns of the capacitor to decrease damage potential due to exposure of moisture. Embodiments may implement structures that decrease interfaces with different physical characteristics, which may lead to a reduction in the formation of micro-fractures during regular usage. Methods of manufacture for the features that improve reliability are also detailed.
-
公开(公告)号：US10332683B2
公开(公告)日：2019-06-25
申请号：US15717431
申请日：2017-09-27
Applicant: Apple Inc.
Inventor： Behzad Reyhani Masoleh , Ming Y. Tsai , Paul A. Martinez , Scott D. Morrison , Tracey L. Chavers
IPC: H01G4/248 , H01G4/30 , H01G4/002 , H01G4/224 , H05K1/02 , H05K1/18 , H05K1/11 , H01G4/232 , H05K3/34
Abstract: Capacitor devices with electrodes that are geometrically arranged to reduce parasitic capacitances are described. The capacitors may be multilayer ceramic capacitor (MLCC) structures in which certain electrodes may have a clearance from a capacitor structure wall, such as top wall. In circuits and devices where that particular capacitor wall may be placed near a shielding structure, the clearance may reduce unintended parasitic capacitances between the shield structure and the electrodes. As a result, the shield structures may be placed closer to the electronic components, which may allow circuit boards and electronic devices with a lower profile.
-
公开(公告)号：US10256036B2
公开(公告)日：2019-04-09
申请号：US15405027
申请日：2017-01-12
Applicant: Apple Inc.
Inventor： Paul A. Martinez , Ming Y. Tsai , Federico P. Centola , Martin Schauer , Cheung-Wei Lam , Jason C. Sauers
Abstract: A system includes a circuit board, an inductor including windings mounted on the circuit board, and a plurality of magnetic field containment devices. Each magnetic field containment device includes an independent electrical circuit that is not directly electrically connected via a conductor to any other magnetic field containment device. Each magnetic field containment device also includes a material of a certain relative permeability. Each magnetic field containment device at least partially surrounds the inductor and, in operation, at least partially contains a magnetic B-Field generated by electrical current in the windings of the inductor. The plurality of magnetic field containment devices, in operation, enables a certain saturation current in the inductor.
-
Patent Agency Ranking
公开(公告)号：US20180337003A1
公开(公告)日：2018-11-22
申请号：US15600329
申请日：2017-05-19
Applicant: Apple Inc.
Inventor： Ming Y. Tsai , Albert Wang , Curtis C. Mead , Tyler S. Bushnell , Paul A. Martinez
IPC: H01G4/35 , H01G4/12 , H01G4/005 , H01G4/30 , H01L41/047
Abstract: Monolithic capacitor structures having a main capacitor and a vise capacitor are discussed. The vise capacitor provides to the monolithic capacitor structure reduced vibrations and/or acoustic noise due to piezoelectric effects. To that end, vise capacitor may cause piezoelectric deformations that compensate the deformations that are caused by the electrical signals in the main capacitor. Embodiments of these capacitor structures may have the main capacitor and the vise capacitor sharing portions of a rigid dielectric. Electrical circuitry that employs the vise capacitor to reduce noise and/or vibration in the monolithic capacitor structures is also described. Methods for fabrication of these capacitors are discussed as well.
-
公开(公告)号：US20180092210A1
公开(公告)日：2018-03-29
申请号：US15274302
申请日：2016-09-23
Applicant: Apple Inc.
Inventor： Albert Wang , Paul A. Martinez
IPC: H05K1/14 , H05K1/18 , H05K1/02 , H05K3/30 , H05K3/28 , H05K3/36 , H05K3/34 , H05K3/40 , H05K3/00
CPC classification number: H05K1/145 , H05K1/0218 , H05K1/0278 , H05K1/0281 , H05K1/0298 , H05K1/181 , H05K1/186 , H05K3/0047 , H05K3/284 , H05K3/303 , H05K3/341 , H05K3/361 , H05K3/4038 , H05K3/4046 , H05K3/4614 , H05K2201/042 , H05K2201/0707 , H05K2201/09118 , H05K2201/10522 , H05K2201/10734 , H05K2203/1316 , H05K2203/1327
Abstract: Methods and devices related to the design and fabrication of molded cores for printed circuit board assemblies and system-on-package (SIP) devices are discussed. The discussed printed circuit board assemblies may have multiple electrical components embedded in a molded core matrix and forming electrical connections with one or more printed circuit boards attached to the molded core matrix. Methods for sourcing of electrical components and production of the molded cores and printed circuit board assemblies are also discussed. The methods and devices may increase a volumetric density of electrical components in printed circuit board assemblies and provide improved mechanical properties to the electrical circuit device.
-
公开(公告)号：US20170208690A1
公开(公告)日：2017-07-20
申请号：US15275369
申请日：2016-09-24
Applicant: Apple Inc.
Inventor： Paul A. Martinez , Curtis C. Mead , Scott D. Morrison , Giancarlo F. De La Cruz , Lin Chen , Albert Wang , Brad W. Simeral , Vu Vo , Wyeman Chen
IPC: H05K1/18 , H05K1/11 , H01G4/30 , H01G4/228 , H01G4/38 , H01G4/005 , H01G2/06 , H05K3/30 , H01G4/40
Abstract: Systems and methods described in this disclosure are related to fabrication and utilization of two-terminal electrical components that may have terminations with reduced width. Components, such as the ones described herein may be used to increase the density of components in electrical devices, as they may reduce a separation distance between devices that lead to solder bridging. Methods for fabrication are also described, including the use of ceramic layers that may provide reduction in parasitic capacitance and/or inductances.
-
公开(公告)号：US10424438B2
公开(公告)日：2019-09-24
申请号：US15275369
申请日：2016-09-24
Applicant: Apple Inc.
Inventor： Paul A. Martinez , Curtis C. Mead , Scott D. Morrison , Giancarlo F. De La Cruz , Lin Chen , Albert Wang , Brad W Simeral , Vu Vo , Wyeman Chen
Abstract: Systems and methods described in this disclosure are related to fabrication and utilization of two-terminal electrical components that may have terminations with reduced width. Components, such as the ones described herein may be used to increase the density of components in electrical devices, as they may reduce a separation distance between devices that lead to solder bridging. Methods for fabrication are also described, including the use of ceramic layers that may provide reduction in parasitic capacitance and/or inductances.
-
公开(公告)号：US20190075655A1
公开(公告)日：2019-03-07
申请号：US16184697
申请日：2018-11-08
Applicant: Apple Inc.
Inventor： Albert Wang , Paul A. Martinez
IPC: H05K1/14 , H05K1/02 , H05K3/00 , H05K3/40 , H05K3/34 , H05K3/36 , H05K3/28 , H05K3/30 , H05K1/18 , H05K3/46
Abstract: Methods and devices related to the design and fabrication of molded cores for printed circuit board assemblies and system-on-package (SIP) devices are discussed. The discussed printed circuit board assemblies may have multiple electrical components embedded in a molded core matrix and forming electrical connections with one or more printed circuit boards attached to the molded core matrix. Methods for sourcing of electrical components and production of the molded cores and printed circuit board assemblies are also discussed. The methods and devices may increase a volumetric density of electrical components in printed circuit board assemblies and provide improved mechanical properties to the electrical circuit device.
-
-
-
-
-
-
-
-
-
Search Results
26
records
(took 0.017 seconds)
