公开(公告)号：US07479232B2

公开(公告)日：2009-01-20

申请号：US11221228

申请日：2005-09-06

Applicant: Hubert Benzel ,  Heribert Weber ,  Hans Artmann ,  Frank Schaefer

Inventor： Hubert Benzel ,  Heribert Weber ,  Hans Artmann ,  Frank Schaefer

IPC: H01L21/302 ,  B81C1/00

CPC classification number: G01L9/0042 ,  B81B2201/0264 ,  B81B2203/0127 ,  B81B2203/0315 ,  B81C1/00047 ,  B81C1/00595 ,  B81C2201/0115 ,  G01L9/0045 ,  H01L21/3063

Abstract: A method is for producing a semiconductor component, e.g., a multilayer semiconductor element, e.g., a micromechanical component, e.g., a pressure sensor, having a semiconductor substrate, e.g., made of silicon, and a semiconductor component produced according to the method. To reduce the production cost of such a semiconductor component, in a first step a first porous layer is produced in the semiconductor component, and in a second step a hollow or cavity is produced under or from the first porous layer in the semiconductor component, with the hollow or cavity capable of being provided with an external access opening.

Abstract translation: 一种用于制造半导体部件的方法，例如多层半导体元件，例如具有例如由硅制成的半导体衬底的微机械部件，例如压力传感器，以及根据该方法制造的半导体部件。 为了降低这种半导体部件的制造成本，在第一步骤中，在半导体部件中制造第一多孔层，在第二工序中，在半导体部件的第一多孔层的下面或从半导体部件的第一多孔层制造中空或空腔， 所述中空或空腔能够设置有外部通路口。

公开(公告)号：US20090008749A1

公开(公告)日：2009-01-08

申请号：US12215655

申请日：2008-06-27

Applicant: Arnd Kaelberer ,  Helmut Baumann ,  Roland Scheuerer ,  Heribert Weber

Inventor： Arnd Kaelberer ,  Helmut Baumann ,  Roland Scheuerer ,  Heribert Weber

IPC: H01L29/04 ,  H01L21/302

CPC classification number: B81C1/00539 ,  B81C1/00619 ,  B81C1/00626 ,  H01L21/30608

Abstract: A device made of single-crystal silicon having a first side, a second side which is situated opposite to the first side, and a third side which extends from the first side to the second side, the first side and the second side each extending in a 100 plane of the single-crystal silicon, the third side extending in a first area in a 111 plane of the single-crystal silicon. The third side extends in a second area in a 110 plane of the single-crystal silicon. Furthermore, a production method for producing a device made of single-crystal silicon is described.

Abstract translation: 由单晶硅制成的器件，其具有第一侧，与第一侧相对的第二侧，以及从第一侧延伸到第二侧的第三侧，第一侧和第二侧各自延伸 单晶硅的100平面，第三面在单晶硅的111平面的第一区域中延伸。 第三面在单晶硅的110平面的第二区域中延伸。 此外，描述了用于制造由单晶硅制成的器件的制造方法。

公开(公告)号：US20080286970A1

公开(公告)日：2008-11-20

申请号：US12152241

申请日：2008-05-12

Applicant: Hubert Benzel ,  Heribert Weber ,  Hans Artmann ,  Frank Schaefer

Inventor： Hubert Benzel ,  Heribert Weber ,  Hans Artmann ,  Frank Schaefer

IPC: H01L21/306

CPC classification number: G01L9/0042 ,  B81B2201/0264 ,  B81B2203/0127 ,  B81B2203/0315 ,  B81C1/00047 ,  B81C1/00595 ,  B81C2201/0115 ,  G01L9/0045 ,  H01L21/3063

Abstract: A method for producing a semiconductor component includes forming an n-doped layer in a p-doped layer of the semiconductor component, wherein the n-doped layer comprises at least one of: a sieve-like layer or a network-like layer. The method also includes porously etching the p-doped layer between the material of the n-doped layer to form a top electrode, and forming a cavity below the n-doped layer.

Abstract translation: 一种制造半导体部件的方法包括在所述半导体部件的p掺杂层中形成n掺杂层，其中所述n掺杂层包括以下中的至少一种：筛状层或网状层。 该方法还包括在n掺杂层的材料之间对p-掺杂层进行腐蚀蚀刻以形成顶部电极，以及在n-掺杂层下方形成空腔。

公开(公告)号：US20060197634A1

公开(公告)日：2006-09-07

申请号：US10547041

申请日：2004-02-18

Applicant: Roland Muller-Fiedler ,  Hans Hecht ,  Joerg Fuertsch ,  Matthhias Fuertsch ,  Andreas Stratmann ,  Heribert Weber ,  Winfred Bernhard ,  Detlef Gruen ,  Andreas Duell ,  Rainer Schink ,  Ulrich Wagner ,  Christop Schelling

Inventor： Roland Muller-Fiedler ,  Hans Hecht ,  Joerg Fuertsch ,  Matthhias Fuertsch ,  Andreas Stratmann ,  Heribert Weber ,  Winfred Bernhard ,  Detlef Gruen ,  Andreas Duell ,  Rainer Schink ,  Ulrich Wagner ,  Christop Schelling

IPC: H01H51/22

CPC classification number: G01L9/0042 ,  G01F1/6845 ,  G01N7/10

Abstract: A micromechanical sensor and a method for manufacturing a micromechanical sensor which has at least one membrane are provided. The membrane is made of a first material which is accommodated in a surrounding second material, and the membrane is configured for sensing a medium surrounding it. The membrane is reinforced, at least partly, by a third material at break-sensitive points on the membrane rim. Reinforcement of the membrane rim increases the stability and thus also the service life of the membrane and the sensor.

Abstract translation: 提供了具有至少一个膜的微机械传感器和用于制造微机械传感器的方法。 膜由容纳在周围的第二材料中的第一材料制成，并且膜构造成用于感测周围的介质。 至少部分地，膜在膜边缘上的断裂点被第三材料增强。 膜边缘的加强增加了膜和传感器的稳定性，从而增加了膜的使用寿命。

公开(公告)号：US06906392B2

公开(公告)日：2005-06-14

申请号：US10381307

申请日：2002-07-06

Applicant: Hubert Benzel ,  Heribert Weber ,  Michael Bauer ,  Hans Artmann ,  Thorsten Pannek ,  Frank Schaefer ,  Christian Krummel

Inventor： Hubert Benzel ,  Heribert Weber ,  Michael Bauer ,  Hans Artmann ,  Thorsten Pannek ,  Frank Schaefer ,  Christian Krummel

IPC: B81B3/00 ,  G01N27/04 ,  G01N27/12 ,  G01N27/18 ,  G01N27/22 ,  H01L27/14 ,  G01N7/00

CPC classification number: B81B3/0081 ,  B81B2203/0127 ,  B81C2201/0115 ,  G01N27/227

Abstract: A micromechanical component includes a substrate and a cover layer deposited on the substrate, underneath the cover layer, a region of porous material being provided which mechanically supports and thermally insulates the cover layer. On the cover layer, a heating device is provided to heat the cover layer above the region; and above the region, a detector is provided to measure an electric property of a heated medium provided above the region on the cover layer.

Abstract translation: 微机械部件包括沉积在覆盖层下面的基底上的基底和覆盖层，提供机械支撑和热绝缘覆盖层的多孔材料区域。 在覆盖层上，设置加热装置以加热该区域上方的覆盖层; 并且在该区域之上，提供检测器以测量设置在覆盖层上的区域上方的加热介质的电性质。

公开(公告)号：US06565765B1

公开(公告)日：2003-05-20

申请号：US09598543

申请日：2000-06-21

Applicant: Heribert Weber

Inventor： Heribert Weber

IPC: B44C122

CPC classification number: B81C1/00158 ,  B81C2201/014 ,  B81C2201/0178 ,  G01F1/6845

Abstract: In a method for manufacturing a sensor having a membrane, a silicon nitride layer is deposited on the upper side of a silicon substrate. For that, an LPCVD or PECVD process is used. From the lower side of the silicon substrate, an opening is etched in which ends at the lower side of the silicon nitride layer.

Abstract translation: 在制造具有膜的传感器的方法中，在硅衬底的上侧淀积氮化硅层。 为此，使用LPCVD或PECVD工艺。 从硅衬底的下侧开始，在氮化硅层的下侧蚀刻开口。

公开(公告)号：US5905203A

公开(公告)日：1999-05-18

申请号：US723545

申请日：1996-09-30

Applicant: Georg Flach ,  Udo Nothelfer ,  Gunther Schuster ,  Heribert Weber

Inventor： Georg Flach ,  Udo Nothelfer ,  Gunther Schuster ,  Heribert Weber

IPC: G01P15/08 ,  G01P15/125 ,  H01L29/84

CPC classification number: G01P15/0802 ,  G01P15/125 ,  G01P2015/0831

Abstract: A micromechanical acceleration sensor consists of a first semiconductor wafer and a second semiconductor wafer, where on the first semiconductor wafer first and second electrodes, are provided to create a variable capacitance and the second semiconductor wafer has a movable third electrode, and where on the first semiconductor wafer there is a microelectronic evaluation unit. The moveable electrode is a rocker suspended asymmetrically with regard to an axis of rotation such that each respective portion is of a different length and is opposite one of the first and second electrodes. A closed ring structure is disposed on the surface of the first semiconductor wafer.

Abstract translation: 微机械加速度传感器由第一半导体晶片和第二半导体晶片构成，其中在第一半导体晶片第一和第二电极上设置第一和第二电极以产生可变电容，并且第二半导体晶片具有可移动的第三电极， 半导体晶片有一个微电子评估单元。 可移动电极是相对于旋转轴线不对称地悬挂的摇臂，使得每个相应部分具有不同的长度并与第一和第二电极之一相对。 封闭的环形结构设置在第一半导体晶片的表面上。

公开(公告)号：US09212048B2

公开(公告)日：2015-12-15

申请号：US13890363

申请日：2013-05-09

Applicant: Johannes Classen ,  Heribert Weber ,  Mirko Hattass ,  Daniel Christoph Meisel

Inventor： Johannes Classen ,  Heribert Weber ,  Mirko Hattass ,  Daniel Christoph Meisel

IPC: B81B3/00 ,  B81C1/00

CPC classification number: B81B3/0075 ,  B81B2207/07 ,  B81B2207/096 ,  B81C1/00238 ,  B81C1/00674 ,  B81C2203/0109 ,  H01L2224/16225 ,  H01L2924/19105

Abstract: A hybridly integrated component includes an ASIC element having a processed front side, a first MEMS element having a micromechanical structure extending over the entire thickness of the first MEMS substrate, and a first cap wafer mounted over the micromechanical structure of the first MEMS element. At least one structural element of the micromechanical structure of the first MEMS element is deflectable, and the first MEMS element is mounted on the processed front side of the ASIC element such that a gap exists between the micromechanical structure and the ASIC element. A second MEMS element is mounted on the rear side of the ASIC element. The micromechanical structure of the second MEMS element extends over the entire thickness of the second MEMS substrate and includes at least one deflectable structural element.

Abstract translation: 混合集成部件包括具有经处理的前侧的ASIC元件，具有在第一MEMS基板的整个厚度上延伸的微机械结构的第一MEMS元件和安装在第一MEMS元件的微机械结构上的第一盖晶片。 第一MEMS元件的微机械结构的至少一个结构元件是可偏转的，并且第一MEMS元件安装在ASIC元件的经处理的正面上，使得在微机械结构和ASIC元件之间存在间隙。 第二个MEMS元件安装在ASIC元件的后侧。 第二MEMS元件的微机械结构在第二MEMS基板的整个厚度上延伸，并且包括至少一个可偏转的结构元件。

公开(公告)号：US09153523B2

公开(公告)日：2015-10-06

申请号：US14307108

申请日：2014-06-17

Applicant: Heribert Weber ,  Hartmut Kueppers ,  Jochen Reinmuth ,  Neil Davies ,  Jens Frey

Inventor： Heribert Weber ,  Hartmut Kueppers ,  Jochen Reinmuth ,  Neil Davies ,  Jens Frey

IPC: H01L23/52 ,  H01L23/48 ,  B81C3/00

CPC classification number: H01L23/481 ,  B81C1/00238 ,  B81C3/001 ,  B81C2203/0109 ,  B81C2203/0792 ,  G01C19/5783 ,  H01L2924/0002 ,  H01L2924/00

Abstract: In an ASIC element, vias are integrated into the CMOS processing of an ASIC substrate. The ASIC element includes an active front side in which the circuit functions are implemented. The at least one via is intended to establish an electrical connection between the active front side and the rear side of the element. The front side of the via is defined by at least one front-side trench which is completely filled, and the rear side is defined by at least one rear-side trench which is not completely filled. The rear-side trench opens into the filled front-side trench.

Abstract translation: 在ASIC元件中，通孔被集成到ASIC基板的CMOS处理中。 ASIC元件包括其中实现电路功能的主动正面。 该至少一个通孔旨在在元件的主动前侧和后侧之间建立电连接。 通孔的前侧由完全填充的至少一个前侧沟槽限定，并且后侧由未完全填充的至少一个后侧沟槽限定。 后侧沟槽穿过填充的前侧沟槽。

公开(公告)号：US08993356B2

公开(公告)日：2015-03-31

申请号：US13232088

申请日：2011-09-14

Applicant: Tjalf Pirk ,  Juergen Butz ,  Axel Franke ,  Frieder Haag ,  Heribert Weber ,  Arnim Hoechst ,  Sonja Knies

Inventor： Tjalf Pirk ,  Juergen Butz ,  Axel Franke ,  Frieder Haag ,  Heribert Weber ,  Arnim Hoechst ,  Sonja Knies

IPC: H01L21/00 ,  H01L23/31 ,  H01L21/56 ,  H01L23/58 ,  H01M6/40 ,  H01M10/04 ,  H01M10/0525 ,  H01L23/00 ,  H01L23/538 ,  H01L25/065

CPC classification number: H01L23/3121 ,  H01L21/561 ,  H01L21/568 ,  H01L23/5389 ,  H01L23/58 ,  H01L24/24 ,  H01L24/96 ,  H01L25/0655 ,  H01L2224/04105 ,  H01L2224/24137 ,  H01L2924/10253 ,  H01L2924/14 ,  H01L2924/181 ,  H01L2924/19107 ,  H01L2924/3511 ,  H01M6/40 ,  H01M10/0436 ,  H01M10/0525 ,  Y02E60/122 ,  Y02P70/54 ,  H01L2924/00

Abstract: A method for constructing an electrical circuit that includes at least one semiconductor chip encapsulated with a potting compound is disclosed. The method includes applying a galvanic layer arrangement for forming an electrochemical element on an element of the electrical circuit including the at least one semiconductor chip.

Abstract translation: 公开了一种构造电路的方法，该电路包括至少一个用封装化合物封装的半导体芯片。 该方法包括在包括至少一个半导体芯片的电路的元件上施加用于形成电化学元件的电偶层布置。