中科微点-全球专利检索

  1. Login
  2. Sign Up

Search Results

23 records (took 0.024 seconds)

    REDUCING MEMORY POWER USAGE IN FAR MEMORY
    14.
    发明申请
    REDUCING MEMORY POWER USAGE IN FAR MEMORY 有权

    公开(公告)号：US20230086149A1

    公开(公告)日：2023-03-23

    申请号：US17483491

    申请日：2021-09-23

    Applicant: Intel Corporation

    Inventor： Chia-Hung S. Kuo ,  Deepak Gandiga Shivakumar ,  Anoop Mukker ,  Arik Gihon ,  Zvika Greenfield ,  Asaf Rubinstein ,  Leo Aqrabawi

    IPC: G06F12/0804 ,  G06F1/28 ,  G06F1/3206 ,  G06F1/3287

    Abstract: Some embodiments include apparatuses and electrical models associated with the apparatus. One of the apparatuses includes a power control unit to monitor a power state of the apparatus for entry into a standby mode. The apparatus can include a two-level memory (2LM) hardware accelerator to, responsive to a notification from the power control unit of entry into the standby mode, flush dynamic random access memory (DRAM) content from a first memory part to a second memory part. The apparatus can include processing circuitry to determine memory utilization and move memory from a first memory portion to a second memory portion responsive to memory utilization exceeding a threshold. Other methods systems and apparatuses are described.

    Power control of a memory device through a sideband channel of a memory bus
    16.
    发明授权
    Power control of a memory device through a sideband channel of a memory bus 有权

    公开(公告)号：US10345885B2

    公开(公告)日：2019-07-09

    申请号：US15277936

    申请日：2016-09-27

    Applicant: INTEL CORPORATION

    Inventor： Brian R. McFarlane ,  Robert J. Royer ,  Anoop Mukker ,  Eng Hun Ooi ,  Ritesh B. Trivedi

    IPC: G06F1/324 ,  G06F13/00 ,  G06F1/3234 ,  G06F1/3296 ,  G06F1/3225

    Abstract: A method is described that includes choosing between one of two different ways to cause a memory device to enter a specific one of multiple lower power states that each comprise lower power consumption than a highest low power state. The method also includes asserting a first signal on a first signal line that is coupled to a power management controller of the memory device to indicate to the power management controller that a sideband channel of a memory bus that is coupled to the memory device is activated. The method also includes causing the memory device to enter the specific one of the multiple lower power states by also performing the chosen one of a) sending an in-band signal on said memory bus coupled with said asserting of said first signal, said in-band signal specifying the specific one of the multiple lower power states; or, b) sending a second signal on a second signal line that identifies the specific one of the multiple lower power states.

    Power Control of a Memory Device Through a Sideband Channel of a Memory Bus
    17.
    发明申请
    Power Control of a Memory Device Through a Sideband Channel of a Memory Bus 审中-公开

    公开(公告)号：US20180088658A1

    公开(公告)日：2018-03-29

    申请号：US15277936

    申请日：2016-09-27

    Applicant: INTEL CORPORATION

    Inventor： Brian R. McFarlane ,  Robert J. Royer ,  Anoop Mukker ,  Eng Hun Ooi ,  Ritesh B. Trivedi

    IPC: G06F1/32

    CPC classification number: G06F1/3275 ,  G06F1/3225 ,  G06F1/324 ,  G06F1/3296 ,  G06F13/00 ,  Y02D10/126 ,  Y02D10/14 ,  Y02D10/172

    Abstract: A method is described that includes choosing between one of two different ways to cause a memory device to enter a specific one of multiple lower power states that each comprise lower power consumption than a highest low power state. The method also includes asserting a first signal on a first signal line that is coupled to a power management controller of the memory device to indicate to the power management controller that a sideband channel of a memory bus that is coupled to the memory device is activated. The method also includes causing the memory device to enter the specific one of the multiple lower power states by also performing the chosen one of a) sending an in-band signal on said memory bus coupled with said asserting of said first signal, said in-band signal specifying the specific one of the multiple lower power states; or, b) sending a second signal on a second signal line that identifies the specific one of the multiple lower power states.

Patent Agency Ranking