公开(公告)号：US20180096890A1

公开(公告)日：2018-04-05

申请号：US15285212

申请日：2016-10-04

Applicant: International Business Machines Corporation

Inventor： Lawrence A. CLEVENGER ,  Baozhen LI ,  Kirk David Peterson ,  John E. SHEETS, II ,  Junli WANG ,  Chih-Chao YANG

IPC: H01L21/768 ,  H01L21/285 ,  H01L21/3105 ,  H01L21/311 ,  H01L23/528 ,  H01L23/522 ,  H01L23/532

CPC classification number: H01L21/76882 ,  H01L21/28556 ,  H01L21/28568 ,  H01L21/31055 ,  H01L21/31111 ,  H01L21/76802 ,  H01L21/76829 ,  H01L21/76846 ,  H01L23/485 ,  H01L23/53238

Abstract: A method of forming a semiconductor device includes forming a sacrificial layer in a first contact hole of a first dielectric layer, forming a second dielectric layer on the first dielectric layer, and forming a second contact hole in the second dielectric layer, the second contact hole being aligned with the first contact hole, removing the sacrificial layer from the first contact hole, forming a liner layer on the second dielectric layer and in the first and second contact holes, and forming a copper contact in the first and second contact holes.

公开(公告)号：US20160379877A1

公开(公告)日：2016-12-29

申请号：US15260679

申请日：2016-09-09

Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATION

Inventor： Lawrence A. CLEVENGER ,  Baozhen LI ,  Kirk D. PETERSON

IPC: H01L21/768 ,  H01L21/66 ,  G06F17/50 ,  H01L23/532

CPC classification number: H01L23/528 ,  G06F17/5031 ,  G06F17/5068 ,  G06F17/5072 ,  G06F17/5077 ,  G06F17/5081 ,  G06F2217/82 ,  H01L21/0217 ,  H01L21/28556 ,  H01L21/2885 ,  H01L21/31116 ,  H01L21/31144 ,  H01L21/3212 ,  H01L21/76807 ,  H01L21/76834 ,  H01L21/7684 ,  H01L21/76843 ,  H01L21/76847 ,  H01L21/7685 ,  H01L21/76858 ,  H01L21/76865 ,  H01L21/76877 ,  H01L21/76886 ,  H01L21/76897 ,  H01L22/20 ,  H01L23/5226 ,  H01L23/5283 ,  H01L23/53228 ,  H01L23/53233 ,  H01L23/53238 ,  H01L23/5329 ,  H01L2924/0002 ,  H01L2924/00

Abstract: Optimized metal wires for resistance or electromigration, methods of manufacturing thereof and design methodologies are disclosed. The method includes depositing metal material within openings and on a surface of dielectric material resulting in metal filled openings and a topography of recessed areas aligned with the metal filled openings. The method further includes depositing an alloying material over the metal material, including within the recessed areas. The method further includes planarizing the metal material, leaving the alloying material within the recessed areas. The method further includes diffusing the alloying material into the metal material forming alloyed regions self-aligned with the metal filled openings.

公开(公告)号：US20160163651A1

公开(公告)日：2016-06-09

申请号：US14561514

申请日：2014-12-05

Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATION

Inventor： Lawrence A. CLEVENGER ,  Baozhen LI ,  Kirk D. PETERSON

IPC: H01L23/532 ,  H01L23/528 ,  H01L21/321 ,  H01L21/768 ,  H01L21/288 ,  H01L21/02 ,  G06F17/50 ,  H01L23/522

CPC classification number: H01L23/528 ,  G06F17/5031 ,  G06F17/5068 ,  G06F17/5072 ,  G06F17/5077 ,  G06F17/5081 ,  G06F2217/82 ,  H01L21/0217 ,  H01L21/28556 ,  H01L21/2885 ,  H01L21/31116 ,  H01L21/31144 ,  H01L21/3212 ,  H01L21/76807 ,  H01L21/76834 ,  H01L21/7684 ,  H01L21/76843 ,  H01L21/76847 ,  H01L21/7685 ,  H01L21/76858 ,  H01L21/76865 ,  H01L21/76877 ,  H01L21/76886 ,  H01L21/76897 ,  H01L22/20 ,  H01L23/5226 ,  H01L23/5283 ,  H01L23/53228 ,  H01L23/53233 ,  H01L23/53238 ,  H01L23/5329 ,  H01L2924/0002 ,  H01L2924/00

Abstract: Optimized metal wires for resistance or electromigration, methods of manufacturing thereof and design methodologies are disclosed. The method includes depositing metal material within openings and on a surface of dielectric material resulting in metal filled openings and a topography of recessed areas aligned with the metal filled openings. The method further includes depositing an alloying material over the metal material, including within the recessed areas. The method further includes planarizing the metal material, leaving the alloying material within the recessed areas. The method further includes diffusing the alloying material into the metal material forming alloyed regions self-aligned with the metal filled openings.

Abstract translation: 公开了用于电阻或电迁移的优化金属线，其制造方法和设计方法。 该方法包括在开口内和电介质材料的表面上沉积金属材料，导致金属填充的开口和与金属填充的开口对准的凹陷区域的形貌。 该方法还包括在金属材料上沉积合金材料，包括在凹陷区域内。 该方法还包括使金属材料平坦化，将合金材料留在凹陷区域内。 该方法还包括将合金材料扩散到形成与金属填充开口自对准的合金化区域的金属材料中。

公开(公告)号：US20200176388A1

公开(公告)日：2020-06-04

申请号：US16782311

申请日：2020-02-05

Applicant: International Business Machines Corporation

Inventor： Benjamin D. BRIGGS ,  Cornelius Brown PEETHALA ,  Michael RIZZOLO ,  Koichi MOTOYAMA ,  Gen TSUTSUI ,  Ruqiang BAO ,  Gangadhara Raja MUTHINTI ,  Lawrence A. CLEVENGER

IPC: H01L23/532 ,  H01L21/02 ,  H01L21/48 ,  H01L21/768 ,  H01L21/306

Abstract: A semiconductor wafer has a top surface, a dielectric insulator, a plurality of narrow copper wires, a plurality of wide copper wires, an optical pass through layer over the top surface, and a self-aligned pattern in a photo-resist layer. The plurality of wide copper wires and the plurality of narrow copper wires are embedded in a dielectric insulator. The width of each wide copper wire is greater than the width of each narrow copper. An optical pass through layer is located over the top surface. A self-aligned pattern in a photo-resist layer, wherein photo-resist exists only in areas above the wide copper wires, is located above the optical pass through layer.

公开(公告)号：US20190363013A1

公开(公告)日：2019-11-28

申请号：US16288803

申请日：2019-02-28

Applicant: International Business Machines Corporation

Inventor： Lawrence A. CLEVENGER ,  Baozhen LI ,  Kirk David PETERSON ,  John E. SHEETS, II ,  Junli WANG ,  Chih-Chao YANG

IPC: H01L21/768 ,  H01L23/485 ,  H01L23/532 ,  H01L21/285

Abstract: A semiconductor device includes a first dielectric layer including a first contact hole, a second dielectric layer formed on the first dielectric layer, and including a second contact hole aligned with the first contact hole, and a reflowed copper layer formed in the first and second contact holes.

公开(公告)号：US20190114671A1

公开(公告)日：2019-04-18

申请号：US15783028

申请日：2017-10-13

Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATION

Inventor： Benjamin D. BRIGGS ,  Lawrence A. CLEVENGER ,  Leigh Anne H. CLEVENGER ,  Christoper J. PENNY ,  Michael RIZZOLO ,  Aldis SIPOLINS

IPC: G06Q30/02 ,  G06F3/0481 ,  A61L9/00

Abstract: Three-dimensional positional spatial olfaction for virtual marketing associates a product with a product location within a virtual reality environment and identifies a product aroma associated with the product. A distance and a direction from the product location to a positional presence of a participant within the virtual reality environment is determined, and the product aroma is delivered to the participant in accordance with the distance and the direction. Delivery of the product aroma to the participant in accordance with the distance and the direction is used to lead the participant through the virtual reality environment to the product location where an interface for obtaining a physical copy of the product is displayed to the participant.

公开(公告)号：US20180366142A1

公开(公告)日：2018-12-20

申请号：US15804333

申请日：2017-11-06

Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATION

Inventor： Maryam ASHOORI ,  Benjamin D. BRIGGS ,  Lawrence A. CLEVENGER ,  Leigh Anne H. CLEVENGER ,  Michael RIZZOLO

IPC: G10L25/63 ,  A61B5/16 ,  G10L15/26 ,  G06F19/00

Abstract: Embodiments of the present invention are directed to a computer program product for generating a personality shift determination. The computer program product can include a computer readable storage medium having program instructions embodied therewith, wherein the instructions are executable by a processor to cause the processor to perform a method. The method can include receiving a real-time audio input. The method can also include generating a real-time personality trait identification. The method can also include generating a current trait classification for the real-time personality trait identification. The method can also include comparing the current trait classification to a historic rate classification. The method can also include generating a personality shift determination.

公开(公告)号：US20180190585A1

公开(公告)日：2018-07-05

申请号：US15908377

申请日：2018-02-28

Applicant: International Business Machines Corporation

Inventor： Benjamin David BRIGGS ,  Lawrence A. CLEVENGER ,  Bartlet H. DEPROSPO ,  Huai HUANG ,  Christopher J. PENNY ,  Michael RIZZOLO

IPC: H01L23/522 ,  H01L23/532 ,  H01L21/768

CPC classification number: H01L23/5226 ,  H01L21/76802 ,  H01L21/76819 ,  H01L21/76828 ,  H01L21/76829 ,  H01L21/7684 ,  H01L21/76843 ,  H01L21/76877 ,  H01L23/53219 ,  H01L23/53223 ,  H01L23/53233 ,  H01L23/53238 ,  H01L23/53252 ,  H01L23/5329

Abstract: A method of forming a semiconductor device, includes forming a conductive layer in a recessed portion of a porous dielectric layer, partially removing a top portion of the conductive layer while maintaining a height of the porous dielectric layer, forming a conformal cap layer on the porous dielectric layer and the conductive layer in the recessed portion, polishing the conformal cap layer to form a gap in the conformal cap layer, such that an upper surface of the porous dielectric layer is exposed through the gap and an upper surface of the conductive layer is protected by the cap layer, and performing a heat treatment to burn out a pore filler of the porous dielectric layer through the exposed upper surface of the porous dielectric layer.

公开(公告)号：US20180005883A1

公开(公告)日：2018-01-04

申请号：US15198450

申请日：2016-06-30

Applicant: International Business Machines Corporation

Inventor： Benjamin David BRIGGS ,  Lawrence A. CLEVENGER ,  Bartlet H. DEPROSPO ,  Michael RIZZOLO

IPC: H01L21/768 ,  H01L21/66 ,  H01L21/67 ,  H01L23/532 ,  B23K26/082

CPC classification number: B23K26/082 ,  B23K26/0006 ,  B23K26/03 ,  B23K26/062 ,  B23K26/352 ,  B23K26/702 ,  H01L21/67115 ,  H01L21/76883 ,  H01L22/12 ,  H01L22/26

Abstract: A method (and structure) includes performing an initial partial anneal of a metal interconnect overburden layer for semiconductor devices being fabricated on a chip on a semiconductor wafer. Orientation of an early recrystallizing grain at a specific location on a top surface of the metal overburden layer is determined, as implemented and controlled by a processor on a computer. A determination is made whether the orientation of the early recrystallizing grain is desirable or undesirable.

公开(公告)号：US20160379927A1

公开(公告)日：2016-12-29

申请号：US15260675

申请日：2016-09-09

Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATION

Inventor： Lawrence A. CLEVENGER ,  Baozhen LI ,  Kirk D. PETERSON

IPC: H01L23/528 ,  H01L23/532 ,  G06F17/50 ,  H01L21/321 ,  H01L21/311 ,  H01L21/285 ,  H01L21/288 ,  H01L23/522 ,  H01L21/768

CPC classification number: H01L23/528 ,  G06F17/5031 ,  G06F17/5068 ,  G06F17/5072 ,  G06F17/5077 ,  G06F17/5081 ,  G06F2217/82 ,  H01L21/0217 ,  H01L21/28556 ,  H01L21/2885 ,  H01L21/31116 ,  H01L21/31144 ,  H01L21/3212 ,  H01L21/76807 ,  H01L21/76834 ,  H01L21/7684 ,  H01L21/76843 ,  H01L21/76847 ,  H01L21/7685 ,  H01L21/76858 ,  H01L21/76865 ,  H01L21/76877 ,  H01L21/76886 ,  H01L21/76897 ,  H01L22/20 ,  H01L23/5226 ,  H01L23/5283 ,  H01L23/53228 ,  H01L23/53233 ,  H01L23/53238 ,  H01L23/5329 ,  H01L2924/0002 ,  H01L2924/00

Abstract: Optimized metal wires for resistance or electromigration, methods of manufacturing thereof and design methodologies are disclosed. The method includes depositing metal material within openings and on a surface of dielectric material resulting in metal filled openings and a topography of recessed areas aligned with the metal filled openings. The method further includes depositing an alloying material over the metal material, including within the recessed areas. The method further includes planarizing the metal material, leaving the alloying material within the recessed areas. The method further includes diffusing the alloying material into the metal material forming alloyed regions self-aligned with the metal filled openings.