公开(公告)号：US20150340277A1

公开(公告)日：2015-11-26

申请号：US14283242

申请日：2014-05-21

Applicant: Infineon Technologies AG

Inventor： Christian Kuehn ,  Martin Bartels ,  Henning Feick ,  Dirk Offenberg ,  Anton Steltenpohl ,  Hans Taddiken ,  Ines Uhlig

IPC: H01L21/762 ,  H01L29/06

CPC classification number: H01L21/76237 ,  H01L21/26506 ,  H01L21/2652 ,  H01L21/26586 ,  H01L29/0607 ,  H01L29/0649

Abstract: A method for manufacturing a semiconductor device in accordance with various embodiments may include: forming an opening in a first region of a semiconductor substrate, the opening having at least one sidewall and a bottom; implanting dopant atoms into the at least one sidewall and the bottom of the opening; configuring at least a portion of a second region of the semiconductor substrate laterally adjacent to the first region as at least one of an amorphous or polycrystalline region; and forming an interconnect over at least one of the first and second regions of the semiconductor substrate.

Abstract translation: 根据各种实施例的用于制造半导体器件的方法可以包括：在半导体衬底的第一区域中形成开口，所述开口具有至少一个侧壁和底部; 将掺杂剂原子注入到所述开口的至少一个侧壁和底部中; 将所述半导体衬底的与所述第一区域横向相邻的第二区域的至少一部分配置为非晶区域或多晶区域中的至少一个; 以及在半导体衬底的第一和第二区域中的至少一个上形成互连。

公开(公告)号：US20150222317A1

公开(公告)日：2015-08-06

申请号：US14172925

申请日：2014-02-05

Applicant: Infineon Technologies AG

Inventor： Christian Kuehn ,  Martin Bartels ,  Henning Feick ,  Dirk Offenberg ,  Anton Steltenpohl ,  Hans Taddiken ,  Ines Uhlig

IPC: H04B1/44

CPC classification number: H04B1/44 ,  H01L21/324 ,  H01L29/1079 ,  H01L29/78

Abstract: According to various embodiments, a switching device may include: an antenna terminal; a switch including a first switch terminal and a second switch terminal, the first switch terminal coupled to the antenna terminal, the switch including at least one transistor at least one of over or in a silicon region including an oxygen impurity concentration of smaller than about 3×1017 atoms per cm3; and a transceiver terminal coupled to the second switch terminal, wherein the transceiver terminal is at least one of configured to provide a signal received via the antenna terminal or configured to receive a signal to be transmitted via the antenna terminal.

Abstract translation: 根据各种实施例，开关装置可以包括：天线端子; 包括第一开关端子和第二开关端子的开关，所述第一开关端子耦合到所述天线端子，所述开关包括至少一个晶体管，所述至少一个晶体管至少包括氧区杂质浓度小于约3的硅区域， ×1017原子/ cm3; 以及耦合到所述第二开关终端的收发机终端，其中所述收发机终端被配置为提供经由所述天线终端接收的或被配置为接收经由所述天线终端发送的信号中的至少一个。

公开(公告)号：US20250157988A1

公开(公告)日：2025-05-15

申请号：US18509751

申请日：2023-11-15

Applicant: Infineon Technologies AG

Inventor： Hans Taddiken ,  Christoph Kadow ,  Anton Steltenpohl

IPC: H01L25/065 ,  H01L23/00 ,  H01L23/29 ,  H01L23/31 ,  H01L25/00

Abstract: A three-dimensional integrated circuit includes a first integrated circuit having a first transistor and a first buried oxide layer; a second integrated circuit having a second transistor and a second buried oxide layer; a bond interface between an upper surface of the first integrated circuit and an upper surface of the second integrated circuit; a passivation layer coupled to the first buried oxide layer; and a mold wafer coupled to the second buried oxide layer.

公开(公告)号：US20250029884A1

公开(公告)日：2025-01-23

申请号：US18904744

申请日：2024-10-02

Applicant: Infineon Technologies AG

Inventor： Daniel Porwol ,  Thomas Fischer ,  Uwe Seidel ,  Anton Steltenpohl

IPC: H01L23/31 ,  H01L21/683 ,  H01L23/00 ,  H01L23/29

Abstract: A method of manufacturing a package that includes providing an electronic component that includes a dielectric layer as a base and a semiconductor die attached on top of the dielectric layer. The semiconductor die having an active area with monolithically integrated circuit elements. Encapsulating the dielectric layer and the semiconductor die by an encapsulant. The encapsulant is a mold compound having different material properties than the dielectric layer, and the dielectric layer includes a polymer.

公开(公告)号：US12112992B2

公开(公告)日：2024-10-08

申请号：US18107800

申请日：2023-02-09

Applicant: Infineon Technologies AG

Inventor： Daniel Porwol ,  Thomas Fischer ,  Uwe Seidel ,  Anton Steltenpohl

IPC: H01L23/31 ,  H01L21/683 ,  H01L23/29 ,  H01L23/00

CPC classification number: H01L23/3164 ,  H01L23/3121 ,  H01L23/3135 ,  H01L23/3192 ,  H01L21/6836 ,  H01L23/295 ,  H01L24/02 ,  H01L24/05 ,  H01L24/13 ,  H01L24/16 ,  H01L24/32 ,  H01L2221/68327 ,  H01L2221/68368 ,  H01L2224/02377 ,  H01L2224/02381 ,  H01L2224/05569 ,  H01L2224/13024 ,  H01L2224/16225 ,  H01L2224/32225 ,  H01L2924/10252 ,  H01L2924/10253 ,  H01L2924/10254 ,  H01L2924/10272 ,  H01L2924/10329 ,  H01L2924/1033 ,  H01L2924/10335

Abstract: A package includes: an electronic component that includes a dielectric layer as a base and a semiconductor die attached on top of the dielectric layer, the semiconductor die having an active area with monolithically integrated circuit elements; and an encapsulant encapsulating the dielectric layer and the semiconductor die. The encapsulant is a mold compound having different material properties than the dielectric layer. A method of manufacturing package is also described.

公开(公告)号：US10333510B2

公开(公告)日：2019-06-25

申请号：US15644435

申请日：2017-07-07

Applicant: Infineon Technologies AG

Inventor： Valentyn Solomko ,  Winfried Bakalski ,  Andrea Cattaneo ,  Bernd Schleicher ,  Anton Steltenpohl ,  Hans Taddiken ,  Danial Tayari

IPC: H03K17/16

Abstract: In accordance with an embodiment, a circuit includes an RF switch, a leakage compensation circuit having a bias port and a reference port, a replica resistor coupled between a reference node and the reference port of the leakage compensation circuit, and a bias resistor coupled between the bias port of the leakage compensation circuit and a load path of the RF switch. The leakage compensation circuit configured to mirror a current from the bias port to the reference port, and apply a voltage from the reference port to the bias port.

公开(公告)号：US10156864B2

公开(公告)日：2018-12-18

申请号：US15679263

申请日：2017-08-17

Applicant: Infineon Technologies AG

Inventor： Winfried Bakalski ,  Werner Simbuerger ,  Anton Steltenpohl ,  Hans Taddiken

IPC: H01L27/00 ,  G05F3/20 ,  H01L27/06 ,  H01L27/092 ,  H01L29/06 ,  H01L29/10 ,  H03G1/00

Abstract: In accordance with an embodiment, an integrated circuit includes a substrate, an amplifier MOSFET, and a bias voltage terminal configured to generate a potential difference of the substrate relative to at least one load terminal of the amplifier MOSFET.

公开(公告)号：US20180286941A1

公开(公告)日：2018-10-04

申请号：US15933998

申请日：2018-03-23

Applicant: Infineon Technologies AG

Inventor： Hans Taddiken ,  Martin Bartels ,  Andrea Cattaneo ,  Henning Feick ,  Christian Kuehn ,  Anton Steltenpohl

IPC: H01L49/02 ,  H01L27/06 ,  H01L23/66

CPC classification number: H01L28/20 ,  H01L23/5228 ,  H01L23/66 ,  H01L27/0641 ,  H01L2924/1421

Abstract: A radio frequency resistor element comprises a resistive polysilicon trace, an isolation component and a semiconductor substrate. The resistive polysilicon trace is located above the isolation component. The isolation component is laterally at least partially surrounded by a modified semiconductor region located above the semiconductor substrate and having a higher charge carrier recombination rate than the semiconductor substrate.

公开(公告)号：US09882600B2

公开(公告)日：2018-01-30

申请号：US14172925

申请日：2014-02-05

Applicant: Infineon Technologies AG

Inventor： Christian Kuehn ,  Martin Bartels ,  Henning Feick ,  Dirk Offenberg ,  Anton Steltenpohl ,  Hans Taddiken ,  Ines Uhlig

IPC: H04B1/00 ,  H04B1/44 ,  H01L21/324 ,  H01L29/78 ,  H01L29/10

CPC classification number: H04B1/44 ,  H01L21/324 ,  H01L29/1079 ,  H01L29/78

Abstract: According to various embodiments, a switching device may include: an antenna terminal; a switch including a first switch terminal and a second switch terminal, the first switch terminal coupled to the antenna terminal, the switch including at least one transistor at least one of over or in a silicon region including an oxygen impurity concentration of smaller than about 3×1017 atoms per cm3; and a transceiver terminal coupled to the second switch terminal, wherein the transceiver terminal is at least one of configured to provide a signal received via the antenna terminal or configured to receive a signal to be transmitted via the antenna terminal.

公开(公告)号：US20140252540A1

公开(公告)日：2014-09-11

申请号：US13790117

申请日：2013-03-08

Applicant: INFINEON TECHNOLOGIES AG

Inventor： Winfried Bakalski ,  Anton Steltenpohl

IPC: H01L23/28 ,  H01L23/50 ,  H01L21/78 ,  H01L23/538

CPC classification number: H01L23/28 ,  H01L21/561 ,  H01L21/78 ,  H01L23/13 ,  H01L23/147 ,  H01L23/3121 ,  H01L23/367 ,  H01L23/3677 ,  H01L23/50 ,  H01L23/538 ,  H01L24/97 ,  H01L2224/16225 ,  H01L2224/97 ,  H01L2924/12042 ,  H01L2224/81 ,  H01L2924/00

Abstract: A semiconductor device includes a semiconductor substrate having a first main surface in which a recess is formed. Further, the semiconductor device includes an electrical interconnect structure which is arranged at a bottom of the recess. A semiconductor chip is located in the recess. The semiconductor chip includes a plurality of chip electrodes facing the electrical interconnect structure. Further, a plurality of electrically conducting elements is arranged in the electrical interconnect structure and electrically connected to the plurality of chip electrodes.

Abstract translation: 半导体器件包括具有形成凹部的第一主表面的半导体衬底。 此外，半导体器件包括设置在凹部的底部的电互连结构。 半导体芯片位于凹槽中。 半导体芯片包括面向电互连结构的多个芯片电极。 此外，多个导电元件布置在电互连结构中并电连接到多个芯片电极。