Abstract:
A first semiconductor substrate having at least one integrated semiconductor device is provided. A lift-off layer is formed on a main surface of the first semiconductor substrate. The lift-off layer is patterned so as to form openings in the lift-off layer that are arranged on either side of a first portion of the lift-off layer. The first substrate is connected together with a second substrate by an interconnect structure to form an assembly with the main surface of the first semiconductor substrate being exposed. Exposed surfaces of the assembly are coated with a parylene coating, with a first portion of the parylene coating being supported by the first portion of the lift-off layer. The first portion of the parylene coating is selectively removed using a lift-off technique that removes the first portion of the lift-off layer. The lift-off technique is performed after connecting the first substrate and second substrates together.
Abstract:
An apparatus may include a back-bias magnet; and a semiconductor chip element; wherein the semiconductor chip element has a sensor for measuring a magnetic field strength; and wherein a contact surface is formed on a contact side of the back-bias magnet and on a contact side of the semiconductor chip element and wherein the contact side of the semiconductor chip element has one or more structures such that the contact surface of the back-bias magnet is shaped in a manner corresponding to the structures of the semiconductor chip element.
Abstract:
In one aspect, a method of packaging a semiconductor module includes providing a semiconductor module having a first surface, a second surface opposite the first surface and edge sides extending between the first surface and the second surface. A packaging assembly is formed at least partly by a 3D printing process. The packaging assembly includes the semiconductor module and a protective covering that extends over the first surface.
Abstract:
A graphene layer is generated on a substrate. A plastic material is deposited on the graphene layer to at least partially cover the graphene layer. The substrate is separated into at least two substrate pieces.
Abstract:
A semiconductor package includes a semiconductor chip, an inductor applied to the semiconductor chip. The inductor includes at least one winding. A space within the at least one winding is filled with a magnetic material.
Abstract:
What is proposed is an ultrasonic touch sensor having a contact surface for attaching the ultrasonic touch sensor to a casing, having a first ultrasonic transducer element, having a first semiconductor chip, wherein the first semiconductor chip comprises the first ultrasonic transducer element, wherein the first semiconductor chip is potted into a potting compound in such a way that a first cutout is formed from the first ultrasonic transducer element to the contact surface of the ultrasonic touch sensor, and wherein the potting compound forms the housing of the ultrasonic touch sensor.
Abstract:
An ultrasonic touch sensor includes: a covering having a contact face configured to receive a touch; a first ultrasonic transducer element; a first semiconductor chip comprising the first ultrasonic transducer element; a second ultrasonic transducer element; and an acoustic barrier formed between the first ultrasonic transducer element and the second ultrasonic transducer element.
Abstract:
A package is disclosed. In one example, the package comprises a carrier, an electronic component mounted on the carrier, and an encapsulant encapsulating at least part of the electronic component and only part of the carrier so that another exposed part of the carrier is exposed with regard to the encapsulant. The exposed part of the carrier comprises an electric connection structure and a corrosion protection structure. One of the electric connection structure and the corrosion protection structure is selectively formed on only a sub-portion of the other one of the electric connection structure and the corrosion protection structure outside of the encapsulant.
Abstract:
A microelectromechanical systems (MEMS) package assembly and a method of manufacturing the same is provided. The MEMS package assembly includes a substrate, a housing coupled to the substrate to form a cavity, wherein the housing includes a transparent plate disposed above and parallel to the substrate and is configured to permit a transmission of light therethrough, and a MEMS chip disposed within the cavity and including a first main surface proximal to the transparent plate and a second main surface opposite to the first main surface and coupled to the substrate. The MEMS chip is oriented such that the first main surface is tilted at a tilt angle with respect to the transparent plate.
Abstract:
A surface mountable microphone package comprises a first microphone and a second microphone. Furthermore, the surface mountable microphone package comprises a first opening for the first microphone and a second opening for the second microphone. The first opening and the second opening are arranged on opposite sides of the surface mountable microphone package.