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    Enhanced work function layer supporting growth of rutile phase titanium oxide
    11.
    发明授权
    Enhanced work function layer supporting growth of rutile phase titanium oxide 有权
    增强功能层支持金红石相氧化钛的生长

    公开(公告)号：US08975147B2

    公开(公告)日：2015-03-10

    申请号：US13708035

    申请日：2012-12-07

    Applicant: Intermolecular, Inc.

    Inventor： Xiangxin Rui ,  Hanhong Chen ,  Pragati Kumar ,  Sandra G. Malhotra

    IPC: H01L21/02 ,  C01G23/047 ,  C23C16/02 ,  C23C16/34 ,  C23C16/40 ,  C23C16/455 ,  H01L49/02 ,  H01L27/108 ,  B82Y99/00

    CPC classification number: H01L21/02 ,  B82Y99/00 ,  C01G23/047 ,  C01P2002/72 ,  C23C16/0272 ,  C23C16/34 ,  C23C16/405 ,  C23C16/45525 ,  H01L21/02186 ,  H01L21/0228 ,  H01L27/1085 ,  H01L28/40

    Abstract: This disclosure provides a method of fabricating a semiconductor stack and associated device, such as a capacitor and DRAM cell. In particular, a bottom electrode has a material selected for lattice matching characteristics. This material may be created from a relatively inexpensive metal oxide which is processed to adopt a conductive, but difficult-to-produce oxide state, with specific crystalline form; to provide one example, specific materials are disclosed that are compatible with the growth of rutile phase titanium dioxide (TiO2) for use as a dielectric, thereby leading to predictable and reproducible higher dielectric constant and lower effective oxide thickness and, thus, greater part density at lower cost.

    Abstract translation: 本公开提供了制造半导体堆叠和相关设备（诸如电容器和DRAM单元）的方法。 特别地，底部电极具有选择用于晶格匹配特性的材料。 该材料可以由相对廉价的金属氧化物制成，其被处理成具有特定结晶形式的导电但难以产生的氧化物状态; 为了提供一个实例，公开了与用作电介质的金红石相二氧化钛（TiO 2）的生长相容的具体材料，从而导致可预测和可再现的较高介电常数和较低的有效氧化物厚度，因此更大的部分密度 以较低的成本。

    Methods to improve leakage of high K materials
    12.
    发明授权
    Methods to improve leakage of high K materials 有权
    改善高K材料泄漏的方法

    公开(公告)号：US08846468B2

    公开(公告)日：2014-09-30

    申请号：US13716375

    申请日：2012-12-17

    Applicant: Intermolecular, Inc. ,  Elpida Memory, Inc

    Inventor： Xiangxin Rui ,  Sergey Barabash

    IPC: H01L21/00 ,  H01L49/02

    CPC classification number: H01L28/75 ,  H01L28/40 ,  H01L28/56 ,  H01L28/60

    Abstract: A method for reducing the leakage current in DRAM Metal-Insulator-Metal capacitors includes forming a capacitor stack including an oxygen donor dopant incorporated within the dielectric layer. The oxygen donor dopants may be incorporated within the dielectric layer during the formation of the dielectric layer. The oxygen donor materials provide oxygen to the dielectric layer and reduce the concentration of oxygen vacancies, thus reducing the leakage current.

    Abstract translation: 用于减少DRAM金属 - 绝缘体 - 金属电容器中的漏电流的方法包括形成包含掺杂在电介质层内的氧供体掺杂剂的电容器堆叠。 在形成电介质层期间，可将氧供体掺杂物掺入电介质层内。 氧供体材料为介电层提供氧气并降低氧空位的浓度，从而减少漏电流。

    Methods to improve leakage for ZrO2 based high K MIM capacitor
    13.
    发明授权
    Methods to improve leakage for ZrO2 based high K MIM capacitor 有权
    改善ZrO2基高K MIM电容器泄漏的方法

    公开(公告)号：US08815695B2

    公开(公告)日：2014-08-26

    申请号：US13727898

    申请日：2012-12-27

    Applicant: Intermolecular, Inc. ,  Elpida Memory, Inc

    Inventor： Xiangxin Rui ,  Mitsuhiro Horikawa ,  Hiroyuki Ode ,  Karthik Ramani

    IPC: H01L21/02 ,  H01L27/108 ,  H01L29/92 ,  H01L21/8242 ,  H01L21/316 ,  H01L27/04 ,  H01L49/02

    CPC classification number: H01L28/40 ,  H01L28/56 ,  H01L28/65 ,  H01L28/75

    Abstract: A first electrode layer for a Metal-Insulator-Metal (MIM) DRAM capacitor is formed wherein the first electrode layer contains a conductive base layer and conductive metal oxide layer. A second electrode layer for a Metal-Insulator-Metal (MIM) DRAM capacitor is formed wherein the second electrode layer contains a conductive base layer and conductive metal oxide layer. In some embodiments, both the first electrode layer and the second electrode layer contain a conductive base layer and conductive metal oxide layer.

    Abstract translation: 形成金属绝缘体金属（MIM）DRAM电容器的第一电极层，其中第一电极层包含导电基底层和导电金属氧化物层。 形成金属绝缘体金属（MIM）DRAM电容器的第二电极层，其中第二电极层包含导电基底层和导电金属氧化物层。 在一些实施例中，第一电极层和第二电极层都包含导电基底层和导电金属氧化物层。

    Methods for Reproducible Flash Layer Deposition
    14.
    发明申请
    Methods for Reproducible Flash Layer Deposition 审中-公开

    公开(公告)号：US20140183695A1

    公开(公告)日：2014-07-03

    申请号：US13731548

    申请日：2012-12-31

    Applicant: INTERMOLECULAR, INC. ,  ELPIDA MEMORY, INC.

    Inventor： Sandra G. Malhotra ,  Hiroyuki Ode ,  Xiangxin Rui

    IPC: H01L49/02

    CPC classification number: H01L28/56 ,  H01L28/65 ,  H01L28/75

    Abstract: A method for reducing the leakage current in DRAM Metal-Insulator-Metal capacitors includes forming a flash layer between the dielectric layer and the first electrode layer. A method for reducing the leakage current in DRAM Metal-Insulator-Metal capacitors includes forming a capping layer between the dielectric layer and the second electrode layer. The flash layer and the capping layer can be formed using an atomic layer deposition (ALD) technique. The precursor materials used for forming the flash layer and the capping layer are selected such they include at least one metal-oxygen bond. Additionally, the precursor materials are selected to also include “bulky” ligands.

    Methods to Improve Leakage of High K Materials
    15.
    发明申请
    Methods to Improve Leakage of High K Materials 有权
    提高高K材料渗漏的方法

    公开(公告)号：US20140170833A1

    公开(公告)日：2014-06-19

    申请号：US13716375

    申请日：2012-12-17

    Applicant: INTERMOLECULAR, INC. ,  ELPIDA MEMORY, INC.

    Inventor： Xiangxin Rui ,  Sergey Barabash

    IPC: H01L49/02

    CPC classification number: H01L28/75 ,  H01L28/40 ,  H01L28/56 ,  H01L28/60

    Abstract: A method for reducing the leakage current in DRAM Metal-Insulator-Metal capacitors includes forming a capacitor stack including an oxygen donor dopant incorporated within the dielectric layer. The oxygen donor dopants may be incorporated within the dielectric layer during the formation of the dielectric layer. The oxygen donor materials provide oxygen to the dielectric layer and reduce the concentration of oxygen vacancies, thus reducing the leakage current.

    Abstract translation: 用于减少DRAM金属 - 绝缘体 - 金属电容器中的漏电流的方法包括形成包含掺杂在电介质层内的氧供体掺杂剂的电容器堆叠。 在形成电介质层期间，可将氧供体掺杂物掺入电介质层内。 氧供体材料为介电层提供氧气并降低氧空位的浓度，从而减少漏电流。

    Semiconductor stacks including catalytic layers
    16.
    发明授权
    Semiconductor stacks including catalytic layers 有权
    包括催化层的半导体堆叠

    公开(公告)号：US08581319B2

    公开(公告)日：2013-11-12

    申请号：US13738901

    申请日：2013-01-10

    Applicant: Intermolecular, Inc.

    Inventor： Hanhong Chen ,  Sandra G. Malhotra ,  Hiroyuki Ode ,  Xiangxin Rui

    IPC: H01L29/94

    CPC classification number: H01L28/56 ,  H01L21/02175 ,  H01L21/02189 ,  H01L21/0228 ,  H01L21/02304 ,  H01L28/40

    Abstract: A method for fabricating a dynamic random access memory (DRAM) capacitor includes forming a first electrode layer, forming a catalytic layer on the first electrode layer, optionally annealing the catalytic layer, forming a dielectric layer on the catalytic layer, optionally annealing the dielectric layer, forming a second electrode layer on the dielectric layer, and optionally annealing the capacitor stack. Advantageously, the electrode layers are TiN, the catalytic layer is MoO2−x where x is between 0 and 2, and the physical thickness of the catalytic layer is between about 0.5 nm and about 10 nm, and the dielectric layer is ZrO2.

    Abstract translation: 一种用于制造动态随机存取存储器（DRAM）电容器的方法包括：形成第一电极层，在第一电极层上形成催化层，任选地退火催化层，在催化层上形成电介质层， 在电介质层上形成第二电极层，并且可选地对电容器堆叠进行退火。 有利地，电极层是TiN，催化剂层是MoO 2-x，其中x在0和2之间，催化层的物理厚度在约0.5nm和约10nm之间，并且电介质层是ZrO 2。

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