Interchangeable CML/LVDS data transmission circuit
    11.
    发明授权
    Interchangeable CML/LVDS data transmission circuit 有权
    可交换CML / LVDS数据传输电路

    公开(公告)号:US06847232B2

    公开(公告)日:2005-01-25

    申请号:US10059987

    申请日:2002-01-29

    摘要: A system and method is described for a driver circuit used for high speed data transmission in LVDS and CML transceiver device applications. The transceivers are intended to receive a low voltage differential input signal and interchangeably drive a standard LVDS load with a TIA/EIA-644 compliant LVDS signal, and a standard CML load with a standard CML compatible signal. The driver circuit operates at speeds up to 1.36 Gbps, making it compatible with the OC-24 signaling rate for optical transmission. To accomplish this, the driver uses a mixed combination of voltage and current mode drive sections in the output circuit when coupled to LVDS loads, and when the driver is coupled to CML loads, operates purely in a current mode using only the current mode drive section. MOS transistors and a current source are used in the current mode switch portion to switch the drive with a constant current at the high speeds, and NPN transistors in the voltage mode output portion provide variable impedance for the output circuit. A common mode compensation circuit using a feedback voltage from the load generates a compensation signal for variable impedance control of the NPN transistors to yield a regulated voltage for the common mode dc voltage.

    摘要翻译: 描述了用于LVDS和CML收发器设备应用中用于高速数据传输的驱动器电路的系统和方法。 收发器旨在接收低电压差分输入信号,并可互换地使用符合TIA / EIA-644标准的LVDS信号驱动标准LVDS负载,以及具有标准CML兼容信号的标准CML负载。 驱动器电路的工作速度高达1.36 Gbps,使其与OC-24信号传输速率兼容。 为了实现这一点,驱动器在耦合到LVDS负载时使用输出电路中的电压和电流模式驱动部分的混合组合,并且当驱动器耦合到CML负载时,仅使用当前模式驱动部分 。 MOS晶体管和电流源用于电流模式开关部分,以高速度以恒定电流切换驱动器,并且电压模式输出部分中的NPN晶体管为输出电路提供可变阻抗。 使用来自负载的反馈电压的共模补偿电路产生用于NPN晶体管的可变阻抗控制的补偿信号,以产生用于共模直流电压的调节电压。

    Apparatus and method for inhibiting decomposition of germane
    12.
    发明授权
    Apparatus and method for inhibiting decomposition of germane 有权
    用于抑制锗烷分解的装置和方法

    公开(公告)号:US06716271B1

    公开(公告)日:2004-04-06

    申请号:US10282377

    申请日:2002-10-29

    IPC分类号: B01D5304

    摘要: A germane storage and dispensing system, in which germane gas is sorptively retained on an activated carbon sorbent medium in a vessel containing adsorbed and free germane gas. The activated carbon sorbent medium is deflagration-resistant in relation to the germane gas adsorbed thereon, i.e., under deflagration conditions of 65° C. and 650 torr, under which free germane gas undergoes deflagration, the activated carbon sorbent medium does not sustain deflagration of the adsorbed germane gas or thermally desorb the germane gas so that it undergoes subsequent deflagration. The deflagration-resistance of the activated carbon sorbent medium is promoted by pre-treatment of the sorbent material to remove extraneous sorbables therefrom and by maintaining the fill level of the sorbent medium in the gas storage and dispensing vessel at a substantial value, e.g., of at least 30%.

    摘要翻译: 锗烷存储和分配系统,其中将锗烷气体吸附保留在含有吸附和游离的锗烷气体的容器中的活性炭吸附剂介质上。 活性炭吸附剂介质相对于其上吸附的锗烷气体,即在65℃和650托的爆燃条件下,具有爆燃阻力,在此条件下,游离的锗烷气体经历爆燃,活性炭吸附剂介质不能保持爆燃 吸附的锗烷气体或热解吸锗烷气体,使其经历随后的爆燃。 通过预处理吸附剂材料来促进活性炭吸附剂介质的防爆性,以从其中除去外来的吸附物,并且通过将吸附剂介质在气体储存和分配容器中的填充水平保持在基本值,例如 至少30%。

    System and method for testing one or more dies on a semiconductor wafer
    18.
    发明申请
    System and method for testing one or more dies on a semiconductor wafer 有权
    用于测试半导体晶片上的一个或多个管芯的系统和方法

    公开(公告)号:US20070152700A1

    公开(公告)日:2007-07-05

    申请号:US11707408

    申请日:2007-02-16

    IPC分类号: G01R31/26

    摘要: A testing system or method compares read data from one or more dies in a semiconductor wafer with the original data written onto the one or more dies The testing system includes one or more write registers connected to one or more dies on the semiconductor wafer. One or more comparators are connected to the dies and the write registers. The comparator generates a result in response to the original data and the read data.

    摘要翻译: 测试系统或方法将半导体晶片中的一个或多个管芯的读取数据与写入一个或多个管芯的原始数据进行比较。测试系统包括连接到半导体晶片上的一个或多个管芯的一个或多个写入寄存器。 一个或多个比较器连接到管芯和写入寄存器。 比较器响应原始数据和读取数据产生结果。