公开(公告)号：US20030022466A1

公开(公告)日：2003-01-30

申请号：US09911446

申请日：2001-07-25

申请人： MOTOROLA, INC.

发明人： Nestor Javier Escalera ,  Rudy M. Emrick ,  Bruce Allen Bosco

IPC分类号： H01L021/20

CPC分类号： H03F1/3229 ,  H01L21/02381 ,  H01L21/02488 ,  H01L21/02505 ,  H01L21/02513 ,  H01L21/02521 ,  H01L21/8221 ,  H01L21/8258 ,  H01L27/0605 ,  H01L27/0688 ,  H01L2924/00011 ,  H01L2224/80001

摘要： A semiconductor structure includes a monocrystalline silicon substrate, a buffer layer including an amorphous oxide material overlying the monocrystalline silicon substrate and a monocrystalline perovskite oxide material overlying the amorphous oxide material and a monocrystalline compound semiconductor material overlying the monocrystalline perovskite oxide material. The semiconductor structure further includes power amplifier and associated linearization circuit for the power amplifier.

摘要翻译： 半导体结构包括单晶硅衬底，包括覆盖在单晶硅衬底上的无定形氧化物材料的缓冲层和覆盖在非晶氧化物材料上的单晶钙钛矿氧化物材料和覆盖单晶钙钛矿氧化物材料的单晶化合物半导体材料。 半导体结构还包括用于功率放大器的功率放大器和相关联的线性化电路。

公开(公告)号：US20030022430A1

公开(公告)日：2003-01-30

申请号：US09910753

申请日：2001-07-24

申请人： MOTOROLA, INC.

发明人： Rudy M. Emrick ,  Bruce Allen Bosco ,  John E. Holmes ,  Steven James Franson ,  Stephen Kent Rockwell

IPC分类号： H01L031/0328 ,  H01L021/336 ,  H01L029/76 ,  H01L031/0336 ,  H01L031/072 ,  H01L031/109 ,  H01L021/8249 ,  H01L029/94 ,  H01L031/119 ,  H01L031/113 ,  H01L031/062

CPC分类号： H01L29/66848 ,  H01L21/02381 ,  H01L21/02488 ,  H01L21/02505 ,  H01L21/02513 ,  H01L21/02521 ,  H01L21/8258 ,  H01L27/0605 ,  H01L27/15 ,  H01S5/021 ,  H01S5/0261 ,  H01S2301/173

摘要： A semiconductor structure includes a monocrystalline silicon substrate, an amorphous oxide material overlying the monocrystalline silicon substrate, a monocrystalline perovskite oxide material overlying the amorphous oxide material, and a monocrystalline compound semiconductor material overlying the monocrystalline perovskite oxide material. A composite transistor includes a first transistor having first active regions formed in the monocrystalline silicon substrate, a second transistor having second active regions formed in the monocrystalline compound semiconductor material, and a mode control terminal for controlling the first transistor and the second transistor.

摘要翻译： 半导体结构包括单晶硅衬底，覆盖单晶硅衬底的非晶氧化物材料，覆盖在非晶氧化物材料上的单晶钙钛矿氧化物材料，以及覆盖单晶钙钛矿氧化物材料的单晶化合物半导体材料。 复合晶体管包括具有形成在单晶硅衬底中的第一有源区的第一晶体管，形成在单晶化合物半导体材料中的第二有源区的第二晶体管，以及用于控制第一晶体管和第二晶体管的模式控制端。

公开(公告)号：US20030017722A1

公开(公告)日：2003-01-23

申请号：US09905933

申请日：2001-07-17

申请人： MOTOROLA, INC

发明人： Rudy M. Emrick

IPC分类号： H01L021/00 ,  C30B001/00 ,  H01L021/20 ,  H01L021/36 ,  H01L021/31 ,  H01L029/76

CPC分类号： C30B25/02 ,  C30B25/18 ,  C30B29/40 ,  C30B29/403 ,  C30B29/406 ,  H01L21/02381 ,  H01L21/02488 ,  H01L21/02505 ,  H01L21/02513 ,  H01L21/02521 ,  H01L21/76895 ,  H01L21/8258 ,  H01L27/0605

摘要： Phased array components utilizing two or more different types of semiconductor in one monolithic device are provided. High quality epitaxil layers of monocrystalline materials can be grown overlying monocrystalline substrates such as large silicon wafers by forming a compliant substrate for growing the monocrystalline layers. An accommodating buffer layer comprises a layer of monocrystalline oxide spaced apart from a silicon wafer by an amorphous interface layer of silicon oxide. The amorphous interface layer dissipates strain and permits the growth of a high quality monocrystalline oxide accommodating buffer layer. The accommodating buffer layer is lattice matched to both the underlying silicon wafer and the overlying monocrystalline material layer. Any lattice mismatch between the accommodating buffer layer and the underlying silicon substrate is taken care of by the amorphous interface layer. In addition, formation of a compliant substrate may include utilizing surfactant enhanced epitaxy, epitaxil growth of single crystal silicon onto single crystal oxide, and epitaxil growth of Zintl phase materials.

摘要翻译： 提供了在一个单片设备中利用两种或更多种不同类型的半导体的相控阵组件。 通过形成用于生长单晶层的柔性衬底，可以将单晶材料的高质量外延片层生长成覆盖在单晶衬底例如大硅晶片上。 容纳缓冲层包括通过硅氧化物的非晶界面层与硅晶片间隔开的单晶氧化物层。 非晶界面层消耗应变并允许高质量单晶氧化物容纳缓冲层的生长。 容纳缓冲层与下面的硅晶片和上覆的单晶材料层晶格匹配。 通过非晶界面层处理容纳缓冲层和底层硅衬底之间的任何晶格失配。 此外，顺应性衬底的形成可以包括利用表面活性剂增强的外延，单晶硅在单晶氧化物上的外延生长，以及Zintl相材料的外延生长。

公开(公告)号：US20030015728A1

公开(公告)日：2003-01-23

申请号：US09905902

申请日：2001-07-17

申请人： MOTOROLA, INC.

发明人： Bruce Allen Bosco ,  Rudy M. Emrick ,  Sowmyan Ranganathan

IPC分类号： H01L031/0328 ,  H01L031/0336 ,  H01L031/072

CPC分类号： H01L31/0687 ,  H01L21/02197 ,  H01L21/31691 ,  H01L27/0605 ,  H01L27/142 ,  H01L31/125 ,  H01L31/1852 ,  Y02E10/544

摘要： A photonic biasing and solar charging network is disclosed. High quality epitaxial layers of monocrystalline materials grown over monocrystalline substrates enables the formation of solar cells, light sources and optical interconnects to be placed on the same substrate as the active device. By coupling the solar cells to the active device to provide bias voltages, transmission line effects and multiple input/output pads necessary for traditional DC biasing can be eliminated. Additionally, the photonic biasing network can be additionally utilized as a solar charging network for trickle charging batteries.

摘要翻译： 公开了一种光子偏置和太阳能充电网络。 在单晶衬底上生长的单晶材料的高质量外延层使得能够形成太阳能电池，光源和光学互连件以被放置在与有源器件相同的衬底上。 通过将太阳能电池耦合到有源器件以提供偏置电压，可以消除传统DC偏置所需的传输线效应和多个输入/输出焊盘。 此外，光子偏压网络可以另外用作用于涓流充电电池的太阳能充电网络。

公开(公告)号：US20030013284A1

公开(公告)日：2003-01-16

申请号：US09904894

申请日：2001-07-16

申请人： MOTOROLA, INC.

发明人： Rudy M. Emrick ,  Nestor J. Escalera

IPC分类号： H01L021/28 ,  H01L021/44 ,  H01L031/0328

CPC分类号： H03F3/605 ,  H01L21/02381 ,  H01L21/02488 ,  H01L21/02505 ,  H01L21/02513 ,  H01L21/02521 ,  H01L21/8258 ,  H01L27/0605 ,  H03F3/211 ,  H03F3/602

摘要： Power combining amplifiers using two different monocrystalline materials in a monolithic device are provided. High quality epitaxial layers of monocrystalline materials can be grown overlying monocrystalline substrates such as large silicon wafers by forming a compliant substrate for growing the monocrystalline layers. An accommodating buffer layer comprises a layer of monocrystalline oxide spaced apart from a silicon wafer by an amorphous interface layer of silicon oxide. The amorphous interface layer dissipates strain and permits the growth of a high quality monocrystalline oxide accommodating buffer layer. The accommodating buffer layer is lattice matched to both the underlying silicon wafer and the overlying monocrystalline material layer. Any lattice mismatch between the accommodating buffer layer and the underlying silicon substrate is taken care of by the amorphous interface layer. In addition, formation of a compliant substrate may include utilizing surfactant enhanced epitaxy, epitaxial growth of single crystal silicon onto single crystal oxide, and epitaxial growth of Zintl phase materials.

摘要翻译： 提供了在单片设备中使用两种不同单晶材料的功率组合放大器。 通过形成用于生长单晶层的柔性衬底，可以将单晶材料的高质量外延层生长在覆盖单晶衬底（例如大硅晶片）上。 容纳缓冲层包括通过硅氧化物的非晶界面层与硅晶片间隔开的单晶氧化物层。 非晶界面层消耗应变并允许高质量单晶氧化物容纳缓冲层的生长。 容纳缓冲层与下面的硅晶片和上覆的单晶材料层晶格匹配。 通过非晶界面层处理容纳缓冲层和底层硅衬底之间的任何晶格失配。 此外，顺应性衬底的形成可以包括利用表面活性剂增强的外延，将单晶硅外延生长到单晶氧化物上，以及Zintl相材料的外延生长。

公开(公告)号：US20030015756A1

公开(公告)日：2003-01-23

申请号：US09909939

申请日：2001-07-23

申请人： MOTOROLA, INC.

发明人： Bryan Keith Farber ,  Steven James Franson ,  John E. Holmes ,  Rudy M. Emrick

IPC分类号： H01L029/06 ,  H01L029/76 ,  H01L029/94 ,  H01L031/062 ,  H01L031/113 ,  H01L031/119

CPC分类号： H01L21/8258 ,  H01L21/02197 ,  H01L21/02381 ,  H01L21/02488 ,  H01L21/02505 ,  H01L21/02513 ,  H01L21/02521 ,  H01L21/31691 ,  H01L21/8221 ,  H01L27/0605 ,  H01L27/0688 ,  H01L2924/00011 ,  H01L2224/80001

摘要： A semiconductor structure for integrated control of an active subcircuit includes a monocrystalline silicon substrate, an amorphous oxide material overlying the monocrystalline silicon substrate, a monocrystalline perovskite oxide material overlying the amorphous oxide material, a monocrystalline compound semiconductor material overlying the monocrystalline perovskite oxide material, the active subcircuit in the monocrystalline compound semiconductor material, and a bias subcircuit in the monocrystalline silicon substrate and electrically coupled to the active subcircuit to bias the active subcircuit.

摘要翻译： 用于集成控制有源分支电路的半导体结构包括单晶硅衬底，覆盖单晶硅衬底的无定形氧化物材料，覆盖非晶氧化物材料的单晶钙钛矿氧化物材料，覆盖单晶钙钛矿氧化物材料的单晶化合物半导体材料， 单晶化合物半导体材料中的有源子电路，以及单晶硅衬底中的偏置子电路，并且电耦合到有源子电路以偏置有源子电路。

公开(公告)号：US20030015707A1

公开(公告)日：2003-01-23

申请号：US09905869

申请日：2001-07-17

申请人： MOTOROLA, INC.

发明人： Bruce Allen Bosco ,  Rudy M. Emrick ,  Steven James Franson ,  Nestor Javier Escalera ,  Bryan K. Farber

IPC分类号： H01L029/04

CPC分类号： H03F3/602 ,  H01L21/02381 ,  H01L21/02488 ,  H01L21/02505 ,  H01L21/02513 ,  H01L21/02521 ,  H01L21/8258 ,  H01L27/0605 ,  H03F3/087 ,  H03F2200/451

摘要： High quality epitaxial layers of monocrystalline materials can be grown overlying monocrystalline substrates such as large silicon wafers by forming a compliant substrate for growing the monocrystalline layers. An accommodating buffer layer comprises a layer of monocrystalline oxide spaced apart from the silicon wafer by an amorphous interface layer of silicon oxide. The amorphous interface layer dissipates strain and permits the growth of a high quality monocrystalline oxide accommodating buffer layer. The accommodating buffer layer is lattice matched to both the underlying silicon wafer and the overlying monocrystalline material layer. Any lattice mismatch between the accommodating buffer layer and the underlying silicon substrate is taken care of by the amorphous interface layer. Radio frequency, optical, logic and other circuits in both silicon and compound semiconductor materials may be combined and interconnected in a single semiconductor structure.

摘要翻译： 通过形成用于生长单晶层的柔性衬底，可以将单晶材料的高质量外延层生长在覆盖单晶衬底（例如大硅晶片）上。 容纳缓冲层包括通过硅氧化物的非晶界面层与硅晶片间隔开的单晶氧化物层。 非晶界面层消耗应变并允许高质量单晶氧化物容纳缓冲层的生长。 容纳缓冲层与下面的硅晶片和上覆的单晶材料层晶格匹配。 通过非晶界面层处理容纳缓冲层和底层硅衬底之间的任何晶格失配。 硅和化合物半导体材料中的射频，光学，逻辑和其他电路可以在单个半导体结构中组合和互连。

公开(公告)号：US20030013319A1

公开(公告)日：2003-01-16

申请号：US09901110

申请日：2001-07-10

申请人： MOTOROLA, INC.

发明人： John E. Holmes ,  Kurt W. Eisenbeiser ,  Rudy M. Emrick ,  Steven James Franson ,  Stephen Kent Rockwell

IPC分类号： H01L021/31 ,  H01L021/469 ,  H01L021/20 ,  H01L021/36

CPC分类号： H01L29/66318 ,  H01L21/02381 ,  H01L21/02488 ,  H01L21/02505 ,  H01L21/02513 ,  H01L21/02521 ,  H01L21/8221 ,  H01L21/8258 ,  H01L27/0605 ,  H01L27/0688 ,  H01L27/15 ,  H01L29/267 ,  H01L29/66462 ,  H01L2924/00011 ,  H01L2224/80001

摘要： A semiconductor structure with selective doping includes a monocrystalline silicon substrate, an amorphous oxide material overlying the monocrystalline silicon substrate, a monocrystalline perovskite oxide material overlying the amorphous oxide material, at least one monocrystalline compound semiconductor material overlying the monocrystalline perovskite oxide material, and a transistor in the at least one monocrystalline compound semiconductor material and including active regions having different conductivity levels under substantially identical bias conditions.

摘要翻译： 具有选择性掺杂的半导体结构包括单晶硅衬底，覆盖单晶硅衬底的非晶氧化物材料，覆盖在非晶氧化物材料上的单晶钙钛矿氧化物材料，覆盖单晶钙钛矿氧化物材料的至少一种单晶化合物半导体材料，以及晶体管 在至少一种单晶化合物半导体材料中，并且在基本上相同的偏压条件下包括具有不同导电率的有源区。

公开(公告)号：US20030006470A1

公开(公告)日：2003-01-09

申请号：US09897968

申请日：2001-07-05

申请人： MOTOROLA, INC.

发明人： Steven James Franson ,  Daniel S. Marshall ,  Paige M. Holm ,  John E. Holmes ,  Bruce Allen Bosco ,  Rudy M. Emrick

IPC分类号： H01L031/058

CPC分类号： H01L31/101 ,  H01L21/8258 ,  H01L23/38 ,  H01L27/0605 ,  H01L27/0688 ,  H01L27/15 ,  H01L27/16 ,  H01L31/1852 ,  H01L2924/0002 ,  H01S5/021 ,  H01S5/0261 ,  H01S5/183 ,  Y02E10/544 ,  H01L2924/00

摘要： High quality epitaxial layers of monocrystalline materials can be grown overlying monocrystalline substrates such as large silicon wafers by forming a compliant substrate for growing the monocrystalline layers. An accommodating buffer layer comprises a layer of monocrystalline oxide spaced apart from a silicon wafer by an amorphous interface layer of silicon oxide. In addition, formation of a compliant substrate may include utilizing surfactant enhanced epitaxy, epitaxial growth of single crystal silicon onto single crystal oxide, and epitaxial growth of Zintl phase materials. A thermo-electric device is integrated into the semiconductor structure.

摘要翻译： 通过形成用于生长单晶层的柔性衬底，可以将单晶材料的高质量外延层生长在覆盖单晶衬底（例如大硅晶片）上。 容纳缓冲层包括通过硅氧化物的非晶界面层与硅晶片间隔开的单晶氧化物层。 此外，顺应性衬底的形成可以包括利用表面活性剂增强的外延，将单晶硅外延生长到单晶氧化物上，以及Zintl相材料的外延生长。 半导体结构中集成有热电装置。

公开(公告)号：US20020008234A1

公开(公告)日：2002-01-24

申请号：US09840213

申请日：2001-04-23

申请人： Motorola, Inc.

发明人： Rudy M. Emrick ,  Keith V. Warble

IPC分类号： H01L029/12

CPC分类号： H01L21/02488 ,  C23C16/26 ,  C30B25/02 ,  C30B25/18 ,  C30B29/04 ,  H01L21/02378 ,  H01L21/02381 ,  H01L21/02439 ,  H01L21/02505 ,  H01L21/02513 ,  H01L21/02521 ,  H01L21/31691 ,  H01L21/318 ,  H01L21/8221 ,  H01L21/8258 ,  H01L23/66 ,  H01L27/0605 ,  H01L27/0688 ,  H01L2924/00011 ,  H01L2924/0002 ,  H01L2924/00 ,  H01L2224/80001

摘要： Mixed-signal devices (300) are formed using high quality epitaxial layers of monocrystalline materials grown overlying a monocrystalline substrate such as a large silicon wafer (302), using an accommodating buffer layer (304). The accommodating buffer layer (304) is a layer of monocrystalline oxide spaced apart from the silicon wafer by an amorphous interface layer of silicon oxide or an amorphous layer formed from a monocrystalline precursor. The device (300) includes passive components (314) formed away from the substrate (302), to minimize adverse signal interaction between passive component (314) signals and the substrate (302).

摘要翻译： 使用容纳缓冲层（304），使用生长在诸如大硅晶片（302）的单晶衬底上生长的单晶材料的高质量外延层来形成混合信号器件（300）。 容纳缓冲层（304）是通过氧化硅的非晶界面层或由单晶前体形成的非晶层与硅晶片间隔开的单晶氧化物层。 器件（300）包括远离衬底（302）形成的无源部件（314），以最小化无源部件（314）信号与衬底（302）之间的不利信号相互作用。