公开(公告)号：US20190006306A1

公开(公告)日：2019-01-03

申请号：US16006623

申请日：2018-06-12

Applicant: Murata Manufacturing Co., Ltd.

Inventor： Masahiro SHIBATA ,  Daisuke TOKUDA ,  Atsushi KUROKAWA ,  Hiroaki TOKUYA ,  Yasunari UMEMOTO

IPC: H01L23/00

CPC classification number: H01L24/14 ,  H01L23/3171 ,  H01L24/03 ,  H01L24/05 ,  H01L24/06 ,  H01L24/11 ,  H01L24/13 ,  H01L2224/034 ,  H01L2224/0346 ,  H01L2224/0361 ,  H01L2224/0401 ,  H01L2224/05022 ,  H01L2224/0508 ,  H01L2224/05084 ,  H01L2224/05086 ,  H01L2224/05547 ,  H01L2224/05558 ,  H01L2224/05572 ,  H01L2224/0603 ,  H01L2224/1146 ,  H01L2224/1147 ,  H01L2224/11849 ,  H01L2224/13014 ,  H01L2224/13022 ,  H01L2224/13076 ,  H01L2224/13082 ,  H01L2224/13111 ,  H01L2224/13147 ,  H01L2224/1403 ,  H01L2924/014 ,  H01L2924/00014 ,  H01L2924/01047 ,  H01L2924/01029 ,  H01L2924/01082

Abstract: A semiconductor chip includes a semiconductor substrate having a main surface, first and second electrodes, a first insulating layer, and first and second bumps. The first and second electrodes are formed above the main surface of the semiconductor substrate. The first insulating layer is formed above a first portion of the first electrode. The first bump is formed above a second portion of the first electrode and above the first insulating layer and is electrically connected to the first electrode. The second bump is formed above the second electrode. The area of the second bump is larger than that of the first bump in a plan view of the main surface of the semiconductor substrate. The first insulating layer adjusts the distance from the main surface of the semiconductor substrate to the top surface of the first bump in a direction normal to the main surface.

公开(公告)号：US20230208004A1

公开(公告)日：2023-06-29

申请号：US18168644

申请日：2023-02-14

Applicant: Murata Manufacturing Co., Ltd.

Inventor： Daisuke TOKUDA ,  Ryangsu KIM

IPC: H01P5/18 ,  H01P1/10 ,  H03H7/38

CPC classification number: H01P5/18 ,  H01P1/10 ,  H03H7/38

Abstract: A directional coupler includes a main line, sub-lines, and a switch. The sub-lines are located at positions that enable the sub-lines to be electromagnetically coupled to the main line. The switch is coupled between an end portion sand an end portion of the sub-line. The switch is configured to switch connection of the end portion and the end portion between a shorted state and an open state.

公开(公告)号：US20210043995A1

公开(公告)日：2021-02-11

申请号：US17077429

申请日：2020-10-22

Applicant: Murata Manufacturing Co., Ltd.

Inventor： Daisuke TOKUDA ,  Hisanori MURASE

IPC: H01P5/18 ,  H04B1/04 ,  H01P1/10

Abstract: A directional coupler includes: a main line; a sub line; a first switch, a first end of which is directly connected to one end of the sub line and a second end of which is connected to a first signal path that extends to an isolation port (ISO), which is a first port; and a second switch, a first end of which is directly connected to another end of the sub line and a second end of which is connected to a second signal path that extends to a coupling port (CPL), which is a second port.

公开(公告)号：US20210013579A1

公开(公告)日：2021-01-14

申请号：US17032665

申请日：2020-09-25

Applicant: Murata Manufacturing Co., Ltd.

Inventor： Daisuke TOKUDA

IPC: H01P5/18

Abstract: A directional coupler (1) includes a surface mounted component (10) and a mounting substrate (20) on which the surface mounted component (10) is mounted. Among a main line and a sub line of the directional coupler (1), the main line is formed of a first line (31) and a second line (32), one end (311) of the first line (31) and one end (321) of the second line (32) being connected to each other, the sub line is formed of a third line (33). The first line (31) and the third line (33) are formed in the surface mounted component (10). The second line (32) is formed on or in the mounting substrate (20). Furthermore, another end (312) of the first line (31) and another end (322) of the second line (32) may be connected to each other.

公开(公告)号：US20180233475A1

公开(公告)日：2018-08-16

申请号：US15954420

申请日：2018-04-16

Applicant: MURATA MANUFACTURING CO., LTD.

Inventor： Yasunari UMEMOTO ,  Daisuke TOKUDA ,  Tsunekazu SAIMEI ,  Hiroaki TOKUYA

IPC: H01L23/00 ,  H01L29/08 ,  H01L29/737 ,  H01L29/66 ,  H01L29/20 ,  H01L29/732 ,  H01L29/205 ,  H01L29/417

CPC classification number: H01L24/13 ,  H01L24/02 ,  H01L24/03 ,  H01L24/05 ,  H01L24/11 ,  H01L24/16 ,  H01L29/0692 ,  H01L29/0817 ,  H01L29/20 ,  H01L29/205 ,  H01L29/41708 ,  H01L29/66234 ,  H01L29/66242 ,  H01L29/66272 ,  H01L29/6631 ,  H01L29/66318 ,  H01L29/732 ,  H01L29/737 ,  H01L29/7371 ,  H01L29/7375 ,  H01L29/7378 ,  H01L2224/02331 ,  H01L2224/0235 ,  H01L2224/02372 ,  H01L2224/02373 ,  H01L2224/0239 ,  H01L2224/024 ,  H01L2224/03912 ,  H01L2224/0401 ,  H01L2224/05022 ,  H01L2224/05024 ,  H01L2224/05147 ,  H01L2224/05166 ,  H01L2224/05558 ,  H01L2224/05559 ,  H01L2224/05569 ,  H01L2224/05572 ,  H01L2224/05666 ,  H01L2224/1134 ,  H01L2224/13013 ,  H01L2224/13022 ,  H01L2224/13024 ,  H01L2224/13026 ,  H01L2224/13083 ,  H01L2224/131 ,  H01L2224/13111 ,  H01L2224/13147 ,  H01L2224/13155 ,  H01L2224/13563 ,  H01L2224/13611 ,  H01L2224/16225 ,  H01L2224/16227 ,  H01L2224/16235 ,  H01L2924/00012 ,  H01L2924/01029 ,  H01L2924/07025 ,  H01L2924/10329 ,  H01L2924/10337 ,  H01L2924/10338 ,  H01L2924/13051 ,  H01L2924/13055 ,  H01L2924/1423 ,  H01L2924/351 ,  H01L2924/01079 ,  H01L2924/00014 ,  H01L2924/014

Abstract: A semiconductor device that includes a bipolar transistor, wherein a third opening, through which a pillar bump and a second wiring line, which is electrically connected to an emitter layer, contact each other, is shifted in a longitudinal direction of the emitter layer away from a position at which the third opening would be directly above the emitter layer. The third opening is arranged, with respect to the emitter layer, such that an end portion of the emitter layer in the longitudinal direction of the emitter layer and the edge of the opening of the third opening are substantially aligned with each other.

公开(公告)号：US20170077054A1

公开(公告)日：2017-03-16

申请号：US15361336

申请日：2016-11-25

Applicant: MURATA MANUFACTURING CO., LTD.

Inventor： Yasunari UMEMOTO ,  Daisuke TOKUDA ,  Tsunekazu SAIMEI ,  Hiroaki TOKUYA

IPC: H01L23/00 ,  H01L29/20 ,  H01L29/205 ,  H01L29/737

CPC classification number: H01L24/13 ,  H01L24/02 ,  H01L24/03 ,  H01L24/05 ,  H01L24/11 ,  H01L24/16 ,  H01L29/0692 ,  H01L29/0817 ,  H01L29/20 ,  H01L29/205 ,  H01L29/41708 ,  H01L29/66234 ,  H01L29/66242 ,  H01L29/66272 ,  H01L29/6631 ,  H01L29/66318 ,  H01L29/732 ,  H01L29/737 ,  H01L29/7371 ,  H01L29/7375 ,  H01L29/7378 ,  H01L2224/02331 ,  H01L2224/0235 ,  H01L2224/02372 ,  H01L2224/02373 ,  H01L2224/0239 ,  H01L2224/024 ,  H01L2224/03912 ,  H01L2224/0401 ,  H01L2224/05022 ,  H01L2224/05024 ,  H01L2224/05147 ,  H01L2224/05166 ,  H01L2224/05558 ,  H01L2224/05559 ,  H01L2224/05569 ,  H01L2224/05572 ,  H01L2224/05666 ,  H01L2224/1134 ,  H01L2224/13013 ,  H01L2224/13022 ,  H01L2224/13024 ,  H01L2224/13026 ,  H01L2224/13083 ,  H01L2224/131 ,  H01L2224/13111 ,  H01L2224/13147 ,  H01L2224/13155 ,  H01L2224/13563 ,  H01L2224/13611 ,  H01L2224/16225 ,  H01L2224/16227 ,  H01L2224/16235 ,  H01L2924/00012 ,  H01L2924/01029 ,  H01L2924/07025 ,  H01L2924/10329 ,  H01L2924/10337 ,  H01L2924/10338 ,  H01L2924/13051 ,  H01L2924/13055 ,  H01L2924/1423 ,  H01L2924/351 ,  H01L2924/01079 ,  H01L2924/00014 ,  H01L2924/014

Abstract: A semiconductor device that includes a bipolar transistor, wherein a third opening, through which a pillar bump and a second wiring line, which is electrically connected to an emitter layer, contact each other, is shifted in a longitudinal direction of the emitter layer away from a position at which the third opening would be directly above the emitter layer. The third opening is arranged, with respect to the emitter layer, such that an end portion of the emitter layer in the longitudinal direction of the emitter layer and the edge of the opening of the third opening are substantially aligned with each other.

Abstract translation: 一种包括双极晶体管的半导体器件，其中与发射极层电连接的柱凸起和第二布线彼此接触的第三开口在发射极层的纵向方向上偏离 第三开口直接位于发射极层上方的位置。 第三开口相对于发射极层布置成使得发射极层的纵向方向上的发射极层的端部和第三开口的开口的边缘基本上彼此对准。

公开(公告)号：US20160315060A1

公开(公告)日：2016-10-27

申请号：US15202749

申请日：2016-07-06

Applicant: MURATA MANUFACTURING CO., LTD.

Inventor： Yasunari UMEMOTO ,  Daisuke TOKUDA ,  Tsunekazu SAIMEI ,  Hiroaki TOKUYA

IPC: H01L23/00 ,  H01L29/737

CPC classification number: H01L24/13 ,  H01L24/02 ,  H01L24/03 ,  H01L24/05 ,  H01L24/11 ,  H01L24/16 ,  H01L29/0692 ,  H01L29/0817 ,  H01L29/20 ,  H01L29/205 ,  H01L29/41708 ,  H01L29/66234 ,  H01L29/66242 ,  H01L29/66272 ,  H01L29/6631 ,  H01L29/66318 ,  H01L29/732 ,  H01L29/737 ,  H01L29/7371 ,  H01L29/7375 ,  H01L29/7378 ,  H01L2224/02331 ,  H01L2224/0235 ,  H01L2224/02372 ,  H01L2224/02373 ,  H01L2224/0239 ,  H01L2224/024 ,  H01L2224/03912 ,  H01L2224/0401 ,  H01L2224/05022 ,  H01L2224/05024 ,  H01L2224/05147 ,  H01L2224/05166 ,  H01L2224/05558 ,  H01L2224/05559 ,  H01L2224/05569 ,  H01L2224/05572 ,  H01L2224/05666 ,  H01L2224/1134 ,  H01L2224/13013 ,  H01L2224/13022 ,  H01L2224/13024 ,  H01L2224/13026 ,  H01L2224/13083 ,  H01L2224/131 ,  H01L2224/13111 ,  H01L2224/13147 ,  H01L2224/13155 ,  H01L2224/13563 ,  H01L2224/13611 ,  H01L2224/16225 ,  H01L2224/16227 ,  H01L2224/16235 ,  H01L2924/00012 ,  H01L2924/01029 ,  H01L2924/07025 ,  H01L2924/10329 ,  H01L2924/10337 ,  H01L2924/10338 ,  H01L2924/13051 ,  H01L2924/13055 ,  H01L2924/1423 ,  H01L2924/351 ,  H01L2924/01079 ,  H01L2924/00014 ,  H01L2924/014

Abstract: A semiconductor device that includes a bipolar transistor, wherein a third opening, through which a pillar bump and a second wiring line, which is electrically connected to an emitter layer, contact each other, is shifted in a longitudinal direction of the emitter layer away from a position at which the third opening would be directly above the emitter layer. The third opening is arranged, with respect to the emitter layer, such that an end portion of the emitter layer in the longitudinal direction of the emitter layer and the edge of the opening of the third opening are substantially aligned with each other.

Abstract translation: 一种包括双极晶体管的半导体器件，其中与发射极层电连接的柱凸起和第二布线彼此接触的第三开口在发射极层的纵向方向上偏离 第三开口直接位于发射极层上方的位置。 第三开口相对于发射极层布置成使得发射极层的纵向方向上的发射极层的端部和第三开口的开口的边缘基本上彼此对准。

公开(公告)号：US20130241668A1

公开(公告)日：2013-09-19

申请号：US13891075

申请日：2013-05-09

Applicant: MURATA MANUFACTURING CO., LTD.

Inventor： Daisuke TOKUDA ,  Kazutaka MUKAIYAMA

IPC: H01P5/18

CPC classification number: H01P5/184 ,  H01P5/185

Abstract: In a directional coupler, even when parasitic inductance exists, an increase in device size can be suppressed while obtaining good isolation characteristics. A transmission line type directional coupler includes a main line and a sub line that is coupled to the main line through electric field coupling and magnetic field coupling. The main line includes a signal input port and a signal output port, and the sub line includes a coupling port and an isolation port. A series capacitor is connected to only one of the signal output port and the coupling port.

Abstract translation: 在定向耦合器中，即使存在寄生电感，也可以在获得良好的隔离特性的同时抑制器件尺寸的增加。 传输线型定向耦合器包括通过电场耦合和磁场耦合耦合到主线的主线和子线。 主线包括信号输入端口和信号输出端口，子线路包括耦合端口和隔离端口。 串联电容器仅连接到信号输出端口和耦合端口中的一个。

公开(公告)号：US20210242561A1

公开(公告)日：2021-08-05

申请号：US17236271

申请日：2021-04-21

Applicant: Murata Manufacturing Co., Ltd.

Inventor： Daisuke TOKUDA ,  Hisanori MURASE

IPC: H01P5/18

Abstract: A coupler module (1) includes a coupler component (10) formed with a main line (11) and a sub-line (12) that configure a directional coupler, and a module substrate (20) on which the coupler component (10) is mounted and on which a wiring conductor coupled in series with the main line (11) is formed. At least a part of the wiring conductor is along the main line (11) in plan view of the module substrate (20), and a direction of a main signal flowing through the main line (11) and a direction of the main signal flowing through the part of the wiring conductor are opposite to each other.

公开(公告)号：US20210184022A1

公开(公告)日：2021-06-17

申请号：US17189043

申请日：2021-03-01

Applicant: Murata Manufacturing Co., Ltd.

Inventor： Yasunari UMEMOTO ,  Daisuke TOKUDA ,  Tsunekazu SAIMEI ,  Hiroaki TOKUYA

IPC: H01L29/737 ,  H01L29/417 ,  H01L29/732 ,  H01L23/00 ,  H01L29/06 ,  H01L29/08 ,  H01L29/66 ,  H01L29/20 ,  H01L29/205

Abstract: A semiconductor device that includes a bipolar transistor, wherein a third opening, through which a pillar bump and a second wiring line, which is electrically connected to an emitter layer, contact each other, is shifted in a longitudinal direction of the emitter layer away from a position at which the third opening would be directly above the emitter layer. The third opening is arranged, with respect to the emitter layer, such that an end portion of the emitter layer in the longitudinal direction of the emitter layer and the edge of the opening of the third opening are substantially aligned with each other.