公开(公告)号：US20170207206A1

公开(公告)日：2017-07-20

申请号：US15474854

申请日：2017-03-30

Applicant: Micron Technology, Inc.

Inventor： Meow Koon Eng ,  Yong Poo Chia ,  Suan Jeung Boon

IPC: H01L25/10 ,  H01L23/31 ,  H01L23/495 ,  H01L25/00

CPC classification number: H01L25/105 ,  H01L21/50 ,  H01L21/568 ,  H01L23/3121 ,  H01L23/3128 ,  H01L23/49555 ,  H01L23/49811 ,  H01L23/49861 ,  H01L24/11 ,  H01L24/17 ,  H01L24/18 ,  H01L24/19 ,  H01L24/20 ,  H01L24/27 ,  H01L24/32 ,  H01L24/33 ,  H01L24/83 ,  H01L24/96 ,  H01L24/97 ,  H01L25/50 ,  H01L2224/04105 ,  H01L2224/05548 ,  H01L2224/05568 ,  H01L2224/05573 ,  H01L2224/12105 ,  H01L2224/16 ,  H01L2224/16258 ,  H01L2224/17106 ,  H01L2225/1023 ,  H01L2225/1029 ,  H01L2225/1035 ,  H01L2225/1058 ,  H01L2225/1064 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/14 ,  H01L2924/1434 ,  H01L2924/181 ,  H01L2924/00 ,  H01L2924/00014

Abstract: Microelectronic die packages, stacked systems of die packages, and methods of manufacturing them are disclosed herein. In one embodiment, a system of stacked packages includes a first die package having a bottom side, a first dielectric casing, and first metal leads; a second die package having a top side attached to the bottom side of the first package, a dielectric casing with a lateral side, and second metal leads aligned with and projecting towards the first metal leads and including an exterior surface and an interior surface region that generally faces the lateral side; and metal solder connectors coupling individual first leads to individual second leads. In a further embodiment, the individual second leads have an “L” shape and physically contact corresponding individual first leads. In another embodiment, the individual second leads have a “C” shape and include a tiered portion that projects towards the lateral side of the second casing.

公开(公告)号：US09653444B2

公开(公告)日：2017-05-16

申请号：US14882088

申请日：2015-10-13

Applicant: Micron Technology, Inc.

Inventor： Meow Koon Eng ,  Yong Poo Chia ,  Suan Jeung Boon

IPC: H01L21/00 ,  H01L25/00 ,  H01L23/495 ,  H01L23/498 ,  H01L25/10 ,  H01L23/00 ,  H01L21/50 ,  H01L23/31 ,  H01L21/56

CPC classification number: H01L25/105 ,  H01L21/50 ,  H01L21/568 ,  H01L23/3121 ,  H01L23/3128 ,  H01L23/49555 ,  H01L23/49811 ,  H01L23/49861 ,  H01L24/11 ,  H01L24/17 ,  H01L24/18 ,  H01L24/19 ,  H01L24/20 ,  H01L24/27 ,  H01L24/32 ,  H01L24/33 ,  H01L24/83 ,  H01L24/96 ,  H01L24/97 ,  H01L25/50 ,  H01L2224/04105 ,  H01L2224/05548 ,  H01L2224/05568 ,  H01L2224/05573 ,  H01L2224/12105 ,  H01L2224/16 ,  H01L2224/16258 ,  H01L2224/17106 ,  H01L2225/1023 ,  H01L2225/1029 ,  H01L2225/1035 ,  H01L2225/1058 ,  H01L2225/1064 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/14 ,  H01L2924/1434 ,  H01L2924/181 ,  H01L2924/00 ,  H01L2924/00014

Abstract: Microelectronic die packages, stacked systems of die packages, and methods of manufacturing them are disclosed herein. In one embodiment, a system of stacked packages includes a first die package having a bottom side, a first dielectric casing, and first metal leads; a second die package having a top side attached to the bottom side of the first package, a dielectric casing with a lateral side, and second metal leads aligned with and projecting towards the first metal leads and including an exterior surface and an interior surface region that generally faces the lateral side; and metal solder connectors coupling individual first leads to individual second leads. In a further embodiment, the individual second leads have an “L” shape and physically contact corresponding individual first leads. In another embodiment, the individual second leads have a “C” shape and include a tiered portion that projects towards the lateral side of the second casing.

公开(公告)号：US20160247749A1

公开(公告)日：2016-08-25

申请号：US15001070

申请日：2016-01-19

Applicant: Micron Technology, Inc.

Inventor： Chua Swee Kwang ,  Yong Poo Chia

IPC: H01L23/495 ,  H01L23/31 ,  H01L21/48 ,  H01L23/00

CPC classification number: H01L23/49575 ,  H01L21/4821 ,  H01L21/4825 ,  H01L21/4839 ,  H01L23/047 ,  H01L23/3114 ,  H01L23/49503 ,  H01L23/4951 ,  H01L24/32 ,  H01L24/48 ,  H01L29/0657 ,  H01L2224/32145 ,  H01L2224/32245 ,  H01L2224/45015 ,  H01L2224/45099 ,  H01L2224/48091 ,  H01L2224/48247 ,  H01L2224/48464 ,  H01L2224/73265 ,  H01L2924/00014 ,  H01L2924/01006 ,  H01L2924/01015 ,  H01L2924/01027 ,  H01L2924/01033 ,  H01L2924/01074 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/10155 ,  H01L2924/10158 ,  H01L2924/14 ,  H01L2924/181 ,  H01L2924/207 ,  H01L2924/00012 ,  H01L2224/85399 ,  H01L2224/05599

Abstract: Semiconductor dies with recesses, associated leadframes, and associated systems and methods are disclosed. A semiconductor system in accordance with one embodiment includes a semiconductor die having a first surface and a second surface facing opposite from the first surface, with the first surface having a die recess. The system can further include a support paddle carrying the semiconductor die, with at least part of the support paddle being received in the die recess. In particular embodiments, the support paddle can form a portion of a leadframe. In other particular embodiments, the support paddle can include a paddle surface that faces toward the semiconductor die and has an opening extending through the paddle surface and through the support paddle.

公开(公告)号：US20200279834A1

公开(公告)日：2020-09-03

申请号：US16819647

申请日：2020-03-16

Applicant: Micron Technology, Inc.

Inventor： Tongbi Jiang ,  Yong Poo Chia

IPC: H01L25/07 ,  H01L25/00 ,  H01L23/31 ,  H01L23/48 ,  H01L21/768 ,  H01L21/82 ,  H01L23/00 ,  H01L21/56 ,  H01L23/538 ,  H01L25/10

Abstract: A device is disclosed which includes at least one integrated circuit die, at least a portion of which is positioned in a body of encapsulant material, and at least one conductive via extending through the body of encapsulant material.

公开(公告)号：US10431531B2

公开(公告)日：2019-10-01

申请号：US16058496

申请日：2018-08-08

Applicant: Micron Technology, Inc.

Inventor： Chua Swee Kwang ,  Yong Poo Chia

IPC: H01L23/495 ,  H01L23/047 ,  H01L21/48 ,  H01L29/06 ,  H01L23/00 ,  H01L23/31

Abstract: Semiconductor dies with recesses, associated leadframes, and associated systems and methods are disclosed. A semiconductor system in accordance with one embodiment includes a semiconductor die having a first surface and a second surface facing opposite from the first surface, with the first surface having a die recess. The system can further include a support paddle carrying the semiconductor die, with at least part of the support paddle being received in the die recess. In particular embodiments, the support paddle can form a portion of a leadframe. In other particular embodiments, the support paddle can include a paddle surface that faces toward the semiconductor die and has an opening extending through the paddle surface and through the support paddle.

公开(公告)号：US10074599B2

公开(公告)日：2018-09-11

申请号：US15620191

申请日：2017-06-12

Applicant: Micron Technology, Inc.

Inventor： Chua Swee Kwang ,  Yong Poo Chia

IPC: H01L23/495 ,  H01L23/00 ,  H01L23/047 ,  H01L21/48 ,  H01L23/31

CPC classification number: H01L23/49575 ,  H01L21/4821 ,  H01L21/4825 ,  H01L21/4839 ,  H01L23/047 ,  H01L23/3114 ,  H01L23/49503 ,  H01L23/4951 ,  H01L24/32 ,  H01L24/48 ,  H01L29/0657 ,  H01L2224/05599 ,  H01L2224/32145 ,  H01L2224/32245 ,  H01L2224/45015 ,  H01L2224/45099 ,  H01L2224/48091 ,  H01L2224/48247 ,  H01L2224/48464 ,  H01L2224/73265 ,  H01L2924/00014 ,  H01L2924/01006 ,  H01L2924/01015 ,  H01L2924/01027 ,  H01L2924/01033 ,  H01L2924/01074 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/10155 ,  H01L2924/10158 ,  H01L2924/14 ,  H01L2924/181 ,  H01L2924/207 ,  H01L2924/00012 ,  H01L2224/85399

Abstract: Semiconductor dies with recesses, associated leadframes, and associated systems and methods are disclosed. A semiconductor system in accordance with one embodiment includes a semiconductor die having a first surface and a second surface facing opposite from the first surface, with the first surface having a die recess. The system can further include a support paddle carrying the semiconductor die, with at least part of the support paddle being received in the die recess. In particular embodiments, the support paddle can form a portion of a leadframe. In other particular embodiments, the support paddle can include a paddle surface that faces toward the semiconductor die and has an opening extending through the paddle surface and through the support paddle.

公开(公告)号：US09911696B2

公开(公告)日：2018-03-06

申请号：US14152622

申请日：2014-01-10

Applicant: Micron Technology, Inc.

Inventor： Suan Jeung Boon ,  Meow Koon Eng ,  Yong Poo Chia

IPC: H01L23/522 ,  H01L21/768 ,  H01L23/528 ,  H01L21/48 ,  H01L23/498 ,  H01L25/065 ,  H01L25/10 ,  H01L25/00 ,  H01L25/03 ,  H01L21/82 ,  H01L23/00

CPC classification number: H01L23/5283 ,  H01L21/4853 ,  H01L21/76885 ,  H01L21/82 ,  H01L23/49811 ,  H01L23/49816 ,  H01L23/49827 ,  H01L23/522 ,  H01L24/19 ,  H01L24/45 ,  H01L24/48 ,  H01L24/81 ,  H01L24/82 ,  H01L24/85 ,  H01L24/97 ,  H01L25/03 ,  H01L25/0657 ,  H01L25/105 ,  H01L25/50 ,  H01L2224/04105 ,  H01L2224/12105 ,  H01L2224/32145 ,  H01L2224/32225 ,  H01L2224/45015 ,  H01L2224/45124 ,  H01L2224/45139 ,  H01L2224/45144 ,  H01L2224/45147 ,  H01L2224/45155 ,  H01L2224/45169 ,  H01L2224/4554 ,  H01L2224/45669 ,  H01L2224/48095 ,  H01L2224/48145 ,  H01L2224/48464 ,  H01L2224/48599 ,  H01L2224/48699 ,  H01L2224/73267 ,  H01L2224/78 ,  H01L2224/85 ,  H01L2224/85205 ,  H01L2224/85909 ,  H01L2224/97 ,  H01L2225/06506 ,  H01L2225/06524 ,  H01L2225/06527 ,  H01L2225/06541 ,  H01L2225/1023 ,  H01L2225/1035 ,  H01L2225/1052 ,  H01L2225/1058 ,  H01L2225/1064 ,  H01L2924/00014 ,  H01L2924/01014 ,  H01L2924/01022 ,  H01L2924/01028 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01047 ,  H01L2924/01074 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/014 ,  H01L2924/10253 ,  H01L2924/12042 ,  H01L2924/14 ,  H01L2924/15311 ,  H01L2924/15331 ,  H01L2924/18162 ,  H01L2924/19107 ,  H01L2224/82 ,  H01L2924/00 ,  H01L2924/00012 ,  H01L2224/85399 ,  H01L2224/05599

Abstract: Packaged semiconductor assemblies including interconnect structures and methods for forming such interconnect structures are disclosed herein. One embodiment of a packaged semiconductor assembly includes a support member having a first bond-site and a die carried by the support member having a second bond-site. An interconnect structure is connected between the first and second bond-sites and includes a wire that is coupled to at least one of the first and second bond-sites. The interconnect structure also includes a third bond-site coupled to the wire between the first and second bond-sites.

公开(公告)号：US09418872B2

公开(公告)日：2016-08-16

申请号：US14166490

申请日：2014-01-28

Applicant: Micron Technology, Inc.

Inventor： Meow Koon Eng ,  Sui Waf Low ,  Min Yu Chan ,  Yong Poo Chia ,  Bok Leng Ser ,  Wei Zhou

IPC: H01L21/66 ,  H01L21/50 ,  H01L21/48 ,  H01L23/31 ,  H01L23/495 ,  H01L23/00 ,  H01L25/10 ,  H01L25/03 ,  H01L25/00

CPC classification number: H01L21/4842 ,  H01L22/10 ,  H01L23/3107 ,  H01L23/3114 ,  H01L23/4951 ,  H01L23/49551 ,  H01L24/06 ,  H01L24/45 ,  H01L24/48 ,  H01L24/49 ,  H01L25/03 ,  H01L25/105 ,  H01L25/50 ,  H01L2224/0401 ,  H01L2224/04042 ,  H01L2224/05554 ,  H01L2224/05599 ,  H01L2224/06136 ,  H01L2224/16 ,  H01L2224/32245 ,  H01L2224/45099 ,  H01L2224/48091 ,  H01L2224/4824 ,  H01L2224/48247 ,  H01L2224/4826 ,  H01L2224/49171 ,  H01L2224/73215 ,  H01L2224/85399 ,  H01L2225/1029 ,  H01L2225/1058 ,  H01L2924/00014 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01014 ,  H01L2924/01033 ,  H01L2924/01082 ,  H01L2924/01087 ,  H01L2924/014 ,  H01L2924/09701 ,  H01L2924/14 ,  H01L2924/1433 ,  H01L2924/15311 ,  H01L2924/181 ,  H01L2924/1815 ,  H01L2924/00 ,  H01L2924/00012 ,  H01L2224/45015 ,  H01L2924/207

Abstract: A microelectronic component package includes a plurality of electrical leads which are coupled to a microelectronic component and which have exposed lengths extending outwardly beyond a peripheral edge of an encapsulant. A plurality of terminals may be positioned proximate a terminal face of the encapsulant and these terminals may be electrically coupled to the same leads. This can facilitate connection of the microelectronic component to a substrate using the leads as a conventional leaded package. The terminals, however, can facilitate stacking of the leaded package with one or more additional microelectronic components, e.g., a BGA package.

Abstract translation: 微电子部件封装包括耦合到微电子部件并且具有向外延伸超过密封剂的外围边缘的暴露长度的多个电引线。 多个端子可以位于密封剂的端面附近，并且这些端子可以电耦合到相同的引线。 这可以有助于使用引线作为常规引线封装将微电子部件连接到基板。 然而，这些端子可以促进引线封装与一个或多个额外的微电子部件例如BGA封装的堆叠。

公开(公告)号：US20150091166A1

公开(公告)日：2015-04-02

申请号：US14564502

申请日：2014-12-09

Applicant: Micron Technology, Inc.

Inventor： Meow Koon Eng ,  Yong Poo Chia ,  Suan Jeung Boon

IPC: H01L25/10 ,  H01L23/00

CPC classification number: H01L25/105 ,  H01L21/50 ,  H01L21/568 ,  H01L23/3121 ,  H01L23/3128 ,  H01L23/49555 ,  H01L23/49811 ,  H01L23/49861 ,  H01L24/11 ,  H01L24/17 ,  H01L24/18 ,  H01L24/19 ,  H01L24/20 ,  H01L24/27 ,  H01L24/32 ,  H01L24/33 ,  H01L24/83 ,  H01L24/96 ,  H01L24/97 ,  H01L25/50 ,  H01L2224/04105 ,  H01L2224/05548 ,  H01L2224/05568 ,  H01L2224/05573 ,  H01L2224/12105 ,  H01L2224/16 ,  H01L2224/16258 ,  H01L2224/17106 ,  H01L2225/1023 ,  H01L2225/1029 ,  H01L2225/1035 ,  H01L2225/1058 ,  H01L2225/1064 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/14 ,  H01L2924/1434 ,  H01L2924/181 ,  H01L2924/00 ,  H01L2924/00014

Abstract: Microelectronic die packages, stacked systems of die packages, and methods of manufacturing them are disclosed herein. In one embodiment, a system of stacked packages includes a first die package having a bottom side, a first dielectric casing, and first metal leads; a second die package having a top side attached to the bottom side of the first package, a dielectric casing with a lateral side, and second metal leads aligned with and projecting towards the first metal leads and including an exterior surface and an interior surface region that generally faces the lateral side; and metal solder connectors coupling individual first leads to individual second leads. In a further embodiment, the individual second leads have an “L” shape and physically contact corresponding individual first leads. In another embodiment, the individual second leads have a “C” shape and include a tiered portion that projects towards the lateral side of the second casing.

Abstract translation: 本文公开了微电子管芯封装，管芯封装的堆叠系统及其制造方法。 在一个实施例中，堆叠封装的系统包括具有底侧的第一裸片封装，第一电介质外壳和第一金属引线; 第二管芯封装，其具有附接到第一封装的底侧的顶侧，具有侧面的电介质外壳和与第一金属引线对准并朝向第一金属引线突出的第二金属引线，并且包括外表面和内表面区域， 一般面向外侧; 和金属焊接连接器将各个第一引线连接到单独的第二引线。 在另一个实施例中，各个第二引线具有“L”形状并且物理地接触相应的单个第一引线。 在另一个实施例中，各个第二引线具有“C”形并且包括向第二壳体的侧面突出的分层部分。

公开(公告)号：US08906744B2

公开(公告)日：2014-12-09

申请号：US14029455

申请日：2013-09-17

Applicant: Micron Technology, Inc.

Inventor： Meow Koon Eng ,  Yong Poo Chia ,  Suan Jeung Boon

IPC: H01L23/498 ,  H01L25/10 ,  H01L21/50 ,  H01L23/495 ,  H01L23/00 ,  H01L23/31

CPC classification number: H01L25/105 ,  H01L21/50 ,  H01L21/568 ,  H01L23/3121 ,  H01L23/3128 ,  H01L23/49555 ,  H01L23/49811 ,  H01L23/49861 ,  H01L24/11 ,  H01L24/17 ,  H01L24/18 ,  H01L24/19 ,  H01L24/20 ,  H01L24/27 ,  H01L24/32 ,  H01L24/33 ,  H01L24/83 ,  H01L24/96 ,  H01L24/97 ,  H01L25/50 ,  H01L2224/04105 ,  H01L2224/05548 ,  H01L2224/05568 ,  H01L2224/05573 ,  H01L2224/12105 ,  H01L2224/16 ,  H01L2224/16258 ,  H01L2224/17106 ,  H01L2225/1023 ,  H01L2225/1029 ,  H01L2225/1035 ,  H01L2225/1058 ,  H01L2225/1064 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/14 ,  H01L2924/1434 ,  H01L2924/181 ,  H01L2924/00 ,  H01L2924/00014

Abstract: Microelectronic die packages, stacked systems of die packages, and methods of manufacturing them are disclosed herein. In one embodiment, a system of stacked packages includes a first die package having a bottom side, a first dielectric casing, and first metal leads; a second die package having a top side attached to the bottom side of the first package, a dielectric casing with a lateral side, and second metal leads aligned with and projecting towards the first metal leads and including an exterior surface and an interior surface region that generally faces the lateral side; and metal solder connectors coupling individual first leads to individual second leads. In a further embodiment, the individual second leads have an “L” shape and physically contact corresponding individual first leads. In another embodiment, the individual second leads have a “C” shape and include a tiered portion that projects towards the lateral side of the second casing.

Abstract translation: 本文公开了微电子管芯封装，管芯封装的堆叠系统及其制造方法。 在一个实施例中，堆叠封装的系统包括具有底侧的第一裸片封装，第一电介质外壳和第一金属引线; 第二管芯封装，其具有附接到第一封装的底侧的顶侧，具有侧面的电介质外壳和与第一金属引线对准并朝向第一金属引线突出的第二金属引线，并且包括外表面和内表面区域， 一般面向外侧; 和金属焊接连接器将各个第一引线连接到单独的第二引线。 在另一个实施例中，各个第二引线具有“L”形状并且物理地接触相应的单个第一引线。 在另一个实施例中，各个第二引线具有“C”形并且包括向第二壳体的侧面突出的分层部分。