公开(公告)号：US08383507B2

公开(公告)日：2013-02-26

申请号：US13351370

申请日：2012-01-17

申请人： Kaushik Chanda ,  Cathryn J. Christiansen ,  Daniel C. Edelstein ,  Satyanarayana V. Nitta ,  Son V. Nguyen ,  Shom Ponoth ,  Hosadurga Shobha

发明人： Kaushik Chanda ,  Cathryn J. Christiansen ,  Daniel C. Edelstein ,  Satyanarayana V. Nitta ,  Son V. Nguyen ,  Shom Ponoth ,  Hosadurga Shobha

IPC分类号： H01L21/4763 ,  H01L23/48

CPC分类号： H01L23/5222 ,  H01L21/7682 ,  H01L21/76834 ,  H01L21/76849 ,  H01L23/53238 ,  H01L23/5329 ,  H01L23/53295 ,  H01L2924/0002 ,  H01L2924/00

摘要： A metal interconnect structure includes at least a pair of metal lines, a cavity therebetween, and a dielectric metal-diffusion barrier layer located on at least one portion of walls of the cavity. After formation of a cavity between the pair of metal lines, the dielectric metal-diffusion barrier layer is formed on the exposed surfaces of the cavity. A dielectric material layer is formed above the pair of metal lines to encapsulate the cavity. The dielectric metal-diffusion barrier layer prevents diffusion of metal and impurities from one metal line to another metal line and vice versa, thereby preventing electrical shorts between the pair of metal lines.

摘要翻译： 金属互连结构包括至少一对金属线，它们之间的腔，以及位于腔的至少一部分壁上的介电金属扩散阻挡层。 在一对金属线之间形成空腔之后，在空腔的暴露表面上形成介电金属扩散阻挡层。 在一对金属线之上形成介电材料层以封装空腔。 电介质金属扩散阻挡层防止金属和杂质从一个金属线扩散到另一个金属线，反之亦然，从而防止一对金属线之间的电短路。

公开(公告)号：US07749892B2

公开(公告)日：2010-07-06

申请号：US11564358

申请日：2006-11-29

申请人： Griselda Bonilla ,  Christos D. Dimitrakopoulos ,  Son V. Nguyen ,  Alfred Grill ,  Satyanarayana V. Nitta ,  Darryl D. Restaino ,  Terry A. Spooner

发明人： Griselda Bonilla ,  Christos D. Dimitrakopoulos ,  Son V. Nguyen ,  Alfred Grill ,  Satyanarayana V. Nitta ,  Darryl D. Restaino ,  Terry A. Spooner

IPC分类号： H01L21/4763

CPC分类号： H01L21/76834 ,  H01L21/76825 ,  H01L21/76832 ,  H01L21/76844 ,  H01L23/53295 ,  H01L2924/0002 ,  H01L2924/00

摘要： An interconnect in provided which comprises a copper conductor having both a top surface and a lower surface, with caps formed on the top surface of the metallic conductor. The cap is formed of dual laminations or multiple laminations of films with the laminated films including an Ultra-Violet (UV) blocking film and a diffusion barrier film. The diffusion barrier film and the UV blocking film may be separated by an intermediate film.

摘要翻译： 提供的互连，其包括具有顶表面和下表面的铜导体，其中帽形成在金属导体的顶表面上。 盖由双层叠或多层薄膜形成，层压膜包括超紫（UV）阻挡膜和扩散阻挡膜。 扩散阻挡膜和UV阻挡膜可以通过中间膜分离。

公开(公告)号：US20080122103A1

公开(公告)日：2008-05-29

申请号：US11564358

申请日：2006-11-29

申请人： Griselda Bonilla ,  Christos D. Dimitrakopoulos ,  Son V. Nguyen ,  Alfred Grill ,  Satyanarayana V. Nitta ,  Darryl D. Restaino ,  Terry A. Spooner

发明人： Griselda Bonilla ,  Christos D. Dimitrakopoulos ,  Son V. Nguyen ,  Alfred Grill ,  Satyanarayana V. Nitta ,  Darryl D. Restaino ,  Terry A. Spooner

IPC分类号： H01L23/532 ,  H01L21/768

CPC分类号： H01L21/76834 ,  H01L21/76825 ,  H01L21/76832 ,  H01L21/76844 ,  H01L23/53295 ,  H01L2924/0002 ,  H01L2924/00

摘要： An interconnect in provided which comprises a copper conductor having both a top surface and a lower surface, with caps formed on the top surface of the metallic conductor. The cap is formed of dual laminations or multiple laminations of films with the laminated films including an Ultra-Violet (UV) blocking film and a diffusion barrier film. The diffusion barrier film and the UV blocking film may be separated by an intermediate film.

摘要翻译： 提供的互连，其包括具有顶表面和下表面的铜导体，其中帽形成在金属导体的顶表面上。 盖由双层叠或多层薄膜形成，层压膜包括超紫（UV）阻挡膜和扩散阻挡膜。 扩散阻挡膜和UV阻挡膜可以通过中间膜分离。

公开(公告)号：US20120032311A1

公开(公告)日：2012-02-09

申请号：US12853278

申请日：2010-08-09

申请人： Stephen M. Gates ,  Alfred Grill ,  Son V. Nguyen ,  Satyanarayana V. Nitta

发明人： Stephen M. Gates ,  Alfred Grill ,  Son V. Nguyen ,  Satyanarayana V. Nitta

IPC分类号： H01L29/06 ,  H01L23/538 ,  H01L21/314

CPC分类号： H01L29/06 ,  H01L21/02126 ,  H01L21/02167 ,  H01L21/022 ,  H01L21/02203 ,  H01L21/02211 ,  H01L21/02274 ,  H01L21/76801 ,  H01L21/76832 ,  H01L21/76834 ,  H01L23/5329 ,  H01L23/53295 ,  H01L23/538 ,  H01L2221/1047 ,  H01L2924/0002 ,  H01L2924/00

摘要： An in-situ process is described incorporating plasma enhanced chemical vapor deposition comprising flowing at least one of a Si, Si+C, B, Si+B, Si+B+C, and B+C containing precursor, and a N containing precursors at first times and removing the N precursor at second times and starting the flow of an oxidant gas and a porogen gas into the chamber. A dielectric layer is described comprising a network having inorganic random three dimensional covalent bonding throughout the network which contains at least one SiCN, SiCNH, SiN, SiNH, BN, BNH, CBN, CBNH, BSiN, BSiNH, SiCBN and SiCBNH as a first component and a low k dielectric as a second component adjacent thereto.

摘要翻译： 描述了一种原位方法，其包括等离子体增强化学气相沉积，其包括流动含有Si，Si + C，B，Si + B，Si + B + C和B + C的前体中的至少一种和含N前体 并且第二次除去N前体，并开始将氧化剂气体和致孔剂气体流入室中。 描述了一种介电层，其包括在整个网络中具有无机随机三维共价键的网络，其包含至少一种SiCN，SiCNH，SiN，SiNH，BN，BNH，CBN，CBNH，BSiN，BSiNH，SiCBN和SiCBNH作为第一组分 和作为与其相邻的第二组分的低k电介质。

公开(公告)号：US6057250A

公开(公告)日：2000-05-02

申请号：US14431

申请日：1998-01-27

申请人： Markus Kirchhoff ,  Ashima Chakravarti ,  Matthias Ilg ,  Kevin A. McKinley ,  Son V. Nguyen ,  Michael J. Shapiro

发明人： Markus Kirchhoff ,  Ashima Chakravarti ,  Matthias Ilg ,  Kevin A. McKinley ,  Son V. Nguyen ,  Michael J. Shapiro

IPC分类号： H01L21/31 ,  C23C16/40 ,  H01L21/316 ,  H01L21/225 ,  H01L21/469

CPC分类号： H01L21/02271 ,  C23C16/401 ,  H01L21/02131 ,  H01L21/02211 ,  H01L21/31625 ,  H01L21/31629

摘要： An apparatus and method are provided for forming a fluorine doped borophosphosilicate (F-BPSG) glass on a semiconductor device using a low pressure chemical vapor deposition process. The F-BPSG glass exhibits a substantially void-free and particle-free layer on the substrate for structures having gaps as narrow as 0.10 microns and with aspect ratios of 6:1. The reactant gases include sources of boron and phosphorous dopants, oxygen and a mixture of TEOS and FTES. Using a mixture of TEOS and FTES in a low pressure CVD process provides a F-BPSG layer having the above enhanced characteristics. It is a preferred method of the invention to perform the deposition at a temperature of about 750-850.degree. C. and a pressure of 1 to 3 torr to provide for in situ reflow of the F-BPSG during the deposition process. An anneal is also preferred under similar conditions in the same chemical vapor deposition chamber to further planarize the F-BPSG surface. A F-BPSG glass and semiconductor wafers having a layer of fluorine doped BPSG thereon formed by the method and apparatus of the invention are also provided.

摘要翻译： 提供了一种用于在半导体器件上使用低压化学气相沉积工艺形成氟掺杂硼磷硅酸（F-BPSG）玻璃的装置和方法。 F-BPSG玻璃在基板上表现出基本上无空隙和无颗粒的层，其结构具有窄至0.10微米的间隙，纵横比为6:1。 反应物气体包括硼和磷掺杂剂的源，氧和TEOS和FTES的混合物。 在低压CVD工艺中使用TEOS和FTES的混合物提供具有上述增强特性的F-BPSG层。 本发明的优选方法是在约750-850℃的温度和1至3托的压力下进行沉积，以在沉积过程中提供F-BPSG的原位回流。 在相同的化学气相沉积室中的相似条件下还优选退火以进一步平坦化F-BPSG表面。 还提供了通过本发明的方法和装置形成的具有氟掺杂BPSG层的F-BPSG玻璃和半导体晶片。

公开(公告)号：US5610441A

公开(公告)日：1997-03-11

申请号：US444465

申请日：1995-05-19

申请人： Daniel A. Carl ,  Donald M. Kenney ,  Walter E. Mlynko ,  Son V. Nguyen

发明人： Daniel A. Carl ,  Donald M. Kenney ,  Walter E. Mlynko ,  Son V. Nguyen

IPC分类号： H01L21/302 ,  H01L21/3065 ,  H01L21/763 ,  H01L21/8242 ,  H01L27/108 ,  H01L23/18 ,  H01L23/52

CPC分类号： H01L27/10861 ,  H01L21/763 ,  Y10S148/05

摘要： Polysilicon in a trench is etched at an angle to produce a conductor within the trench that has shape characteristics which approximate the shadow of the side wall of the trench closest the beam source. Specifically, when the first side wall is closest to the beam source and the second side wall is furthest from the beam source, the polysilicon on the first side wall is almost as high as the first side wall, while the polysilicon on the more exposed side wall is considerably lower than the first side wall and approximates the shadow of the first side wall on the second side wall relative to the beam. The polysilicon in the trench may be in the shape of a solid angled block approximating the shadow line from the top of side wall to the shadow line on side wall however, it is preferred that the polysilicon take the form of a conformal layer in trench prior to etching such that the polysilicon ultimately has an angled "U" shape which approximates the shadow line. Contact is made to the polysilicon using strap that electrically connects the side wall with the polysilicon. Strap is sized such that it does not extend to the opposite side wall of trench, thereby avoiding short circuits. Having the polysilicon approximate the shadow line of the etch permits narrowing the distance between adjacent straps and in an array without the risk of creating a short.

摘要翻译： 在沟槽中蚀刻多晶硅以在沟槽内产生导体，该导体具有接近最接近光束源的沟槽侧壁阴影的形状特征。 具体地，当第一侧壁最靠近光束源并且第二侧壁距离光束源最远时，第一侧壁上的多晶硅几乎与第一侧壁一样高，而在较大曝光侧的多晶硅 壁比第一侧壁大得多，并且近似于相对于梁的第二侧壁上的第一侧壁的阴影。 沟槽中的多晶硅可以是接近从侧壁顶部到侧壁上的阴影线的阴影线的实心角形块的形状，然而，优选地，多晶硅在沟槽中具有保形层的形式 以蚀刻，使得多晶硅最终具有近似于阴影线的成角度“U”形。 使用将侧壁与多晶硅电连接的带子与多晶硅接触。 带的尺寸使得其不延伸到沟槽的相对侧壁，从而避免短路。 使多晶硅近似于蚀刻的阴影线允许在相邻带之间和阵列之间的距离变窄，而不会产生短路。

公开(公告)号：US5538592A

公开(公告)日：1996-07-23

申请号：US279607

申请日：1994-07-22

申请人： Bomy A. Chen ,  Gary B. Bronner ,  Son V. Nguyen

发明人： Bomy A. Chen ,  Gary B. Bronner ,  Son V. Nguyen

IPC分类号： H01L27/04 ,  H01L21/02 ,  H01L21/306 ,  H01L21/822 ,  H01L21/8242 ,  H01L27/108 ,  H01L21/00

CPC分类号： H01L27/10852 ,  H01L27/10817 ,  H01L28/40 ,  Y10S438/947

摘要： Integrated circuit structures of sub-lithography dimensions are formed by conformal deposition of alternating layers of materials having differing etch rates within an aperture over a body of material to be etched. One of the materials in the alternating layers is then selectively and preferentially etched to form a mask through which etching can be performed on the body of material to be etched. This technique is particularly suited to the formation of structurally robust capacitors for memory cells which have greatly increased plate area, resulting in increased capacitance, while maintaining a small footprint for the capacitor structure.

摘要翻译： 亚光刻尺寸的集成电路结构通过在待蚀刻材料体上的孔内的不同蚀刻速率的交替层材料的共形沉积形成。 然后选择性地和优先地蚀刻交替层中的材料之一以形成掩模，通过该掩模可以对要蚀刻的材料的主体进行蚀刻。 该技术特别适用于形成用于存储器单元的结构上坚固的电容器，其大大增加了板面积，导致增加的电容，同时保持了电容器结构的小的占地面积。

公开(公告)号：US5204138A

公开(公告)日：1993-04-20

申请号：US814973

申请日：1991-12-24

申请人： Son V. Nguyen ,  David M. Dobuzinsky ,  Douglas J. Dopp ,  David L. Harmon

发明人： Son V. Nguyen ,  David M. Dobuzinsky ,  Douglas J. Dopp ,  David L. Harmon

IPC分类号： C23C14/06 ,  C23C16/34 ,  C23C16/505 ,  C30B25/02 ,  H01L21/318

CPC分类号： C23C16/505 ,  C23C16/345

摘要： A plasma enhanced chemical vapor deposition process for producing a fluorinated silicon nitride layer on a substrate is disclosed. The process utilizes a mixture of silane, perfluorosilane and nitrogen to produce films of high conformality and stability. The silane and perfluorosilane in the mixture are in a ratio of 0.05 to 1 on a volume basis. The preferred silane is SiH.sub.4 and the preferred perfluorosilane is SiF.sub.4.

摘要翻译： 公开了一种用于在衬底上制造氟化氮化硅层的等离子体增强化学气相沉积工艺。 该方法利用硅烷，全氟硅烷和氮气的混合物来制备具有高共形性和稳定性的膜。 混合物中的硅烷和全氟硅烷的体积比为0.05-1。 优选的硅烷是SiH 4，优选的全氟硅烷是SiF 4。

公开(公告)号：US4635139A

公开(公告)日：1987-01-06

申请号：US769276

申请日：1985-08-26

申请人： Son V. Nguyen ,  James M. Severson

发明人： Son V. Nguyen ,  James M. Severson

IPC分类号： G11B27/36 ,  G11B33/10 ,  G11B5/02 ,  G05F1/00

CPC分类号： G11B33/10 ,  G11B27/36

摘要： A glide head is used to test a rigid magnetic disk surface for projecting asperities. Using a two rail head with the read/write transducer mounted at the rear of the rail at the side of the head toward which the head is being radially advanced and skewing the head so that the trailing edge of the head approaches each track before the leading edge as the head is advanced, it is possible to write a pattern from a known position relative an event or asperity identified by a mechanical transducer associated with the head to the index location. Using a developer, it is then possible to readily identify the asperity during microscopic examination of the disk surface.

摘要翻译： 滑动头用于测试刚性磁盘表面，用于突出凹凸。 使用两轨头，其中读/写换能器安装在头部后方的导轨的后部，头部朝向头部径向前进并使头部倾斜，使得头部的后缘在前导线之前接近每个轨道 当头部前进时，可以将相对于与头部相关联的机械传感器识别的事件或粗糙度的已知位置的图案写入索引位置。 使用显影剂，可以容易地识别在盘表面的显微镜检查期间的凹凸。

公开(公告)号：US09241792B2

公开(公告)日：2016-01-26

申请号：US12392995

申请日：2009-02-25

申请人： Netanel Benichou ,  Son V. Nguyen ,  Benjamin Spenser

发明人： Netanel Benichou ,  Son V. Nguyen ,  Benjamin Spenser

IPC分类号： A61F2/24

CPC分类号： A61F2/2418 ,  A61F2/2427 ,  A61F2/2433 ,  A61F2220/0008 ,  A61F2220/0016 ,  A61F2230/0054 ,  A61F2250/0059 ,  A61F2250/0063

摘要： A two-part implantable heart valve and procedure are disclosed that allow expansion and positioning of a first part of the implantable heart valve having a temporary or transient valvular structure. A second part of the implantable heart valve is deployed within the first part and attaches thereto. The valvular structure of the second part then acts to function as the heart valve replacement. A tool or system is provided for determining an adequate percutaneous heart valve size for a given stenotic valve. A balloon can be inflated inside the stenotic valve to a desired pressure. When this pressure is reached an angiographic image is taken and the balloon diameter is measured at a waist area created by contact between the balloon and the stenotic valve. The diameter represents the minimum percutaneous heart valve diameter to be implanted.

摘要翻译： 公开了两部分可植入心脏瓣膜和程序，其允许具有临时或暂时瓣膜结构的可植入心脏瓣膜的第一部分的膨胀和定位。 可植入心脏瓣膜的第二部分部署在第一部分内并且附接到其上。 然后，第二部分的瓣膜结构起到充当心脏瓣膜置换作用。 提供了一种用于确定给定狭窄瓣膜的足够的经皮心脏瓣膜尺寸的工具或系统。 气囊可以在狭窄的瓣膜内充气到期望的压力。 当达到该压力时，取出血管造影图像，并且在通过球囊和狭窄瓣膜之间的接触产生的腰部区域测量球囊直径。 直径代表要植入的最小经皮心脏瓣膜直径。