公开(公告)号：US08536038B2

公开(公告)日：2013-09-17

申请号：US13164781

申请日：2011-06-21

申请人： Shao-Wei Wang ,  Yu-Ren Wang ,  Chien-Liang Lin ,  Wen-Yi Teng ,  Tsuo-Wen Lu ,  Chih-Chung Chen ,  Ying-Wei Yen ,  Yu-Min Lin ,  Chin-Cheng Chien ,  Jei-Ming Chen ,  Chun-Wei Hsu ,  Chia-Lung Chang ,  Yi-Ching Wu ,  Shu-Yen Chan

发明人： Shao-Wei Wang ,  Yu-Ren Wang ,  Chien-Liang Lin ,  Wen-Yi Teng ,  Tsuo-Wen Lu ,  Chih-Chung Chen ,  Ying-Wei Yen ,  Yu-Min Lin ,  Chin-Cheng Chien ,  Jei-Ming Chen ,  Chun-Wei Hsu ,  Chia-Lung Chang ,  Yi-Ching Wu ,  Shu-Yen Chan

IPC分类号： H01L21/3205 ,  H01L21/425

CPC分类号： H01L29/7833 ,  H01L21/265 ,  H01L21/3215 ,  H01L21/823842 ,  H01L29/4966 ,  H01L29/517 ,  H01L29/665 ,  H01L29/66545 ,  H01L29/6659

摘要： A manufacturing method for a metal gate includes providing a substrate having at least a semiconductor device with a conductivity type formed thereon, forming a gate trench in the semiconductor device, forming a work function metal layer having the conductivity type and an intrinsic work function corresponding to the conductivity type in the gate trench, and performing an ion implantation to adjust the intrinsic work function of the work function metal layer to a target work function.

摘要翻译： 一种金属栅极的制造方法，包括提供具有至少形成有导电类型的半导体器件的衬底，在该半导体器件中形成栅极沟槽，形成具有导电类型的功函数金属层和对应于 栅极沟槽中的导电类型，并且执行离子注入以将功函数金属层的固有功函数调整到目标功函数。

公开(公告)号：US20120303967A1

公开(公告)日：2012-11-29

申请号：US13115788

申请日：2011-05-25

申请人： Yen-Tsung Chia ,  Yu-Min Lin ,  Chih-Chung Hsu

发明人： Yen-Tsung Chia ,  Yu-Min Lin ,  Chih-Chung Hsu

IPC分类号： G06F12/14

CPC分类号： H04L9/083 ,  G06F21/10 ,  G06F2221/0755 ,  H04L9/0822 ,  H04L63/0435 ,  H04L63/0823 ,  H04L2209/603 ,  H04L2463/101 ,  H04W4/50

摘要： A digital content management system operative in a distributed network includes a SDP server and a client. The SDP server includes a content issuer and a right issuer. The content issuer is configured to randomly generate a first key, convert the first key to a second key by a conversion function, and encrypt a portion of a digital content item with the second key to form an encrypted portion, wherein the encrypted portion has its corresponding character code. The right issuer is configured to generate a right object, which includes the first key, and encrypt the right object.

摘要翻译： 在分布式网络中操作的数字内容管理系统包括SDP服务器和客户机。 SDP服务器包括内容发行者和权利发行者。 内容发行者被配置为随机生成第一密钥，通过转换功能将第一密钥转换为第二密钥，并且利用第二密钥对数字内容项的一部分进行加密以形成加密部分，其中，加密部分具有 相应的字符代码。 右侧发行者被配置为生成包含第一个密钥的正确对象，并加密正确的对象。

公开(公告)号：US08270833B2

公开(公告)日：2012-09-18

申请号：US12504322

申请日：2009-07-16

申请人： Yu-Min Lin ,  Po-Lung Tien ,  Maria C. Yuang

发明人： Yu-Min Lin ,  Po-Lung Tien ,  Maria C. Yuang

IPC分类号： H04B10/00

CPC分类号： H04J14/0282 ,  H04J14/0201 ,  H04J14/0247 ,  H04J14/0252 ,  H04J14/0265 ,  H04J14/0275 ,  H04J2014/0253 ,  H04W88/08

摘要： A passive optical network (PON) system supporting wireless communication includes an optical line terminal (OLT) configured on a central office, an optical distribution network (ODN), and a plurality of optical network units (ONUs) respectively configured on user ends. The ODN is connected to the OLT and the ONUs in a one-to-many manner. The OLT sends a downstream optical signal to the ODN, and receives an upstream optical signal. The ODN circularly guides the optical signal to each ONU. Each ONU receives and reflects the downstream optical signal, processes the received downstream optical signal, receives and processes the upstream optical signal, carries an electrical signal to be uploaded into the upstream optical signal, and carries data received by a remote antenna into the upstream optical signal. Through the above architecture, the PON system supports wireless communication.

摘要翻译： 支持无线通信的无源光网络（PON）系统包括配置在中心局的光线路终端（OLT），配光网络（ODN）和分别在用户端配置的多个光网络单元（ONU）。 ODN以一对多的方式连接到OLT和ONU。 OLT向ODN发送下行光信号，并接收上行光信号。 ODN将光信号循环引导到每个ONU。 每个ONU接收并反映下行光信号，处理接收到的下行光信号，接收并处理上游光信号，承载要上传到上游光信号的电信号，并将远程天线接收的数据传送到上游光信号 信号。 通过上述架构，PON系统支持无线通信。

公开(公告)号：US20120168933A1

公开(公告)日：2012-07-05

申请号：US12981475

申请日：2010-12-30

申请人： Su-Tsai Lu ,  Jing-Ye Juang ,  Yu-Min Lin

发明人： Su-Tsai Lu ,  Jing-Ye Juang ,  Yu-Min Lin

IPC分类号： H01L23/485 ,  H01L23/498

CPC分类号： H01L23/295 ,  H01L21/561 ,  H01L21/563 ,  H01L21/568 ,  H01L24/05 ,  H01L24/11 ,  H01L24/13 ,  H01L24/14 ,  H01L24/16 ,  H01L24/27 ,  H01L24/29 ,  H01L24/73 ,  H01L24/92 ,  H01L24/94 ,  H01L24/97 ,  H01L25/0657 ,  H01L25/50 ,  H01L2224/03464 ,  H01L2224/0401 ,  H01L2224/05548 ,  H01L2224/05556 ,  H01L2224/05558 ,  H01L2224/0557 ,  H01L2224/05571 ,  H01L2224/11462 ,  H01L2224/13009 ,  H01L2224/13025 ,  H01L2224/14181 ,  H01L2224/16146 ,  H01L2224/16225 ,  H01L2224/2741 ,  H01L2224/27436 ,  H01L2224/2929 ,  H01L2224/293 ,  H01L2224/29386 ,  H01L2224/73104 ,  H01L2224/73153 ,  H01L2224/73204 ,  H01L2224/73253 ,  H01L2224/81005 ,  H01L2224/81191 ,  H01L2224/81193 ,  H01L2224/83192 ,  H01L2224/83851 ,  H01L2224/9211 ,  H01L2224/94 ,  H01L2224/97 ,  H01L2225/06513 ,  H01L2225/06541 ,  H01L2225/06568 ,  H01L2924/00014 ,  H01L2924/07802 ,  H01L2924/07811 ,  H01L2924/14 ,  H01L2924/1436 ,  H01L2224/81 ,  H01L2224/83 ,  H01L2924/00 ,  H01L2224/05552

摘要： A wafer level molding structure and a manufacturing method thereof are provided. A molding structure includes a first chip and a second chip and an adhesive layer there between. The first chip includes a first back side, a first front side and a plurality of lateral sides, in which a plurality of first front side bumps are disposed on the first front side. The second chip includes a second back side and a second front side, and a plurality of second back side bumps and second front side bumps are respectively disposed on the second back side and the second front side. A plurality of through-hole vias is disposed in the second chip, and electrically connected the second back side bumps to the second front side bumps. Adhesive materials covering the lateral sides of the first chip, and electrically connect the second back side bumps with the first front side bumps. The adhesive materials include a plurality of conductive particles and/or a plurality of non-conductive particles.

摘要翻译： 提供了晶片级成型结构及其制造方法。 模制结构包括第一芯片和第二芯片以及其间的粘合剂层。 第一芯片包括第一前侧，第一前侧和多个侧边，多个第一前侧凸块设置在第一前侧。 第二芯片包括第二后侧和第二前侧，并且多个第二后侧凸块和第二前侧凸块分别设置在第二后侧和第二前侧上。 多个通孔通孔设置在第二芯片中，并且将第二背面凸块电连接到第二前侧凸块。 粘合剂材料覆盖第一芯片的侧面，并且将第二背面凸块与第一前侧凸块电连接。 粘合剂材料包括多个导电颗粒和/或多个非导电颗粒。

公开(公告)号：US20120161336A1

公开(公告)日：2012-06-28

申请号：US13089289

申请日：2011-04-18

申请人： Yu-Min Lin ,  Chau-Jie Zhan ,  Su-Tsai Lu

发明人： Yu-Min Lin ,  Chau-Jie Zhan ,  Su-Tsai Lu

IPC分类号： H01L23/48 ,  H01L21/58

CPC分类号： H01L24/17 ,  H01L21/563 ,  H01L23/345 ,  H01L24/14 ,  H01L24/16 ,  H01L24/73 ,  H01L24/81 ,  H01L24/92 ,  H01L25/0657 ,  H01L2224/0401 ,  H01L2224/13111 ,  H01L2224/13144 ,  H01L2224/14131 ,  H01L2224/14505 ,  H01L2224/16145 ,  H01L2224/16225 ,  H01L2224/16507 ,  H01L2224/17505 ,  H01L2224/73204 ,  H01L2224/81191 ,  H01L2224/81193 ,  H01L2224/81224 ,  H01L2224/81234 ,  H01L2224/8181 ,  H01L2224/81815 ,  H01L2224/81948 ,  H01L2224/92125 ,  H01L2225/06513 ,  H01L2225/06517 ,  H01L2924/00013 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01047 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/01327 ,  H01L2924/014 ,  H01L2924/351 ,  H01L2924/00014 ,  H01L2924/00 ,  H01L2224/13099 ,  H01L2224/13599 ,  H01L2224/05599 ,  H01L2224/05099 ,  H01L2224/29099 ,  H01L2224/29599 ,  H01L2224/32145 ,  H01L2924/00012 ,  H01L2224/32225

摘要： A semiconductor device and an assembling method thereof are provided. The semiconductor device includes a chip, a carrier, a plurality of first conductive elements and a plurality of second conductive elements. The chip has a plurality of first pads. The carrier has a plurality of second pads. The second pads correspond to the first pads. Each first conductive element is disposed between one of the first pads and one of the second pads. Each second conductive element is disposed between one of the first pads and one of the second pads. A volume ratio of intermetallic compound of the second conductive elements is greater than a volume ratio of intermetallic compound of the first conductive elements.

摘要翻译： 提供了一种半导体器件及其组装方法。 半导体器件包括芯片，载体，多个第一导电元件和多个第二导电元件。 芯片具有多个第一焊盘。 载体具有多个第二垫。 第二垫对应于第一垫。 每个第一导电元件设置在第一焊盘之一和第二焊盘中的一个之间。 每个第二导电元件设置在第一焊盘之一和第二焊盘中的一个之间。 第二导电元件的金属间化合物的体积比大于第一导电元件的金属间化合物的体积比。

公开(公告)号：US20110316830A1

公开(公告)日：2011-12-29

申请号：US13227455

申请日：2011-09-07

申请人： Yu-Min Lin ,  Hsin-Li Chen ,  Feng-Yuan Gan

发明人： Yu-Min Lin ,  Hsin-Li Chen ,  Feng-Yuan Gan

IPC分类号： G09G5/10 ,  H01L31/12 ,  H01L31/18

CPC分类号： H01L31/12 ,  G02F1/13338 ,  G02F2001/13312 ,  G06F3/0412 ,  G09G3/20 ,  G09G2300/0408 ,  G09G2360/144 ,  H01L31/145 ,  H01L31/18

摘要： A photo detector is disclosed. The photo detector includes a substrate, a first patterned semiconductor layer, a dielectric layer, a patterned conductive layer, an inter-layer dielectric, a second patterned semiconductor layer, two first electrodes disposed on the inter-layer dielectric and two second electrodes disposed on portions of the second semiconductor layer. The first patterned semiconductor layer having a first doping region and a second doping region is disposed on a transistor region. The dielectric layer is disposed to cover the substrate and the first semiconductor layer, the patterned conductive layer is disposed on the dielectric layer, and the inter-layer dielectric having at least two openings adapted to expose the first doping region and the second doping region is disposed to cover the dielectric layer. The second patterned semiconductor layer is disposed on a photosensitive region and the first electrodes are electrically connected to the first patterned semiconductor layer.

摘要翻译： 公开了一种光电检测器。 光检测器包括衬底，第一图案化半导体层，电介质层，图案化导电层，层间电介质，第二图案化半导体层，设置在层间电介质上的两个第一电极和设置在层间电介质上的两个第二电极 第二半导体层的部分。 具有第一掺杂区域和第二掺杂区域的第一图案化半导体层设置在晶体管区域上。 介电层设置成覆盖基板和第一半导体层，图案化的导电层设置在电介质层上，并且具有适于暴露第一掺杂区域和第二掺杂区域的至少两个开口的层间电介质是 被设置成覆盖电介质层。 第二图案化半导体层设置在光敏区域上，并且第一电极电连接到第一图案化半导体层。

公开(公告)号：US20100239253A1

公开(公告)日：2010-09-23

申请号：US12504322

申请日：2009-07-16

申请人： Yu-Min Lin ,  Po-Lung Tien ,  Maria C. Yuang

发明人： Yu-Min Lin ,  Po-Lung Tien ,  Maria C. Yuang

IPC分类号： H04J14/00

CPC分类号： H04J14/0282 ,  H04J14/0201 ,  H04J14/0247 ,  H04J14/0252 ,  H04J14/0265 ,  H04J14/0275 ,  H04J2014/0253 ,  H04W88/08

摘要： A passive optical network (PON) system supporting wireless communication includes an optical line terminal (OLT) configured on a central office, an optical distribution network (ODN), and a plurality of optical network units (ONUs) respectively configured on user ends. The ODN is connected to the OLT and the ONUs in a one-to-many manner. The OLT sends a downstream optical signal to the ODN, and receives an upstream optical signal. The ODN circularly guides the optical signal to each ONU. Each ONU receives and reflects the downstream optical signal, processes the received downstream optical signal, receives and processes the upstream optical signal, carries an electrical signal to be uploaded into the upstream optical signal, and carries data received by a remote antenna into the upstream optical signal. Through the above architecture, the PON system supports wireless communication.

摘要翻译： 支持无线通信的无源光网络（PON）系统包括配置在中心局的光线路终端（OLT），配光网络（ODN）和分别在用户端配置的多个光网络单元（ONU）。 ODN以一对多的方式连接到OLT和ONU。 OLT向ODN发送下行光信号，并接收上行光信号。 ODN将光信号循环引导到每个ONU。 每个ONU接收并反映下行光信号，处理接收到的下行光信号，接收并处理上游光信号，承载要上传到上游光信号的电信号，并将远程天线接收的数据传送到上游光信号 信号。 通过上述架构，PON系统支持无线通信。

公开(公告)号：US20100034402A1

公开(公告)日：2010-02-11

申请号：US12344270

申请日：2008-12-25

申请人： Yu-Min Lin ,  Chang-Ho Liou ,  Yu-Wei Huang ,  Ming-Daw Chen ,  Rong-Shen Lee

发明人： Yu-Min Lin ,  Chang-Ho Liou ,  Yu-Wei Huang ,  Ming-Daw Chen ,  Rong-Shen Lee

IPC分类号： H04R25/00

CPC分类号： H04R1/06

摘要： An electrode connection structure of a speaker unit is provided. The speaker unit includes at least one electrode layer, which is made of a conductive material, or made of a non-conductive material with a conductive layer formed on a surface thereof. The electrode connection structure includes a conductive electrode and an adhesive material. The conductive electrode is used for providing power supply signals for the speaker unit to generate sounds. The adhesive material adheres the conductive electrode in parallel with a surface of the electrode layer. The adhesive material has adhesive characteristics, so as to electrically connect the conductive electrode and the electrode layer, in which the adhesive material is adhered to a side of the surface of the electrode layer closely adjacent to the conductive electrode with a certain area.

摘要翻译： 提供扬声器单元的电极连接结构。 扬声器单元包括至少一个电极层，该电极层由导电材料制成，或由其表面上形成有导电层的非导电材料制成。 电极连接结构包括导电电极和粘合材料。 导电电极用于为扬声器单元提供电源信号以产生声音。 粘合剂材料将导电电极与电极层的表面平行地粘合。 粘合剂材料具有粘合特性，以便以一定面积将导电电极和电极层电连接，其中粘合剂材料粘附到与导电电极紧密相邻的电极层的表面的一侧。

公开(公告)号：US08384215B2

公开(公告)日：2013-02-26

申请号：US12981475

申请日：2010-12-30

申请人： Su-Tsai Lu ,  Jing-Ye Juang ,  Yu-Min Lin

发明人： Su-Tsai Lu ,  Jing-Ye Juang ,  Yu-Min Lin

IPC分类号： H01L23/485 ,  H01L23/496

CPC分类号： H01L23/295 ,  H01L21/561 ,  H01L21/563 ,  H01L21/568 ,  H01L24/05 ,  H01L24/11 ,  H01L24/13 ,  H01L24/14 ,  H01L24/16 ,  H01L24/27 ,  H01L24/29 ,  H01L24/73 ,  H01L24/92 ,  H01L24/94 ,  H01L24/97 ,  H01L25/0657 ,  H01L25/50 ,  H01L2224/03464 ,  H01L2224/0401 ,  H01L2224/05548 ,  H01L2224/05556 ,  H01L2224/05558 ,  H01L2224/0557 ,  H01L2224/05571 ,  H01L2224/11462 ,  H01L2224/13009 ,  H01L2224/13025 ,  H01L2224/14181 ,  H01L2224/16146 ,  H01L2224/16225 ,  H01L2224/2741 ,  H01L2224/27436 ,  H01L2224/2929 ,  H01L2224/293 ,  H01L2224/29386 ,  H01L2224/73104 ,  H01L2224/73153 ,  H01L2224/73204 ,  H01L2224/73253 ,  H01L2224/81005 ,  H01L2224/81191 ,  H01L2224/81193 ,  H01L2224/83192 ,  H01L2224/83851 ,  H01L2224/9211 ,  H01L2224/94 ,  H01L2224/97 ,  H01L2225/06513 ,  H01L2225/06541 ,  H01L2225/06568 ,  H01L2924/00014 ,  H01L2924/07802 ,  H01L2924/07811 ,  H01L2924/14 ,  H01L2924/1436 ,  H01L2224/81 ,  H01L2224/83 ,  H01L2924/00 ,  H01L2224/05552

摘要： A wafer level molding structure including a first chip, a second chip and an adhesive layer therebetween is provided. The first chip includes a first back side, a first front side and a plurality of lateral sides, and a plurality of first front side bumps are disposed on the first front side. The second chip includes a second back side and a second front side, and a plurality of second back side bumps and second front side bumps are respectively disposed on the second back side and the second front side. A plurality of through electrodes are disposed in the second chip, and electrically connected the second back side bumps to the second front side bumps. Adhesive materials including a plurality of conductive particles cover the lateral sides, and electrically connect the second back side bumps with the first front side bumps.

摘要翻译： 提供了包括第一芯片，第二芯片和其间的粘合剂层的晶片级模制结构。 第一芯片包括第一背面，第一前侧和多个侧面，并且多个第一前侧凸块设置在第一前侧。 第二芯片包括第二后侧和第二前侧，并且多个第二后侧凸块和第二前侧凸块分别设置在第二后侧和第二前侧上。 多个贯通电极设置在第二芯片中，并且将第二背面凸块电连接到第二前侧凸块。 包括多个导电颗粒的粘合材料覆盖侧面，并且将第二后侧凸起与第一前侧凸起电连接。

公开(公告)号：US20120329261A1

公开(公告)日：2012-12-27

申请号：US13164781

申请日：2011-06-21

申请人： Shao-Wei Wang ,  Yu-Ren Wang ,  Chien-Liang Lin ,  Wen-Yi Teng ,  Tsuo-Wen Lu ,  Chih-Chung Chen ,  Ying-Wei Yen ,  Yu-Min Lin ,  Chin-Cheng Chien ,  Jei-Ming Chen ,  Chun-Wei Hsu ,  Chia-Lung Chang ,  Yi-Ching Wu ,  Shu-Yen Chan

发明人： Shao-Wei Wang ,  Yu-Ren Wang ,  Chien-Liang Lin ,  Wen-Yi Teng ,  Tsuo-Wen Lu ,  Chih-Chung Chen ,  Ying-Wei Yen ,  Yu-Min Lin ,  Chin-Cheng Chien ,  Jei-Ming Chen ,  Chun-Wei Hsu ,  Chia-Lung Chang ,  Yi-Ching Wu ,  Shu-Yen Chan

IPC分类号： H01L21/782 ,  H01L21/28

CPC分类号： H01L29/7833 ,  H01L21/265 ,  H01L21/3215 ,  H01L21/823842 ,  H01L29/4966 ,  H01L29/517 ,  H01L29/665 ,  H01L29/66545 ,  H01L29/6659

摘要： A manufacturing method for a metal gate includes providing a substrate having at least a semiconductor device with a conductivity type formed thereon, forming a gate trench in the semiconductor device, forming a work function metal layer having the conductivity type and an intrinsic work function corresponding to the conductivity type in the gate trench, and performing an ion implantation to adjust the intrinsic work function of the work function metal layer to a target work function.

摘要翻译： 一种金属栅极的制造方法，包括提供具有至少形成有导电类型的半导体器件的衬底，在该半导体器件中形成栅极沟槽，形成具有导电类型的功函数金属层和对应于 栅极沟槽中的导电类型，并且执行离子注入以将功函数金属层的固有功函数调整到目标功函数。