公开(公告)号：US20150004738A1

公开(公告)日：2015-01-01

申请号：US14371550

申请日：2013-01-08

Applicant: Sony Corporation

Inventor： Nobutoshi Fujii ,  Kenichi Aoyagi ,  Yoshiya Hagimoto ,  Hayato Iwamoto

IPC: H01L27/146

CPC classification number: H01L27/14687 ,  H01L25/0657 ,  H01L25/50 ,  H01L27/14634 ,  H01L27/1464 ,  H01L27/14683 ,  H01L27/14689 ,  H01L27/1469 ,  H01L31/1876 ,  H01L2924/0002 ,  Y02E10/50 ,  Y02P70/521 ,  H01L2924/00

Abstract: The present technology includes: bonding a device formation side of a first substrate having a first device and a device formation side of a second substrate having a second device in opposition to each other; forming a protective film on at least an edge of the second substrate having the second device; and reducing a thickness of the first substrate.

Abstract translation: 本技术包括：将具有第一器件的第一衬底的器件形成侧和具有第二器件的第二衬底的器件形成侧彼此相对地接合; 在具有第二装置的第二基板的至少边缘上形成保护膜; 并减小第一基板的厚度。

公开(公告)号：US20140362267A1

公开(公告)日：2014-12-11

申请号：US14467852

申请日：2014-08-25

Applicant: Sony Corporation

Inventor： Yoshihisa Kagawa ,  Kenichi Aoyagi ,  Yoshiya Hagimoto ,  Nobutoshi Fujii

IPC: H01L23/00 ,  H04N5/369

CPC classification number: H01L27/14636 ,  H01L21/76807 ,  H01L21/7684 ,  H01L21/76841 ,  H01L21/76843 ,  H01L23/481 ,  H01L23/528 ,  H01L23/5283 ,  H01L23/53223 ,  H01L23/53238 ,  H01L23/53266 ,  H01L23/53295 ,  H01L23/564 ,  H01L24/03 ,  H01L24/05 ,  H01L24/06 ,  H01L24/08 ,  H01L24/80 ,  H01L24/83 ,  H01L27/0688 ,  H01L27/14609 ,  H01L27/14621 ,  H01L27/14625 ,  H01L27/1464 ,  H01L27/14645 ,  H01L27/1469 ,  H01L2221/1031 ,  H01L2224/02245 ,  H01L2224/05027 ,  H01L2224/0508 ,  H01L2224/05124 ,  H01L2224/05147 ,  H01L2224/05166 ,  H01L2224/05181 ,  H01L2224/05546 ,  H01L2224/05547 ,  H01L2224/05571 ,  H01L2224/05573 ,  H01L2224/05578 ,  H01L2224/05647 ,  H01L2224/05686 ,  H01L2224/08121 ,  H01L2224/08145 ,  H01L2224/0903 ,  H01L2224/80011 ,  H01L2224/80013 ,  H01L2224/80091 ,  H01L2224/80097 ,  H01L2224/80203 ,  H01L2224/80345 ,  H01L2224/80357 ,  H01L2224/80895 ,  H01L2224/80896 ,  H01L2224/83345 ,  H01L2924/00014 ,  H01L2924/12043 ,  H01L2924/13091 ,  H04N5/369 ,  H01L2924/00012 ,  H01L2924/05442 ,  H01L2924/05042 ,  H01L2924/053 ,  H01L2924/049 ,  H01L2924/00 ,  H01L2224/05552

Abstract: Disclosed herein is a semiconductor device, including: a first substrate including a first electrode, and a first insulating film configured from a diffusion preventing material for the first electrode and covering a periphery of the first electrode, the first electrode and the first insulating film cooperating with each other to configure a bonding face; and a second substrate bonded to and provided on the first substrate and including a second electrode joined to the first electrode, and a second insulating film configured from a diffusion preventing material for the second electrode and covering a periphery of the second electrode, the second electrode and the second insulating film cooperating with each other to configure a bonding face to the first substrate.

Abstract translation: 本发明公开了一种半导体器件，包括：第一基板，包括第一电极和由用于第一电极的扩散防止材料构成的第一绝缘膜，并且覆盖第一电极的周边，第一电极和第一绝缘膜协作 彼此配置接合面; 以及第二基板，其接合并设置在所述第一基板上并且包括接合到所述第一电极的第二电极，以及由用于所述第二电极的扩散防止材料构成并覆盖所述第二电极的周边的第二绝缘膜，所述第二电极 并且所述第二绝缘膜彼此配合以配置到所述第一基板的接合面。

公开(公告)号：US20130175522A1

公开(公告)日：2013-07-11

申请号：US13732948

申请日：2013-01-02

Applicant: SONY CORPORATION

Inventor： Tsutomu Shimayama ,  Nobutoshi Fujii ,  Takashige Fujimori

IPC: H01L29/786 ,  H01L29/66 ,  H01L27/15

CPC classification number: H01L29/78693 ,  H01L27/15 ,  H01L29/66742 ,  H01L29/66969 ,  H01L29/78606 ,  H01L29/78618

Abstract: A thin film transistor includes: a gate electrode, a source electrode, and a drain electrode; an oxide semiconductor layer provided on one side of the gate electrode with an insulating film in between, the oxide semiconductor layer being provided in a region not facing the source electrode and the drain electrode and being electrically connected to the source electrode and the drain electrode; and a low resistance oxide layer provided in a region facing the source electrode and in a region facing the drain electrode, the regions being adjacent to the oxide semiconductor layer, and the low resistance oxide layer having an electric resistivity lower than an electric resistivity of the oxide semiconductor layer.

Abstract translation: 薄膜晶体管包括：栅电极，源电极和漏电极; 氧化物半导体层，其设置在栅电极的一侧，其间具有绝缘膜，所述氧化物半导体层设置在不面向所述源电极和所述漏电极的区域中，并且与所述源电极和所述漏电极电连接; 以及低电阻氧化物层，其设置在面向所述源电极的区域和与所述漏电极相对的区域中，所述区域与所述氧化物半导体层相邻，并且所述低电阻氧化物层的电阻率低于所述电阻率 氧化物半导体层。

公开(公告)号：US11569123B2

公开(公告)日：2023-01-31

申请号：US17194641

申请日：2021-03-08

Applicant: Sony Corporation

Inventor： Yoshihisa Kagawa ,  Kenichi Aoyagi ,  Yoshiya Hagimoto ,  Nobutoshi Fujii

IPC: H01L31/0232 ,  H01L21/768 ,  H01L23/528 ,  H01L27/146 ,  H01L23/00 ,  H04N5/369 ,  H01L23/532 ,  H01L23/48 ,  H01L27/06

Abstract: Disclosed herein is a semiconductor device, including: a first substrate including a first electrode, and a first insulating film configured from a diffusion preventing material for the first electrode and covering a periphery of the first electrode, the first electrode and the first insulating film cooperating with each other to configure a bonding face; and a second substrate bonded to and provided on the first substrate and including a second electrode joined to the first electrode, and a second insulating film configured from a diffusion preventing material for the second electrode and covering a periphery of the second electrode, the second electrode and the second insulating film cooperating with each other to configure a bonding face to the first substrate.

公开(公告)号：US10818717B2

公开(公告)日：2020-10-27

申请号：US16564444

申请日：2019-09-09

Applicant: SONY CORPORATION

Inventor： Hiroyasu Matsugai ,  Hiroyuki Itou ,  Suguru Saito ,  Keiji Ohshima ,  Masanori Iwasaki ,  Toshihiko Hayashi ,  Shuzo Sato ,  Nobutoshi Fujii ,  Hiroshi Tazawa ,  Toshiaki Shiraiwa ,  Minoru Ishida

IPC: H01L27/146 ,  B29D11/00 ,  G02B13/00 ,  G02B1/11

Abstract: A deformation of a stacked lens is suppressed.A stacked lens structure has a configuration in which substrates with lenses having a lens disposed on an inner side of a through-hole formed in the substrate are bonded and stacked by direct bonding. The present technique can be applied to a camera module or the like in which a stacked lens structure in which at least three substrates with lenses including first to third substrates with lenses which are substrates with lenses in which a through-hole is formed in the substrate and a lens is formed on an inner side of the through-hole is integrated with a light receiving element, for example.

公开(公告)号：US20190386056A1

公开(公告)日：2019-12-19

申请号：US16554347

申请日：2019-08-28

Applicant: Sony Corporation

Inventor： Nobutoshi Fujii ,  Yoshiya Hagimoto ,  Kenichi Aoyagi ,  Yoshihisa Kagawa

IPC: H01L27/146 ,  H01L21/20 ,  H01L21/768 ,  H04N5/225

Abstract: A semiconductor device includes a first substrate having an attaching surface on which first electrodes and a first insulating film are exposed, an insulating thin film that covers the attaching surface of the first substrate, and a second substrate which has an attaching surface on which second electrodes and a second insulating film are exposed and is attached to the first substrate in a state in which the attaching surface of the second substrate and the attaching surface of the first substrate are attached together sandwiching the insulating thin film therebetween, and the first electrodes and the second electrodes deform and break a part of the insulating thin film so as to be directly electrically connected to each other.

公开(公告)号：US20190273109A1

公开(公告)日：2019-09-05

申请号：US16410877

申请日：2019-05-13

Applicant: Sony Corporation

Inventor： Yoshihisa Kagawa ,  Kenichi Aoyagi ,  Yoshiya Hagimoto ,  Nobutoshi Fujii

IPC: H01L27/146 ,  H01L21/768 ,  H01L23/528 ,  H01L23/532 ,  H04N5/369 ,  H01L23/00

Abstract: Disclosed herein is a semiconductor device, including: a first substrate including a first electrode, and a first insulating film configured from a diffusion preventing material for the first electrode and covering a periphery of the first electrode, the first electrode and the first insulating film cooperating with each other to configure a bonding face; and a second substrate bonded to and provided on the first substrate and including a second electrode joined to the first electrode, and a second insulating film configured from a diffusion preventing material for the second electrode and covering a periphery of the second electrode, the second electrode and the second insulating film cooperating with each other to configure a bonding face to the first substrate.

公开(公告)号：US20180233435A1

公开(公告)日：2018-08-16

申请号：US15945579

申请日：2018-04-04

Applicant: Sony Corporation

Inventor： Nobutoshi Fujii ,  Yoshihisa Kagawa

IPC: H01L23/498 ,  H01L23/522 ,  H01L27/146 ,  H01L23/00 ,  H01L25/065 ,  H01L25/00

CPC classification number: H01L23/498 ,  H01L23/49866 ,  H01L23/522 ,  H01L23/53238 ,  H01L24/05 ,  H01L24/06 ,  H01L24/08 ,  H01L24/09 ,  H01L24/80 ,  H01L25/0657 ,  H01L25/50 ,  H01L27/14636 ,  H01L27/1464 ,  H01L2224/05547 ,  H01L2224/05571 ,  H01L2224/0603 ,  H01L2224/06131 ,  H01L2224/06133 ,  H01L2224/0616 ,  H01L2224/06517 ,  H01L2224/08123 ,  H01L2224/08147 ,  H01L2224/09517 ,  H01L2224/80194 ,  H01L2224/80357 ,  H01L2224/80895 ,  H01L2224/80896 ,  H01L2225/06513 ,  H01L2225/06565 ,  H01L2924/00012 ,  H01L2924/00014 ,  H01L2924/01029 ,  H01L2924/12043 ,  H01L2924/13091 ,  H01L2224/05552 ,  H01L2924/00

Abstract: A first semiconductor device includes: a first wiring layer including a first interlayer insulating film, a first electrode pad, and a first dummy electrode, the first electrode pad being embedded in the first interlayer insulating film and having one surface located on same plane as one surface of the first interlayer insulating film, and the first dummy electrode being embedded in the first interlayer insulating film, having one surface located on same plane as the one surface of the first interlayer insulating film, and being disposed around the first electrode pad; and a second wiring layer including a second interlayer insulating film, a second electrode pad, and a second dummy electrode, the second electrode pad being embedded in the second interlayer insulating film, having one surface located on same surface as one surface of the second interlayer insulating film, and being bonded to the first electrode pad, and the second dummy electrode having one surface located on same plane as the surface located closer to the first interlayer insulating film of the second interlayer insulating film, being disposed around the second electrode pad, and being bonded to the first dummy electrode. A second semiconductor device includes: a first semiconductor section including a first electrode, the first electrode being formed on a surface located closer to a bonding interface and extending in a first direction; and a second semiconductor section including a second electrode and disposed to be bonded to the first semiconductor section at the bonding interface, the second electrode being bonded to the first electrode and extending in a second direction that intersects with the first direction.

公开(公告)号：US10038021B2

公开(公告)日：2018-07-31

申请号：US15476629

申请日：2017-03-31

Applicant: SONY CORPORATION

Inventor： Atsushi Yamamoto ,  Shinji Miyazawa ,  Yutaka Ooka ,  Kensaku Maeda ,  Yusuke Moriya ,  Naoki Ogawa ,  Nobutoshi Fujii ,  Shunsuke Furuse ,  Masaya Nagata ,  Yuichi Yamamoto

IPC: H01L27/00 ,  H01L27/146 ,  H01L31/0203

Abstract: The present technology relates to techniques of preventing intrusion of moisture into a chip.Various illustrative embodiments include image sensors that include: a substrate; a plurality of layers stacked on the substrate; the plurality of layers including a photodiode layer having a plurality of photodiodes formed on a surface of the photodiode layer; the plurality of layers including at least one layer having a groove formed such that a portion of the at least one layer is excavated; and a transparent resin layer formed above the photodiode layer and formed in the groove. The present technology can be applied to, for example, an image sensor.

公开(公告)号：US10026769B2

公开(公告)日：2018-07-17

申请号：US15023783

申请日：2014-09-19

Applicant: SONY CORPORATION

Inventor： Yoshihisa Kagawa ,  Nobutoshi Fujii ,  Masanaga Fukasawa ,  Tokihisa Kaneguchi ,  Yoshiya Hagimoto ,  Kenichi Aoyagi ,  Ikue Mitsuhashi

IPC: H01L27/146 ,  H01L23/48 ,  H01L23/00 ,  H01L25/065 ,  H01L21/768

Abstract: The present technology relates to a semiconductor device and a solid-state imaging device of which crack resistance can be improved in a simpler way. The semiconductor device has an upper substrate that is constituted by a Si substrate and wiring layers laminated on the Si substrate and a second substrate that is constituted by a Si substrate and wiring layers laminated on the Si substrate and is joined to the upper substrate. In addition, a pad for wire bonding or probing is formed in the upper substrate, and pads for protecting corner or side parts of the pad for wire bonding or probing are radially laminated and provided in each of the wiring layers between the pad and the Si substrate of the lower substrate. The present technology can be applied to a solid-state imaging device.