公开(公告)号：US20240047443A1

公开(公告)日：2024-02-08

申请号：US18174431

申请日：2023-02-24

申请人： Kabushiki Kaisha Toshiba ,  Toshiba Electronic Devices & Storage Corporation

发明人： Jia LIU ,  Tatsuo TONEDACHI

IPC分类号： H01L25/16 ,  H01L23/00

CPC分类号： H01L25/167 ,  H01L24/08 ,  H01L24/32 ,  H01L24/48 ,  H01L24/49 ,  H01L2224/08113 ,  H01L2224/08123 ,  H01L2224/08237 ,  H01L2224/32058 ,  H01L2224/32137 ,  H01L2224/32145 ,  H01L2224/4903 ,  H01L2224/48137 ,  H01L2224/48464 ,  H01L2924/12041 ,  H01L2924/12043 ,  H01L2924/13091

摘要： According to one embodiment, a semiconductor device includes a substrate, a first element and a second element on or above a first surface of the substrate, the first element and the second element each including a first terminal, a second terminal, and a gate, a light emitter, a light receiver configured to place the first element and the second element in an ON state or an OFF state according to an emitting state of the light emitter, and a first interconnect electrically coupling the first terminal of the first element and the first terminal of the second element to each other, the first interconnect being a sheet-shaped conductor.

公开(公告)号：US09564414B2

公开(公告)日：2017-02-07

申请号：US14746425

申请日：2015-06-22

申请人： ZIPTRONIX, INC.

发明人： Paul M. Enquist ,  Gaius Gillman Fountain, Jr.

IPC分类号： H01L21/58 ,  H01L21/304 ,  H01L23/00 ,  H01L21/20 ,  H01L21/683 ,  H01L21/768 ,  H01L21/822 ,  H01L23/13 ,  H01L23/36 ,  H01L23/48 ,  H01L23/538 ,  H01L25/065 ,  H01L25/16 ,  H01L25/00 ,  H01L27/06 ,  H01L21/762 ,  H01L21/18 ,  H01L23/552 ,  H01L25/18 ,  H01L27/146

CPC分类号： H01L24/08 ,  H01L21/187 ,  H01L21/2007 ,  H01L21/6835 ,  H01L21/76251 ,  H01L21/76898 ,  H01L21/8221 ,  H01L23/13 ,  H01L23/36 ,  H01L23/481 ,  H01L23/5384 ,  H01L23/5385 ,  H01L23/5389 ,  H01L23/552 ,  H01L24/24 ,  H01L24/26 ,  H01L24/27 ,  H01L24/30 ,  H01L24/48 ,  H01L24/80 ,  H01L24/82 ,  H01L24/83 ,  H01L24/94 ,  H01L25/0652 ,  H01L25/0655 ,  H01L25/0657 ,  H01L25/16 ,  H01L25/167 ,  H01L25/18 ,  H01L25/50 ,  H01L27/0688 ,  H01L27/14634 ,  H01L2221/6835 ,  H01L2221/68359 ,  H01L2221/68363 ,  H01L2223/6677 ,  H01L2224/0807 ,  H01L2224/08123 ,  H01L2224/1134 ,  H01L2224/16 ,  H01L2224/24011 ,  H01L2224/24225 ,  H01L2224/24226 ,  H01L2224/24227 ,  H01L2224/3005 ,  H01L2224/30104 ,  H01L2224/305 ,  H01L2224/48091 ,  H01L2224/48101 ,  H01L2224/48227 ,  H01L2224/48247 ,  H01L2224/80896 ,  H01L2224/81894 ,  H01L2224/8303 ,  H01L2224/83092 ,  H01L2224/83099 ,  H01L2224/8319 ,  H01L2224/83193 ,  H01L2224/83345 ,  H01L2224/83359 ,  H01L2224/8385 ,  H01L2224/83894 ,  H01L2224/83896 ,  H01L2224/83912 ,  H01L2224/83948 ,  H01L2224/9202 ,  H01L2224/9212 ,  H01L2225/06513 ,  H01L2225/06524 ,  H01L2225/06541 ,  H01L2225/06555 ,  H01L2225/06589 ,  H01L2924/00013 ,  H01L2924/00014 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01015 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01047 ,  H01L2924/01057 ,  H01L2924/01074 ,  H01L2924/01082 ,  H01L2924/0132 ,  H01L2924/014 ,  H01L2924/05442 ,  H01L2924/07802 ,  H01L2924/10253 ,  H01L2924/10329 ,  H01L2924/1305 ,  H01L2924/13062 ,  H01L2924/13063 ,  H01L2924/13064 ,  H01L2924/13091 ,  H01L2924/14 ,  H01L2924/1461 ,  H01L2924/15153 ,  H01L2924/15165 ,  H01L2924/19041 ,  H01L2924/19043 ,  H01L2924/30105 ,  H01L2924/30107 ,  H01L2924/3011 ,  H01L2924/3025 ,  H01L2924/351 ,  Y10S148/012 ,  Y10S438/977 ,  H01L2224/13099 ,  H01L2924/01049 ,  H01L2924/01031 ,  H01L2924/00 ,  H01L2224/45099 ,  H01L2224/45015 ,  H01L2924/207 ,  H01L2224/8203 ,  H01L2224/821 ,  H01L2224/80001 ,  H01L2224/82

摘要： A device integration method and integrated device. The method may include the steps of directly bonding a semiconductor device having a substrate to an element; and removing a portion of the substrate to expose a remaining portion of the semiconductor device after bonding. The element may include one of a substrate used for thermal spreading, impedance matching or for RF isolation, an antenna, and a matching network comprised of passive elements. A second thermal spreading substrate may be bonded to the remaining portion of the semiconductor device. Interconnections may be made through the first or second substrates. The method may also include bonding a plurality of semiconductor devices to an element, and the element may have recesses in which the semiconductor devices are disposed. A conductor array having a plurality of contact structures may be formed on an exposed surface of the semiconductor device, vias may be formed through the semiconductor device to device regions, and interconnection may be formed between said device regions and said contact structures.

摘要翻译： 一种器件集成方法和集成器件。 该方法可以包括将具有衬底的半导体器件直接接合到元件的步骤; 以及去除所述衬底的一部分以在结合之后露出所述半导体器件的剩余部分。 元件可以包括用于热扩散，阻抗匹配或RF隔离的衬底之一，天线以及由无源元件组成的匹配网络。 第二热扩散基板可以结合到半导体器件的其余部分。 互连可以通过第一或第二基底进行。 该方法还可以包括将多个半导体器件接合到元件，并且元件可以具有设置半导体器件的凹部。 具有多个接触结构的导体阵列可以形成在半导体器件的暴露表面上，可以通过半导体器件到器件区域形成通孔，并且可以在所述器件区域和所述接触结构之间形成互连。

公开(公告)号：US20060292744A1

公开(公告)日：2006-12-28

申请号：US11514083

申请日：2006-09-01

申请人： Paul Enquist ,  Gaius Fountain

发明人： Paul Enquist ,  Gaius Fountain

IPC分类号： H01L21/00

CPC分类号： H01L24/08 ,  H01L21/187 ,  H01L21/2007 ,  H01L21/6835 ,  H01L21/76251 ,  H01L21/76898 ,  H01L21/8221 ,  H01L23/13 ,  H01L23/36 ,  H01L23/481 ,  H01L23/5384 ,  H01L23/5385 ,  H01L23/5389 ,  H01L23/552 ,  H01L24/24 ,  H01L24/26 ,  H01L24/27 ,  H01L24/30 ,  H01L24/48 ,  H01L24/80 ,  H01L24/82 ,  H01L24/83 ,  H01L24/94 ,  H01L25/0652 ,  H01L25/0655 ,  H01L25/0657 ,  H01L25/16 ,  H01L25/167 ,  H01L25/18 ,  H01L25/50 ,  H01L27/0688 ,  H01L27/14634 ,  H01L2221/6835 ,  H01L2221/68359 ,  H01L2221/68363 ,  H01L2223/6677 ,  H01L2224/0807 ,  H01L2224/08123 ,  H01L2224/1134 ,  H01L2224/16 ,  H01L2224/24011 ,  H01L2224/24225 ,  H01L2224/24226 ,  H01L2224/24227 ,  H01L2224/3005 ,  H01L2224/30104 ,  H01L2224/305 ,  H01L2224/48091 ,  H01L2224/48101 ,  H01L2224/48227 ,  H01L2224/48247 ,  H01L2224/80896 ,  H01L2224/81894 ,  H01L2224/8303 ,  H01L2224/83092 ,  H01L2224/83099 ,  H01L2224/8319 ,  H01L2224/83193 ,  H01L2224/83345 ,  H01L2224/83359 ,  H01L2224/8385 ,  H01L2224/83894 ,  H01L2224/83896 ,  H01L2224/83912 ,  H01L2224/83948 ,  H01L2224/9202 ,  H01L2224/9212 ,  H01L2225/06513 ,  H01L2225/06524 ,  H01L2225/06541 ,  H01L2225/06555 ,  H01L2225/06589 ,  H01L2924/00013 ,  H01L2924/00014 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01015 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01047 ,  H01L2924/01057 ,  H01L2924/01074 ,  H01L2924/01082 ,  H01L2924/0132 ,  H01L2924/014 ,  H01L2924/05442 ,  H01L2924/07802 ,  H01L2924/10253 ,  H01L2924/10329 ,  H01L2924/1305 ,  H01L2924/13062 ,  H01L2924/13063 ,  H01L2924/13064 ,  H01L2924/13091 ,  H01L2924/14 ,  H01L2924/1461 ,  H01L2924/15153 ,  H01L2924/15165 ,  H01L2924/19041 ,  H01L2924/19043 ,  H01L2924/30105 ,  H01L2924/30107 ,  H01L2924/3011 ,  H01L2924/3025 ,  H01L2924/351 ,  Y10S148/012 ,  Y10S438/977 ,  H01L2224/13099 ,  H01L2924/01049 ,  H01L2924/01031 ,  H01L2924/00 ,  H01L2224/45099 ,  H01L2224/45015 ,  H01L2924/207 ,  H01L2224/8203 ,  H01L2224/821 ,  H01L2224/80001 ,  H01L2224/82

摘要： A device integration method and integrated device. The method may include the steps of directly bonding a semiconductor device having a substrate to an element; and removing a portion of the substrate to expose a remaining portion of the semiconductor device after bonding. The element may include one of a substrate used for thermal spreading, impedance matching or for RF isolation, an antenna, and a matching network comprised of passive elements. A second thermal spreading substrate may be bonded to the remaining portion of the semiconductor device. Interconnections may be made through the first or second substrates. The method may also include bonding a plurality of semiconductor devices to an element, and the element may have recesses in which the semiconductor devices are disposed. A conductor array having a plurality of contact structures may be formed on an exposed surface of the semiconductor device, vias may be formed through the semiconductor device to device regions, and interconnection may be formed between said device regions and said contact structures.

公开(公告)号：US20050034303A1

公开(公告)日：2005-02-17

申请号：US10485693

申请日：2002-08-02

申请人： Beatrice Bonvalot

发明人： Beatrice Bonvalot

IPC分类号： G06K19/077 ,  H01L21/60 ,  H01L25/065 ,  H01L25/07 ,  H01L25/18 ,  H05K3/00 ,  H05K1/16

CPC分类号： H01L24/85 ,  H01L24/05 ,  H01L24/08 ,  H01L24/13 ,  H01L24/16 ,  H01L24/17 ,  H01L24/48 ,  H01L24/80 ,  H01L24/81 ,  H01L24/92 ,  H01L2224/0401 ,  H01L2224/04042 ,  H01L2224/05553 ,  H01L2224/05556 ,  H01L2224/05599 ,  H01L2224/05624 ,  H01L2224/08112 ,  H01L2224/08123 ,  H01L2224/08145 ,  H01L2224/08148 ,  H01L2224/13078 ,  H01L2224/16112 ,  H01L2224/16145 ,  H01L2224/16148 ,  H01L2224/17107 ,  H01L2224/48091 ,  H01L2224/48463 ,  H01L2224/80203 ,  H01L2224/81203 ,  H01L2224/85203 ,  H01L2224/85205 ,  H01L2224/85399 ,  H01L2224/9202 ,  H01L2224/9212 ,  H01L2224/92127 ,  H01L2924/00014 ,  H01L2924/01005 ,  H01L2924/01013 ,  H01L2924/01014 ,  H01L2924/01028 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01046 ,  H01L2924/01057 ,  H01L2924/01058 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/10253 ,  H01L2924/14 ,  Y10T29/49126 ,  Y10T29/4913 ,  Y10T29/49144 ,  Y10T29/49147 ,  Y10T29/49155 ,  Y10T29/49165 ,  Y10T29/49204 ,  H01L2224/78 ,  H01L2224/45099 ,  H01L2924/00 ,  H01L2224/85 ,  H01L2224/80

摘要： A method of manufacturing an electrical device that is electrically and mechanically connectable to another electrical device, the electrical device having a face equipped with contact pads, wherein the method includes: a layer-application step in which an adhesive layer is applied on the face equipped with contact pads, the adhesive layer being composed of a substance with adhesive properties; an opening-creation step in which an opening is created through the adhesive layer at the level of a contact pad; an opening-filing step in which the opening is filled with a conductive material so that the opening is substantially filled with the conductive material so as to form a conductive path the volume of which is defined by the opening.

摘要翻译： 一种电气设备的制造方法，其电气和机械地连接到另一电气设备，所述电气设备具有配备有接触垫的面，其中所述方法包括：层施加步骤，其中将粘合剂层施加在装备的面上 具有接触垫，粘合剂层由具有粘合性质的物质组成; 开口创建步骤，其中在接触垫的水平处通过粘合剂层产生开口; 其中开口填充有导电材料，使得开口基本上填充有导电材料，以便形成导体路径，其开口由开口限定。

公开(公告)号：US20230275076A1

公开(公告)日：2023-08-31

申请号：US18312013

申请日：2023-05-04

申请人： CHONGQING KONKA PHOTOELECTRIC TECHNOLOGY RESEARCH INSTITUTE CO., LTD.

发明人： Feng ZHAI

IPC分类号： H01L25/16 ,  H01L33/00 ,  H01L23/00 ,  H01L21/66

CPC分类号： H01L25/167 ,  H01L33/0093 ,  H01L24/05 ,  H01L24/95 ,  H01L22/22 ,  H01L24/06 ,  H01L24/08 ,  H01L24/03 ,  H01L24/80 ,  H01L2224/95001 ,  H01L2224/02175 ,  H01L2224/03013 ,  H01L2224/03318 ,  H01L2224/05073 ,  H01L2224/05022 ,  H01L2224/05578 ,  H01L2224/05609 ,  H01L2224/05686 ,  H01L2224/05562 ,  H01L2224/05571 ,  H01L2224/06505 ,  H01L2224/08502 ,  H01L2224/08123 ,  H01L2224/08145 ,  H01L2224/80203 ,  H01L2224/80805 ,  H01L2924/12041

摘要： A display backplane assembly, a light-emitting diode (LED) display module and a device, and related methods for manufacturing the same are provided in the disclosure. The display backplane assembly includes a display backplane and a planarization layer. The display backplane has a first surface, and electrode connecting pads are disposed on the first surface. The planarization layer is stacked on the first surface and defines multiple accommodating holes extending in a thickness direction of the planarization layer. The multiple accommodating holes correspond to the electrode connection pads. Each of the multiple accommodating holes includes a first hole and a second hole. A bonding material is filled in the first hole and in contact with the electrode connection pad. An adhesive is filled in the second hole.

公开(公告)号：US09431368B2

公开(公告)日：2016-08-30

申请号：US15064467

申请日：2016-03-08

申请人： ZIPTRONIX, INC.

发明人： Paul M. Enquist ,  Gaius Gillman Fountain, Jr.

IPC分类号： H01L21/58 ,  H01L23/00 ,  H01L21/20 ,  H01L21/683 ,  H01L21/768 ,  H01L21/822 ,  H01L23/13 ,  H01L23/36 ,  H01L23/48 ,  H01L23/538 ,  H01L25/065 ,  H01L25/16 ,  H01L25/00 ,  H01L27/06 ,  H01L21/762 ,  H01L23/552 ,  H01L25/18 ,  H01L27/146

CPC分类号： H01L24/08 ,  H01L21/187 ,  H01L21/2007 ,  H01L21/6835 ,  H01L21/76251 ,  H01L21/76898 ,  H01L21/8221 ,  H01L23/13 ,  H01L23/36 ,  H01L23/481 ,  H01L23/5384 ,  H01L23/5385 ,  H01L23/5389 ,  H01L23/552 ,  H01L24/24 ,  H01L24/26 ,  H01L24/27 ,  H01L24/30 ,  H01L24/48 ,  H01L24/80 ,  H01L24/82 ,  H01L24/83 ,  H01L24/94 ,  H01L25/0652 ,  H01L25/0655 ,  H01L25/0657 ,  H01L25/16 ,  H01L25/167 ,  H01L25/18 ,  H01L25/50 ,  H01L27/0688 ,  H01L27/14634 ,  H01L2221/6835 ,  H01L2221/68359 ,  H01L2221/68363 ,  H01L2223/6677 ,  H01L2224/0807 ,  H01L2224/08123 ,  H01L2224/1134 ,  H01L2224/16 ,  H01L2224/24011 ,  H01L2224/24225 ,  H01L2224/24226 ,  H01L2224/24227 ,  H01L2224/3005 ,  H01L2224/30104 ,  H01L2224/305 ,  H01L2224/48091 ,  H01L2224/48101 ,  H01L2224/48227 ,  H01L2224/48247 ,  H01L2224/80896 ,  H01L2224/81894 ,  H01L2224/8303 ,  H01L2224/83092 ,  H01L2224/83099 ,  H01L2224/8319 ,  H01L2224/83193 ,  H01L2224/83345 ,  H01L2224/83359 ,  H01L2224/8385 ,  H01L2224/83894 ,  H01L2224/83896 ,  H01L2224/83912 ,  H01L2224/83948 ,  H01L2224/9202 ,  H01L2224/9212 ,  H01L2225/06513 ,  H01L2225/06524 ,  H01L2225/06541 ,  H01L2225/06555 ,  H01L2225/06589 ,  H01L2924/00013 ,  H01L2924/00014 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01015 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01047 ,  H01L2924/01057 ,  H01L2924/01074 ,  H01L2924/01082 ,  H01L2924/0132 ,  H01L2924/014 ,  H01L2924/05442 ,  H01L2924/07802 ,  H01L2924/10253 ,  H01L2924/10329 ,  H01L2924/1305 ,  H01L2924/13062 ,  H01L2924/13063 ,  H01L2924/13064 ,  H01L2924/13091 ,  H01L2924/14 ,  H01L2924/1461 ,  H01L2924/15153 ,  H01L2924/15165 ,  H01L2924/19041 ,  H01L2924/19043 ,  H01L2924/30105 ,  H01L2924/30107 ,  H01L2924/3011 ,  H01L2924/3025 ,  H01L2924/351 ,  Y10S148/012 ,  Y10S438/977 ,  H01L2224/13099 ,  H01L2924/01049 ,  H01L2924/01031 ,  H01L2924/00 ,  H01L2224/45099 ,  H01L2224/45015 ,  H01L2924/207 ,  H01L2224/8203 ,  H01L2224/821 ,  H01L2224/80001 ,  H01L2224/82

摘要： A method may include the steps of directly bonding a semiconductor device having a substrate to an element; and removing a portion of the substrate to expose a remaining portion of the semiconductor device after bonding. The element may include one of a substrate used for thermal spreading, impedance matching or for RF isolation, an antenna, and a matching network comprised of passive elements. A second thermal spreading substrate may be bonded to the remaining portion of the semiconductor device. Interconnections may be made through the first or second substrates. The method may also include bonding a plurality of semiconductor devices to an element, and the element may have recesses in which the semiconductor devices are disposed.

摘要翻译： 一种方法可以包括将具有衬底的半导体器件直接接合到元件的步骤; 以及去除所述衬底的一部分以在结合之后露出所述半导体器件的剩余部分。 元件可以包括用于热扩散，阻抗匹配或RF隔离的衬底之一，天线以及由无源元件组成的匹配网络。 第二热扩散基板可以结合到半导体器件的其余部分。 互连可以通过第一或第二基底进行。 该方法还可以包括将多个半导体器件接合到元件，并且元件可以具有设置半导体器件的凹部。

公开(公告)号：US20150200171A1

公开(公告)日：2015-07-16

申请号：US14153691

申请日：2014-01-13

申请人： Taiwan Semiconductor Manufacturing Company

发明人： Chen-Hua Yu ,  Chien Ling Hwang ,  Yeong-Jyh Lin

IPC分类号： H01L23/00

CPC分类号： H01L24/17 ,  H01L24/08 ,  H01L24/09 ,  H01L24/11 ,  H01L24/13 ,  H01L24/81 ,  H01L24/83 ,  H01L25/0657 ,  H01L2224/0401 ,  H01L2224/05124 ,  H01L2224/05144 ,  H01L2224/05147 ,  H01L2224/05155 ,  H01L2224/05164 ,  H01L2224/08123 ,  H01L2224/08148 ,  H01L2224/0951 ,  H01L2224/11003 ,  H01L2224/11334 ,  H01L2224/13012 ,  H01L2224/13013 ,  H01L2224/13014 ,  H01L2224/13017 ,  H01L2224/13076 ,  H01L2224/13124 ,  H01L2224/13144 ,  H01L2224/13147 ,  H01L2224/13655 ,  H01L2224/16058 ,  H01L2224/16148 ,  H01L2224/16238 ,  H01L2224/75745 ,  H01L2224/81002 ,  H01L2224/81005 ,  H01L2224/81007 ,  H01L2224/81097 ,  H01L2224/81101 ,  H01L2224/81193 ,  H01L2224/8122 ,  H01L2224/81815 ,  H01L2225/06513 ,  H01L2924/01029 ,  H01L2924/181 ,  H01L2924/00 ,  H01L2924/00014

摘要： A package includes first package component and a second package component. The first package component includes a first electrical connector at a surface of the first package component, and a first solder region on a surface of the first electrical connector. The second package component includes a second electrical connector at a surface of the second package component, and a second solder region on a surface of the second electrical connector. A metal pin has a first end bonded to the first solder region, and a second end bonded to the second solder region.

摘要翻译： 包装包括第一包装部件和第二包装部件。 第一封装部件包括在第一封装部件的表面处的第一电连接器和第一电连接器的表面上的第一焊接区域。 第二封装部件包括在第二封装部件的表面处的第二电连接器，以及在第二电连接器的表面上的第二焊接区域。 金属销具有接合到第一焊料区的第一端，和结合到第二焊料区的第二端。

公开(公告)号：US20150115406A1

公开(公告)日：2015-04-30

申请号：US14284199

申请日：2014-05-21

申请人： MediaTek Inc.

发明人： Tzu-Hung LIN ,  Cheng-Chou HUNG

IPC分类号： H01L49/02

CPC分类号： H01L28/10 ,  H01L23/5227 ,  H01L23/53238 ,  H01L23/66 ,  H01L24/03 ,  H01L24/05 ,  H01L24/08 ,  H01L24/11 ,  H01L24/13 ,  H01L24/45 ,  H01L24/48 ,  H01L2223/6677 ,  H01L2224/02181 ,  H01L2224/0345 ,  H01L2224/03912 ,  H01L2224/03914 ,  H01L2224/0401 ,  H01L2224/04042 ,  H01L2224/05009 ,  H01L2224/05022 ,  H01L2224/05124 ,  H01L2224/05166 ,  H01L2224/05181 ,  H01L2224/05186 ,  H01L2224/05572 ,  H01L2224/05582 ,  H01L2224/05624 ,  H01L2224/05639 ,  H01L2224/05644 ,  H01L2224/05647 ,  H01L2224/08123 ,  H01L2224/08265 ,  H01L2224/11019 ,  H01L2224/1134 ,  H01L2224/11462 ,  H01L2224/1147 ,  H01L2224/11849 ,  H01L2224/13022 ,  H01L2224/1308 ,  H01L2224/13083 ,  H01L2224/131 ,  H01L2224/13147 ,  H01L2224/4502 ,  H01L2224/45144 ,  H01L2224/45147 ,  H01L2224/48463 ,  H01L2224/48824 ,  H01L2224/48839 ,  H01L2224/48844 ,  H01L2224/48847 ,  H01L2224/85007 ,  H01L2924/19011 ,  H01L2924/19042 ,  H01L2924/19051 ,  H01L2924/19103 ,  H01L2924/19104 ,  H01L2924/00014 ,  H01L2924/00 ,  H01L2924/04941 ,  H01L2924/04953 ,  H01L2924/014

摘要： The invention provides a semiconductor structure. The semiconductor structure includes a substrate. A first passivation layer is disposed on the substrate. A conductive pad is disposed on the first passivation layer. A second passivation layer is disposed on the first passivation layer. A passive device is disposed on the conductive pad, passing through the second passivation layer. An organic solderability preservative film covers the passive device.

摘要翻译： 本发明提供一种半导体结构。 半导体结构包括基板。 第一钝化层设置在基板上。 导电焊盘设置在第一钝化层上。 第二钝化层设置在第一钝化层上。 无源器件设置在导电焊盘上，穿过第二钝化层。 有机可焊性防腐膜覆盖无源器件。

公开(公告)号：US06984571B1

公开(公告)日：2006-01-10

申请号：US09410054

申请日：1999-10-01

申请人： Paul M. Enquist

发明人： Paul M. Enquist

IPC分类号： H01L29/06

CPC分类号： H01L24/08 ,  H01L21/187 ,  H01L21/2007 ,  H01L21/6835 ,  H01L21/76251 ,  H01L21/76898 ,  H01L21/8221 ,  H01L23/13 ,  H01L23/36 ,  H01L23/481 ,  H01L23/5384 ,  H01L23/5385 ,  H01L23/5389 ,  H01L23/552 ,  H01L24/24 ,  H01L24/26 ,  H01L24/27 ,  H01L24/30 ,  H01L24/48 ,  H01L24/80 ,  H01L24/82 ,  H01L24/83 ,  H01L24/94 ,  H01L25/0652 ,  H01L25/0655 ,  H01L25/0657 ,  H01L25/16 ,  H01L25/167 ,  H01L25/18 ,  H01L25/50 ,  H01L27/0688 ,  H01L27/14634 ,  H01L2221/6835 ,  H01L2221/68359 ,  H01L2221/68363 ,  H01L2223/6677 ,  H01L2224/0807 ,  H01L2224/08123 ,  H01L2224/1134 ,  H01L2224/16 ,  H01L2224/24011 ,  H01L2224/24225 ,  H01L2224/24226 ,  H01L2224/24227 ,  H01L2224/3005 ,  H01L2224/30104 ,  H01L2224/305 ,  H01L2224/48091 ,  H01L2224/48101 ,  H01L2224/48227 ,  H01L2224/48247 ,  H01L2224/80896 ,  H01L2224/81894 ,  H01L2224/8303 ,  H01L2224/83092 ,  H01L2224/83099 ,  H01L2224/8319 ,  H01L2224/83193 ,  H01L2224/83345 ,  H01L2224/83359 ,  H01L2224/8385 ,  H01L2224/83894 ,  H01L2224/83896 ,  H01L2224/83912 ,  H01L2224/83948 ,  H01L2224/9202 ,  H01L2224/9212 ,  H01L2225/06513 ,  H01L2225/06524 ,  H01L2225/06541 ,  H01L2225/06555 ,  H01L2225/06589 ,  H01L2924/00013 ,  H01L2924/00014 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01015 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01047 ,  H01L2924/01057 ,  H01L2924/01074 ,  H01L2924/01082 ,  H01L2924/0132 ,  H01L2924/014 ,  H01L2924/05442 ,  H01L2924/07802 ,  H01L2924/10253 ,  H01L2924/10329 ,  H01L2924/1305 ,  H01L2924/13062 ,  H01L2924/13063 ,  H01L2924/13064 ,  H01L2924/13091 ,  H01L2924/14 ,  H01L2924/1461 ,  H01L2924/15153 ,  H01L2924/15165 ,  H01L2924/19041 ,  H01L2924/19043 ,  H01L2924/30105 ,  H01L2924/30107 ,  H01L2924/3011 ,  H01L2924/3025 ,  H01L2924/351 ,  Y10S148/012 ,  Y10S438/977 ,  H01L2224/13099 ,  H01L2924/01049 ,  H01L2924/01031 ,  H01L2924/00 ,  H01L2224/45099 ,  H01L2224/45015 ,  H01L2924/207 ,  H01L2224/8203 ,  H01L2224/821 ,  H01L2224/80001 ,  H01L2224/82

摘要： A device integration method and integrated device. The method includes the steps of polishing surfaces of first and second workpieces each to a surface roughness of about 5–10 Å. The polished surfaces of the first and second workpieces are bonded together. A surface of a third workpiece is polished to the surface roughness. The surface of the third workpiece is bonded to the joined first and second workpieces. The first, second and third workpieces may each be a semiconductor device having a thin material formed on one surface, preferably in wafer form. The thin materials are polished to the desired surface roughness and then bonded together. The thin materials may each have a thickness of approximately 1–10 times the surface non-planarity of the material on which they are formed. Any number of devices may be bonded together, and the devices may be different types of devices or different technologies.

公开(公告)号：US20020173120A1

公开(公告)日：2002-11-21

申请号：US10192702

申请日：2002-07-11

申请人： ZIPTRONIX

发明人： Paul M. Enquist

IPC分类号： H01L021/30 ,  H01L021/46

CPC分类号： H01L24/08 ,  H01L21/187 ,  H01L21/2007 ,  H01L21/6835 ,  H01L21/76251 ,  H01L21/76898 ,  H01L21/8221 ,  H01L23/13 ,  H01L23/36 ,  H01L23/481 ,  H01L23/5384 ,  H01L23/5385 ,  H01L23/5389 ,  H01L23/552 ,  H01L24/24 ,  H01L24/26 ,  H01L24/27 ,  H01L24/30 ,  H01L24/48 ,  H01L24/80 ,  H01L24/82 ,  H01L24/83 ,  H01L24/94 ,  H01L25/0652 ,  H01L25/0655 ,  H01L25/0657 ,  H01L25/16 ,  H01L25/167 ,  H01L25/18 ,  H01L25/50 ,  H01L27/0688 ,  H01L27/14634 ,  H01L2221/6835 ,  H01L2221/68359 ,  H01L2221/68363 ,  H01L2223/6677 ,  H01L2224/0807 ,  H01L2224/08123 ,  H01L2224/1134 ,  H01L2224/16 ,  H01L2224/24011 ,  H01L2224/24225 ,  H01L2224/24226 ,  H01L2224/24227 ,  H01L2224/3005 ,  H01L2224/30104 ,  H01L2224/305 ,  H01L2224/48091 ,  H01L2224/48101 ,  H01L2224/48227 ,  H01L2224/48247 ,  H01L2224/80896 ,  H01L2224/81894 ,  H01L2224/8303 ,  H01L2224/83092 ,  H01L2224/83099 ,  H01L2224/8319 ,  H01L2224/83193 ,  H01L2224/83345 ,  H01L2224/83359 ,  H01L2224/8385 ,  H01L2224/83894 ,  H01L2224/83896 ,  H01L2224/83912 ,  H01L2224/83948 ,  H01L2224/9202 ,  H01L2224/9212 ,  H01L2225/06513 ,  H01L2225/06524 ,  H01L2225/06541 ,  H01L2225/06555 ,  H01L2225/06589 ,  H01L2924/00013 ,  H01L2924/00014 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01015 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01047 ,  H01L2924/01057 ,  H01L2924/01074 ,  H01L2924/01082 ,  H01L2924/0132 ,  H01L2924/014 ,  H01L2924/05442 ,  H01L2924/07802 ,  H01L2924/10253 ,  H01L2924/10329 ,  H01L2924/1305 ,  H01L2924/13062 ,  H01L2924/13063 ,  H01L2924/13064 ,  H01L2924/13091 ,  H01L2924/14 ,  H01L2924/1461 ,  H01L2924/15153 ,  H01L2924/15165 ,  H01L2924/19041 ,  H01L2924/19043 ,  H01L2924/30105 ,  H01L2924/30107 ,  H01L2924/3011 ,  H01L2924/3025 ,  H01L2924/351 ,  Y10S148/012 ,  Y10S438/977 ,  H01L2224/13099 ,  H01L2924/01049 ,  H01L2924/01031 ,  H01L2924/00 ,  H01L2224/45099 ,  H01L2224/45015 ,  H01L2924/207 ,  H01L2224/8203 ,  H01L2224/821 ,  H01L2224/80001 ,  H01L2224/82

摘要： A device integration method and integrated device. The method includes the steps of polishing surfaces of first and second workpieces each to a surface roughness of about 5-10 null. The polished surfaces of the first and second workpieces are bonded together. A surface of a third workpiece is polished to the surface roughness. The surface of the third workpiece is bonded to the joined first and second workpieces. The first, second and third workpieces may each be a semiconductor device having a thin material formed on one surface, preferably in wafer form. The thin materials are polished to the desired surface roughness and then bonded together. The thin materials may each have a thickness of approximately 1-10 times the surface non-planarity of the material on which they are formed. Any number of devices may be bonded together, and the devices may be different types of devices or different technologies.

摘要翻译： 一种器件集成方法和集成器件。 该方法包括以下步骤：将第一和第二工件的表面各自抛光到大约5-10的表面粗糙度。 第一和第二工件的抛光表面粘合在一起。 将第三工件的表面抛光至表面粗糙度。 第三工件的表面被接合到接合的第一和第二工件上。 第一，第二和第三工件可以各自是具有在一个表面上形成的薄材料，优选以晶片形式形成的半导体器件。 将薄的材料抛光至所需的表面粗糙度，然后粘结在一起。 薄材料可以各自具有其形成它们的材料的表面非平面度的大约1-10倍的厚度。 任何数量的设备可以结合在一起，并且设备可以是不同类型的设备或不同的技术。