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公开(公告)号：US09343660B2
公开(公告)日：2016-05-17
申请号：US14583831
申请日：2014-12-29
Applicant: Samsung Electronics Co., Ltd.
Inventor： Jangeun Lee , Sechung Oh , Jeahyoung Lee , Woojin Kim , Junho Jeong , Woo Chang Lim
CPC classification number: H01L43/10 , B82Y25/00 , G11C11/161 , H01F10/123 , H01F10/3254 , H01F10/3272 , H01F10/3286 , H01L27/222 , H01L43/02 , H01L43/08
Abstract: A magnetic memory device is provided. The magnetic memory device includes a first vertical magnetic layer and a second vertical magnetic layer on a substrate, a tunnel barrier layer between the first vertical magnetic layer and the second vertical magnetic layer, and an exchange-coupling layer between a first sub-layer of the first vertical magnetic layer and a second sub-layer of the first vertical magnetic layer.
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公开(公告)号：US09048417B2
公开(公告)日：2015-06-02
申请号：US14464835
申请日：2014-08-21
Applicant: Samsung Electronics Co., Ltd.
Inventor： Jangeun Lee , Sechung Oh , Jeahyoung Lee , Woojin Kim , Junho Jeong , Woo Chang Lim
CPC classification number: H01L43/10 , B82Y25/00 , G11C11/161 , H01F10/123 , H01F10/3254 , H01F10/3272 , H01F10/3286 , H01L27/222 , H01L43/02 , H01L43/08
Abstract: A magnetic memory device is provided. The magnetic memory device includes a first vertical magnetic layer and a second vertical magnetic layer on a substrate, a tunnel barrier layer between the first vertical magnetic layer and the second vertical magnetic layer, and an exchange-coupling layer between a first sub-layer of the first vertical magnetic layer and a second sub-layer of the first vertical magnetic layer.
Abstract translation: 提供磁存储器件。 所述磁存储器件包括：衬底上的第一垂直磁性层和第二垂直磁性层，所述第一垂直磁性层和所述第二垂直磁性层之间的隧道势垒层，以及位于所述第一垂直磁性层之间的交换耦合层， 第一垂直磁性层和第一垂直磁性层的第二子层。
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公开(公告)号：US20130241037A1
公开(公告)日：2013-09-19
申请号：US13875731
申请日：2013-05-02
Applicant: SAMSUNG ELECTRONICS CO., LTD.
Inventor： Junho Jeong , Sukhun Choi , Jangeun Lee , Kyunghyun Kim , Sechung Oh , Kyungtae Nam
IPC: H01L49/02
CPC classification number: H01L28/20 , H01L21/7684 , H01L27/101 , H01L27/2409 , H01L27/2436 , H01L43/12 , H01L45/04 , H01L45/06 , H01L45/08 , H01L45/085 , H01L45/1233 , H01L45/126 , H01L45/143 , H01L45/144 , H01L45/147 , H01L45/1616 , H01L45/1625 , H01L45/1641
Abstract: Methods of fabricating semiconductor devices are provided including forming a dielectric interlayer on a substrate, the dielectric interlayer defining an opening therein. A metal pattern is formed in the opening. An oxidization process is performed on the metal pattern to form a conductive metal oxide pattern, and the conductive metal oxide pattern is planarized. Related semiconductor devices are also provided.
Abstract translation: 提供了制造半导体器件的方法，包括在衬底上形成电介质中间层，电介质层间限定开口。 在开口中形成金属图案。 对金属图案进行氧化处理以形成导电金属氧化物图案，并且导电金属氧化物图案被平坦化。 还提供了相关的半导体器件。
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14.发明授权公开(公告)号：US12190928B2
公开(公告)日：2025-01-07
申请号：US17970788
申请日：2022-10-21
Applicant: SAMSUNG ELECTRONICS CO., LTD.
Inventor： Younghyun Kim , Sechung Oh , Heeju Shin , Jaehoon Kim , Sanghwan Park , Junghwan Park
Abstract: A magnetoresistive random access memory device includes a pinned layer; a tunnel barrier layer on the pinned layer; a free layer structure on the tunnel barrier layer, the free layer structure including a plurality of magnetic layers and a plurality of metal insertion layers between the magnetic layers; and an upper oxide layer on the free layer structure, wherein each of the metal insertion layers includes a non-magnetic metal material doped with a magnetic material, and the metal insertion layers are spaced apart from each other.
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公开(公告)号：US20230074141A1
公开(公告)日：2023-03-09
申请号：US17720591
申请日：2022-04-14
Applicant: Samsung Electronics Co., Ltd.
Inventor： Sanghwan Park , Younghyun Kim , Jaehoon Kim , Jeongheon Park , Sechung Oh
Abstract: A magnetic device includes a seed pattern, a reference magnetic structure on the seed pattern, a free magnetic pattern on the reference magnetic structure, and a tunnel barrier between the reference magnetic structure and the free magnetic pattern. The reference magnetic structure includes a synthetic antiferromagnetic (SAF) structure including a first fixed pattern in contact with an upper surface of the seed pattern, an antiferromagnetic coupling pattern in contact with an upper surface of the first fixed pattern, and a second fixed pattern in contact with an upper surface of the antiferromagnetic coupling pattern; a nonmagnetic pattern in contact with an upper surface of the second fixed pattern; and a polarization reinforcement magnetic pattern in contact with an upper surface of the nonmagnetic pattern.
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Patent Agency Ranking
公开(公告)号：US10403812B2
公开(公告)日：2019-09-03
申请号：US16114964
申请日：2018-08-28
Applicant: Samsung Electronics Co., Ltd.
Inventor： Sung Chul Lee , Ki Woong Kim , Sang Hwan Park , Sechung Oh
Abstract: A magnetic memory device includes a reference magnetic structure, a free magnetic structure, and a tunnel barrier pattern between the reference magnetic structure and the free magnetic structure. The reference magnetic structure includes a first pinned pattern, a second pinned pattern between the first pinned pattern and the tunnel barrier pattern, and an exchange coupling pattern between the first and the second pinned pattern. The second pinned pattern includes a first magnetic pattern adjacent the exchange coupling pattern, a second magnetic pattern adjacent the tunnel barrier pattern, a third magnetic pattern between the first and the second magnetic pattern, a first non-magnetic pattern between the first and the third magnetic pattern, and a second non-magnetic pattern between the second and the third magnetic pattern. The first non-magnetic pattern has a different crystal structure from the second non-magnetic pattern, and at least a portion of the third magnetic pattern is amorphous.
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公开(公告)号：US08785901B2
公开(公告)日：2014-07-22
申请号：US13875731
申请日：2013-05-02
Applicant: Samsung Electronics Co., Ltd.
Inventor： Junho Jeong , Sukhun Choi , Jangeun Lee , Kyunghyun Kim , Sechung Oh , Kyungtae Nam
CPC classification number: H01L28/20 , H01L21/7684 , H01L27/101 , H01L27/2409 , H01L27/2436 , H01L43/12 , H01L45/04 , H01L45/06 , H01L45/08 , H01L45/085 , H01L45/1233 , H01L45/126 , H01L45/143 , H01L45/144 , H01L45/147 , H01L45/1616 , H01L45/1625 , H01L45/1641
Abstract: Methods of fabricating semiconductor devices are provided including forming a dielectric interlayer on a substrate, the dielectric interlayer defining an opening therein. A metal pattern is formed in the opening. An oxidization process is performed on the metal pattern to form a conductive metal oxide pattern, and the conductive metal oxide pattern is planarized. Related semiconductor devices are also provided.
Abstract translation: 提供了制造半导体器件的方法，包括在衬底上形成电介质中间层，电介质层间限定开口。 在开口中形成金属图案。 对金属图案进行氧化处理以形成导电金属氧化物图案，并且导电金属氧化物图案被平坦化。 还提供了相关的半导体器件。
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公开(公告)号：US11495736B2
公开(公告)日：2022-11-08
申请号：US16793336
申请日：2020-02-18
Applicant: Samsung Electronics Co., Ltd.
Inventor： Kyungil Hong , Younghyun Kim , Junghwan Park , Sechung Oh , Jungmin Lee
Abstract: A semiconductor device includes a plurality of magnetic tunnel junction (MTJ) structures in an interlayer insulating layer on a substrate. A blocking layer is on the interlayer insulating layer and the plurality of MTJ structures. An upper insulating layer is on the blocking layer. An upper interconnection is on the upper insulating layer. An upper plug is connected to the upper interconnection and a corresponding one of the plurality of MTJ structures and extends into the upper insulating layer and the blocking layer. The blocking layer includes a material having a higher absorbance constant than the upper insulating layer.
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公开(公告)号：US20220158085A1
公开(公告)日：2022-05-19
申请号：US17358435
申请日：2021-06-25
Applicant: Samsung Electronics Co., Ltd.
Inventor： Sanghwan Park , Jaehoon Kim , Yongsung Park , Hyeonwoo Seo , Sechung Oh , Hyun Cho
Abstract: A magnetic memory device including a magnetic tunnel junction is provided. The magnetic tunnel junction includes a fixed layer, a polarization enhancement structure on the fixed layer, a tunnel barrier layer on the polarization enhancement structure, and a free layer on the tunnel barrier layer, wherein the polarization enhancement structure includes a plurality of polarization enhancement layers and at least one spacer layer which separates the plurality of polarization enhancement layers from each other. A thickness of each of the plurality of polarization enhancement layers is from 5 Å to about 20 Å, and a thickness of the at least one spacer layer is from about 2 Å to about 15 Å.
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公开(公告)号：US11329219B2
公开(公告)日：2022-05-10
申请号：US16840741
申请日：2020-04-06
Applicant: Samsung Electronics Co., Ltd.
Inventor： Jungmin Lee , Younghyun Kim , Junghwan Park , Sechung Oh , Kyungil Hong
Abstract: In a method of manufacturing a magnetoresistive random access memory, a memory structure may be formed on a substrate. The memory structure may include a lower electrode, a magnetic tunnel junction (MTJ) structure, and an upper electrode sequentially stacked. A protection layer including silicon nitride may be formed to cover a surface of the memory structure. The protection layer may be formed by a chemical vapor deposition process using plasma and introducing deposition gases including a silicon source gas, a nitrogen source gas containing no hydrogen and a dissociation gas. Damages of the MTJ structure may be decreased during forming the protection layer. Thus, the MRAM may have improved characteristics.
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