Display Apparatus And Method For Fabricating Display Apparatus

    公开(公告)号:US20240365597A1

    公开(公告)日:2024-10-31

    申请号:US18573966

    申请日:2022-06-20

    CPC classification number: H10K59/122 H10K59/1201

    Abstract: A display apparatus with high display quality is provided. The display apparatus includes a first pixel, a second pixel placed to be adjacent to the first pixel, a first insulating layer, and a second insulating layer over the first insulating layer. The first pixel includes a first pixel electrode, a first EL layer covering the first pixel electrode, a third insulating layer over the first EL layer, and a common electrode over the first EL layer and the third insulating layer. The second pixel includes a second pixel electrode, a second EL layer covering the second pixel electrode, a fourth insulating layer over the second EL layer, and the common electrode over the second EL layer and the fourth insulating layer. Part of the second insulating layer overlaps with the first pixel electrode. Another part of the second insulating layer overlaps with the second pixel electrode. In a cross-sectional view of the display apparatus, a side surface of the second insulating layer has a tapered shape and a top surface thereof has a convex shape.

    SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD THEREOF
    16.
    发明申请
    SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD THEREOF 有权
    半导体器件及其制造方法

    公开(公告)号:US20160233343A1

    公开(公告)日:2016-08-11

    申请号:US15017818

    申请日:2016-02-08

    Inventor: Hidekazu MIYAIRI

    Abstract: A miniaturized transistor having highly stable electrical characteristics is provided. Furthermore, high performance and high reliability of a semiconductor device including the transistor is achieved. The transistor includes a first electrode, a second electrode, a third electrode, an oxide semiconductor layer, a first insulating layer, and a second insulating layer. The transistor includes a first region and a second region surrounded by the first region. In the first region, the first insulating layer, the second electrode, the oxide semiconductor layer, and the second insulating layer are stacked. In the second region, the first electrode, the oxide semiconductor layer, the second insulating layer, and the third electrode are stacked.

    Abstract translation: 提供具有高度稳定的电气特性的小型化晶体管。 此外,实现了包括晶体管的半导体器件的高性能和高可靠性。 晶体管包括第一电极,第二电极,第三电极,氧化物半导体层,第一绝缘层和第二绝缘层。 晶体管包括由第一区域包围的第一区域和第二区域。 在第一区域中,堆叠第一绝缘层,第二电极,氧化物半导体层和第二绝缘层。 在第二区域中,堆叠第一电极,氧化物半导体层,第二绝缘层和第三电极。

    SEMICONDUCTOR DEVICE
    18.
    发明申请
    SEMICONDUCTOR DEVICE 有权
    半导体器件

    公开(公告)号:US20150255490A1

    公开(公告)日:2015-09-10

    申请号:US14638504

    申请日:2015-03-04

    Inventor: Hidekazu MIYAIRI

    Abstract: Provided is a semiconductor device suitable for miniaturization and higher density. The semiconductor device includes a first transistor, a second transistor overlapping with the first transistor, a capacitor overlapping with the second transistor, and a first wiring electrically connected to the capacitor. The first wiring includes a region overlapping with an electrode of the second transistor. The first transistor, the second transistor, and the capacitor are electrically connected to one another. A channel of the first transistor includes a single crystal semiconductor. A channel of the second transistor includes an oxide semiconductor.

    Abstract translation: 提供了适合于小型化和更高密度的半导体器件。 半导体器件包括第一晶体管,与第一晶体管重叠的第二晶体管,与第二晶体管重叠的电容器,以及电连接到电容器的第一布线。 第一布线包括与第二晶体管的电极重叠的区域。 第一晶体管,第二晶体管和电容器彼此电连接。 第一晶体管的沟道包括单晶半导体。 第二晶体管的沟道包括氧化物半导体。

    SEMICONDUCTOR DEVICE
    19.
    发明申请
    SEMICONDUCTOR DEVICE 有权
    半导体器件

    公开(公告)号:US20150069390A1

    公开(公告)日:2015-03-12

    申请号:US14541165

    申请日:2014-11-14

    CPC classification number: H01L29/7869 H01L29/45

    Abstract: An object is to provide a highly reliable transistor and a semiconductor device including the transistor. A semiconductor device including a gate electrode; a gate insulating film over the gate electrode; an oxide semiconductor film over the gate insulating film; and a source electrode and a drain electrode over the oxide semiconductor film, in which activation energy of the oxide semiconductor film obtained from temperature dependence of a current (on-state current) flowing between the source electrode and the drain electrode when a voltage greater than or equal to a threshold voltage is applied to the gate electrode is greater than or equal to 0 meV and less than or equal to 25 meV, is provided.

    Abstract translation: 目的是提供一种高度可靠的晶体管和包括晶体管的半导体器件。 一种包括栅电极的半导体器件; 栅电极上的栅极绝缘膜; 栅极绝缘膜上的氧化物半导体膜; 以及氧化物半导体膜上的源电极和漏电极,其中当氧化物半导体膜的电压大于电压时,源电极和漏电极之间流过的电流(导通电流)的温度依赖性获得氧化物半导体膜的活化能 或等于施加到栅电极的阈值电压大于或等于0meV且小于或等于25meV。

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