公开(公告)号：US09899339B2

公开(公告)日：2018-02-20

申请号：US13668901

申请日：2012-11-05

Applicant: Texas Instruments Incorporated

Inventor： Matthew David Romig ,  Lance Cole Wright ,  Leslie Edward Stark ,  Frank Stepniak ,  Sreenivasan K. Koduri

IPC: H01L21/60 ,  H01L23/64 ,  H01L23/00 ,  H01L23/522 ,  H01L23/532

CPC classification number: H01L23/64 ,  H01L23/5223 ,  H01L23/5227 ,  H01L23/5228 ,  H01L23/5328 ,  H01L24/24 ,  H01L24/29 ,  H01L24/73 ,  H01L24/82 ,  H01L24/83 ,  H01L24/92 ,  H01L2224/24011 ,  H01L2224/2405 ,  H01L2224/24265 ,  H01L2224/245 ,  H01L2224/2919 ,  H01L2224/73217 ,  H01L2224/8121 ,  H01L2224/81815 ,  H01L2224/82102 ,  H01L2224/822 ,  H01L2224/8221 ,  H01L2224/82399 ,  H01L2224/8284 ,  H01L2224/83192 ,  H01L2224/8321 ,  H01L2224/83862 ,  H01L2224/92 ,  H01L2224/92144 ,  H01L2924/15747 ,  H01L2924/181 ,  H01L2924/19104 ,  H01L2924/01029 ,  H01L2924/01047 ,  H01L2924/00015 ,  H01L2924/00012 ,  H01L2924/0665 ,  H01L2224/27 ,  H01L2224/8312 ,  H01L2924/00

Abstract: A method of making an electronic device having a discrete device mounted on a surface of an electronic die with both the discrete device and the die connected by heat cured conductive ink and covered with cured encapsulant including placing the discrete device on the die; and keeping the temperature of each of the discrete device and the die below about 200° C. Also disclosed is a method of electrically attaching a discrete device to a substrate that includes placing the device on the substrate, applying conductive ink that connects at least one terminal on the device to at least one contact on the substrate and curing the conductive ink. Also disclosed is an IC package with a discrete electrical device having electrical terminals; an electrical substrate having contact pads on a surface thereof; and cured conductive ink connecting at least one of the electrical terminals with at least one of the contact pads.

公开(公告)号：US20170053854A1

公开(公告)日：2017-02-23

申请号：US15346822

申请日：2016-11-09

Applicant: TEXAS INSTRUMENTS INCORPORATED

Inventor： Benjamin Stassen Cook ,  Juan Alejandro Herbsommer ,  Yong Lin ,  Rongwei Zhang ,  Abram Castro ,  Matthew David Romig

IPC: H01L23/495 ,  H01L25/00 ,  H01L21/48 ,  H01L25/065

CPC classification number: H01L23/4952 ,  H01L21/2885 ,  H01L21/4821 ,  H01L21/4825 ,  H01L21/4867 ,  H01L23/49513 ,  H01L23/49541 ,  H01L23/49572 ,  H01L23/49582 ,  H01L23/49586 ,  H01L23/49822 ,  H01L23/49838 ,  H01L23/49883 ,  H01L24/05 ,  H01L24/32 ,  H01L24/48 ,  H01L24/49 ,  H01L24/73 ,  H01L24/83 ,  H01L24/85 ,  H01L24/92 ,  H01L25/0657 ,  H01L25/50 ,  H01L2224/04042 ,  H01L2224/0612 ,  H01L2224/16245 ,  H01L2224/2919 ,  H01L2224/32225 ,  H01L2224/32245 ,  H01L2224/48227 ,  H01L2224/48247 ,  H01L2224/48464 ,  H01L2224/73265 ,  H01L2224/75 ,  H01L2224/83192 ,  H01L2224/92247 ,  H01L2225/0651 ,  H01L2225/06555 ,  H01L2924/00014 ,  H01L2924/13055 ,  H01L2924/14 ,  H01L2924/1511 ,  H01L2924/1711 ,  H01L2924/181 ,  H01L2924/00 ,  H01L2924/00012 ,  H01L2224/45099 ,  H01L2224/45015 ,  H01L2924/207 ,  H01L2924/0665

Abstract: A method of lead frame surface modification includes providing at least one pre-fabricated metal lead frame or package substrate (substrate) unit including a base metal having a die pad and a plurality of contact regions surrounding the die pad. An ink including a material that is a solid or a precursor for a solid that forms a solid upon a curing step or a sintering step that removes a liquid carrier is additively deposited including onto at least one of (i) a region of the die pad and (ii) at one region of at least a first of the contact regions (first contact region). The ink is sintered or cured to remove the liquid carrier so that a substantially solid ink residue remains.

Abstract translation: 引线框架表面改性的方法包括提供至少一个预制金属引线框架或封装基板（基板）单元，其包括具有管芯焊盘和围绕管芯焊盘的多个接触区域的母材。 包括在固化步骤上形成固体的固体的材料或去除液体载体的烧结步骤的材料的油墨被加成沉积，其包括至少一个（i）芯片垫的区域 和（ii）在至少第一接触区域（第一接触区域）的一个区域。 油墨被烧结或固化以除去液体载体，使得残留基本上固体的油墨残余物。

公开(公告)号：US09496171B2

公开(公告)日：2016-11-15

申请号：US14848941

申请日：2015-09-09

Applicant: Texas Instruments Incorporated

Inventor： Benjamin Stassen Cook ,  Juan Alejandro Herbsommer ,  Matthew David Romig ,  Steven Alfred Kummerl ,  Wei-Yan Shih

IPC: H01L23/48 ,  H01L21/768 ,  H01L23/528 ,  H01L23/00

CPC classification number: H01L24/27 ,  H01L21/4867 ,  H01L21/76838 ,  H01L23/528 ,  H01L23/5389 ,  H01L23/552 ,  H01L23/66 ,  H01L24/24 ,  H01L24/29 ,  H01L24/32 ,  H01L24/82 ,  H01L2223/6627 ,  H01L2224/24998 ,  H01L2224/2732 ,  H01L2224/27848 ,  H01L2224/29026 ,  H01L2224/29076 ,  H01L2224/32227 ,  H01L2224/32245 ,  H01L2224/48091 ,  H01L2224/48247 ,  H01L2224/73265 ,  H01L2924/13055 ,  H01L2924/181 ,  H01L2924/3025 ,  H01L2924/00012 ,  H01L2924/00014 ,  H01L2924/00

Abstract: A method forming a packaged semiconductor device includes providing a first semiconductor die (first die) having bond pads thereon mounted face-up on a package substrate or on a die pad of a lead frame (substrate), wherein the substrate includes terminals or contact pads (substrate pads). A first dielectric layer is formed including printing a first dielectric precursor layer including a first ink having a first liquid carrier solvent extending from the substrate pads to the bond pads. A first interconnect precursor layer is printed including a second ink having a second liquid carrier over the first dielectric layer extending from the substrate pads to the bond pads. Sintering or curing the first interconnect precursor layer removes at least the second liquid carrier to form an electrically conductive interconnect including an ink residue which connects respective substrate pads to respective bond pads.

Abstract translation: 一种形成封装半导体器件的方法包括提供一种第一半导体管芯（第一管芯），其上具有接合焊盘，其面朝上安装在封装衬底上或引线框架（衬底）的管芯焊盘上，其中衬底包括端子或接触焊盘 （基板焊盘）。 形成第一电介质层，包括印刷第一电介质前体层，该第一电介质前体层包括具有从衬底焊盘延伸到接合焊盘的第一液体载体溶剂的第一油墨。 印刷第一互连前体层，其包括在从衬底焊盘延伸到接合焊盘的第一介电层上方具有第二液体载体的第二油墨。 烧结或固化第一互连前体层至少去除第二液体载体以形成包括将各个衬底焊盘连接到各个焊盘的墨残余物的导电互连。

公开(公告)号：US20150021721A1

公开(公告)日：2015-01-22

申请号：US13947235

申请日：2013-07-22

Applicant: Texas Instruments Incorporated

Inventor： Matthew David Romig ,  Marie-Solange Anne Milleron ,  Benjamin Michael Sutton

IPC: B81B7/00 ,  B81C1/00

CPC classification number: B81C1/00269 ,  B81C2203/0118 ,  B81C2203/0154 ,  H03H3/0076

Abstract: A method of forming a packaged electronic device includes fabricating a MEMS structure, such as a BAW structure, on a first semiconductor wafer substrate; forming a cavity in a second semiconductor wafer substrate; and mounting the second substrate on the first substrate such that the MEMS structure is positioned inside the cavity in the second substrate. A wafer level assembly and an integrated circuit package are also described.

Abstract translation: 形成封装的电子器件的方法包括在第一半导体晶片衬底上制造诸如BAW结构的MEMS结构; 在第二半导体晶片衬底中形成空腔; 以及将所述第二基板安装在所述第一基板上，使得所述MEMS结构位于所述第二基板中的所述腔内。 还描述了晶片级组件和集成电路封装。

公开(公告)号：US12243911B2

公开(公告)日：2025-03-04

申请号：US17017642

申请日：2020-09-10

Applicant: Texas Instruments Incorporated

Inventor： Matthew David Romig ,  Enis Tuncer ,  Rajen Manicon Murugan ,  Yiqi Tang

IPC: H01L29/06 ,  H01L21/48 ,  H01L21/56 ,  H01L23/31 ,  H01L23/498

Abstract: In described examples of an isolation device, an isolation die that has a set of bond pads is mounted on a first lead frame that has a set of leads. A portion of the bond pads are coupled to respective leads. A first mold material encapsulates the isolation device and the first lead frame forming a first package. The first package is mounted on a second lead frame that has a set of leads. A portion of the first lead frame leads is coupled to respective ones of the second lead frame leads. A second mold material encapsulates the first package and the second lead frame.

公开(公告)号：US20250022781A1

公开(公告)日：2025-01-16

申请号：US18901322

申请日：2024-09-30

Applicant: Texas Instruments Incorporated

Inventor： Matthew David Romig ,  Wei Zhang ,  Mohammad Waseem Hussain ,  Peter Anthony Fundaro

IPC: H01L23/495 ,  H01L21/50 ,  H01L25/065 ,  H01L25/16 ,  H02M3/158

Abstract: A multi-chip module (MCM) package includes a leadframe including half-etched lead terminals including a full-thickness and half-etched portion, and second lead terminals including a thermal pad(s). A first die is attached by a dielectric die attach material to the half-etched lead terminals. The first die includes first bond pads coupled to first circuitry configured for receiving a control signal and for outputting a coded signal and a transmitter. The second die includes second bond pads coupled to second circuitry configured for a receiver with a gate driver. The second die is attached by a conductive die attach material to the thermal pad. Bond wires include die-to-die bond wires between a portion of the first and second bond pads. A high-voltage isolation device is between the transmitter and receiver. A mold compound encapsulates the first and the second die.

公开(公告)号：US11061384B2

公开(公告)日：2021-07-13

申请号：US16692674

申请日：2019-11-22

Applicant: Texas Instruments Incorporated

Inventor： Matthew David Romig ,  Mayank Garg

IPC: G05B19/414

Abstract: Methods, systems, and apparatus to facilitate multi-channel isolation is disclosed. An example apparatus includes a multiplexer including a first input terminal, a second input terminal, and an output terminal; a modulator including an input terminal and an output terminal, the input terminal of the modulator coupled to the output terminal of the multiplexer; an isolation capacitor including a first terminal and a second terminal, the first terminal of the isolation capacitor coupled to the output terminal of the modulator; a first receiver die coupled to the second terminal of the isolation capacitor; and a second receiver die coupled to the second terminal of the isolation capacitor.

公开(公告)号：US09780017B2

公开(公告)日：2017-10-03

申请号：US15346822

申请日：2016-11-09

Applicant: TEXAS INSTRUMENTS INCORPORATED

Inventor： Benjamin Stassen Cook ,  Juan Alejandro Herbsommer ,  Yong Lin ,  Rongwei Zhang ,  Abram Castro ,  Matthew David Romig

IPC: H01L23/49 ,  H01L23/495 ,  H01L21/288 ,  H01L21/48 ,  H01L23/498 ,  H01L23/00 ,  H01L25/065 ,  H01L25/00

CPC classification number: H01L23/4952 ,  H01L21/2885 ,  H01L21/4821 ,  H01L21/4825 ,  H01L21/4867 ,  H01L23/49513 ,  H01L23/49541 ,  H01L23/49572 ,  H01L23/49582 ,  H01L23/49586 ,  H01L23/49822 ,  H01L23/49838 ,  H01L23/49883 ,  H01L24/05 ,  H01L24/32 ,  H01L24/48 ,  H01L24/49 ,  H01L24/73 ,  H01L24/83 ,  H01L24/85 ,  H01L24/92 ,  H01L25/0657 ,  H01L25/50 ,  H01L2224/04042 ,  H01L2224/0612 ,  H01L2224/16245 ,  H01L2224/2919 ,  H01L2224/32225 ,  H01L2224/32245 ,  H01L2224/48227 ,  H01L2224/48247 ,  H01L2224/48464 ,  H01L2224/73265 ,  H01L2224/75 ,  H01L2224/83192 ,  H01L2224/92247 ,  H01L2225/0651 ,  H01L2225/06555 ,  H01L2924/00014 ,  H01L2924/13055 ,  H01L2924/14 ,  H01L2924/1511 ,  H01L2924/1711 ,  H01L2924/181 ,  H01L2924/00 ,  H01L2924/00012 ,  H01L2224/45099 ,  H01L2224/45015 ,  H01L2924/207 ,  H01L2924/0665

Abstract: A method of lead frame surface modification includes providing at least one pre-fabricated metal lead frame or package substrate (substrate) unit including a base metal having a die pad and a plurality of contact regions surrounding the die pad. An ink including a material that is a solid or a precursor for a solid that forms a solid upon a curing step or a sintering step that removes a liquid carrier is additively deposited including onto at least one of (i) a region of the die pad and (ii) at one region of at least a first of the contact regions (first contact region). The ink is sintered or cured to remove the liquid carrier so that a substantially solid ink residue remains.

公开(公告)号：US20170117238A1

公开(公告)日：2017-04-27

申请号：US14923123

申请日：2015-10-26

Applicant: Texas Instruments Incorporated

Inventor： Matthew David Romig ,  Christopher Daniel Manack

IPC: H01L23/58 ,  H01L21/50

CPC classification number: H01L23/58 ,  H01L21/50 ,  H01L24/06 ,  H01L24/20 ,  H01L24/37 ,  H01L24/40 ,  H01L24/84 ,  H01L25/18 ,  H01L2224/04105 ,  H01L2224/06181 ,  H01L2224/12105 ,  H01L2224/32245 ,  H01L2224/37147 ,  H01L2224/40 ,  H01L2224/40095 ,  H01L2224/40137 ,  H01L2224/40139 ,  H01L2224/40225 ,  H01L2224/40235 ,  H01L2224/84801 ,  H01L2924/1306 ,  H01L2924/14 ,  H01L2924/00014

Abstract: An integrated power package includes a substrate having a first surface and an integrated circuit located within the substrate. At least one electrical conductor is located between the first surface and another point on the substrate. At least one transistor is electrically and mechanically coupled to the at least one first conductor. A support structure is electrically and mechanically coupled to the at least one transistor, wherein the at least one transistor is located between the first surface of the substrate and the support structure.

公开(公告)号：US09527728B2

公开(公告)日：2016-12-27

申请号：US13947235

申请日：2013-07-22

Applicant: Texas Instruments Incorporated

Inventor： Matthew David Romig ,  Marie-Solange Anne Milleron ,  Benjamin Michael Sutton

IPC: H01L29/49 ,  B81C1/00 ,  H03H3/007

CPC classification number: B81C1/00269 ,  B81C2203/0118 ,  B81C2203/0154 ,  H03H3/0076

Abstract: A method of forming a packaged electronic device includes fabricating a MEMS structure, such as a BAW structure, on a first semiconductor wafer substrate; forming a cavity in a second semiconductor wafer substrate; and mounting the second substrate on the first substrate such that the MEMS structure is positioned inside the cavity in the second substrate. A wafer level assembly and an integrated circuit package are also described.

Abstract translation: 形成封装的电子器件的方法包括在第一半导体晶片衬底上制造诸如BAW结构的MEMS结构; 在第二半导体晶片衬底中形成空腔; 以及将所述第二基板安装在所述第一基板上，使得所述MEMS结构位于所述第二基板中的所述腔内。 还描述了晶片级组件和集成电路封装。