公开(公告)号：US11869820B2

公开(公告)日：2024-01-09

申请号：US17810568

申请日：2022-07-01

Applicant: Texas Instruments Incorporated

Inventor： Amit Sureshkumar Nangia ,  Sreenivasan Kalyani Koduri ,  Siva Prakash Gurrum ,  Christopher Daniel Manack

IPC: H01L23/00 ,  H01L23/16

CPC classification number: H01L23/16 ,  H01L24/97 ,  H01L2224/73265 ,  H01L2924/14

Abstract: An integrated circuit (IC) includes a substrate including circuitry configured for a function, the circuitry including at least one stress sensitive circuit portion, with at least a portion of nodes in the circuitry electrically coupled to bond pads provided by a top metal layer. A metal wall that is ring-shaped is positioned above the top metal layer that is not electrically coupled to the circuitry. The stress sensitive circuit portion is with at least a majority of its area within an inner area of the substrate that is framed by the metal wall to provide a cavity.

公开(公告)号：US20230352373A1

公开(公告)日：2023-11-02

申请号：US18297751

申请日：2023-04-10

Applicant: Texas Instruments Incorporated

Inventor： Christopher Daniel Manack ,  Sreenivasan Kalyani Koduri

IPC: H01L23/495 ,  H01L21/56 ,  H01L21/48 ,  H01L23/31

CPC classification number: H01L23/4952 ,  H01L21/565 ,  H01L23/49575 ,  H01L23/49513 ,  H01L21/4825 ,  H01L23/3114 ,  H01L23/49527

Abstract: In a described example, an apparatus includes: a package substrate having a die mount portion and lead portions; at least one semiconductor device die over the die mount portion of the package substrate, the semiconductor device die having bond pads on an active surface facing away from the package substrate; electrical connections between at least one of the bond pads and one of the lead portions; a post interconnect over at least one of the bond pads, the post interconnect extending away from the active surface of the semiconductor device die; and a dielectric material covering a portion of the package substrate, the semiconductor device die, a portion of the post interconnect, and the electrical connections, forming a packaged semiconductor device, wherein the post interconnect extends through the dielectric material and had an end facing away from the semiconductor device die that is exposed from the dielectric material.

公开(公告)号：US11791296B2

公开(公告)日：2023-10-17

申请号：US17544888

申请日：2021-12-07

Applicant: TEXAS INSTRUMENTS INCORPORATED

Inventor： Scott Robert Summerfelt ,  Benjamin Stassen Cook ,  Ralf Jakobskrueger Muenster ,  Sreenivasan Kalyani Koduri

IPC: H01L23/00

CPC classification number: H01L24/13 ,  H01L24/27 ,  H01L24/29 ,  H01L24/32 ,  H01L24/83 ,  H01L2224/13005 ,  H01L2224/13023 ,  H01L2224/13026 ,  H01L2224/13078 ,  H01L2224/279 ,  H01L2224/29078 ,  H01L2224/3207 ,  H01L2224/83895 ,  H01L2224/83896

Abstract: In some examples, an electronic device comprises a first component having a surface, a second component having a surface, and a bond layer positioned between the surfaces of the first and second components to couple the first and second components to each other. The bond layer includes a set of metallic nanowires and a dielectric portion. The dielectric portion comprises a polymer matrix and dielectric nanoparticles.

公开(公告)号：US20230163050A1

公开(公告)日：2023-05-25

申请号：US18152733

申请日：2023-01-10

Applicant: Texas Instruments Incorporated

Inventor： Sreenivasan Kalyani Koduri

IPC: H01L23/495 ,  H01L23/31 ,  H01L21/56 ,  H05K1/18 ,  H01L23/552 ,  H05K3/34

CPC classification number: H01L23/49558 ,  H01L23/3135 ,  H01L23/49555 ,  H01L21/56 ,  H05K1/181 ,  H01L23/552 ,  H05K3/3426 ,  H05K2201/10931 ,  H01L23/49586 ,  H01L21/4842

Abstract: In examples, a semiconductor device comprises a semiconductor die, an opaque mold compound housing covering the semiconductor die, a conductive terminal extending from the mold compound housing, and an insulative coat covering the mold compound housing and at least a portion of the conductive terminal.

公开(公告)号：US11387155B2

公开(公告)日：2022-07-12

申请号：US16859530

申请日：2020-04-27

Applicant: Texas Instruments Incorporated

Inventor： Amit Sureshkumar Nangia ,  Sreenivasan Kalyani Koduri ,  Siva Prakash Gurrum ,  Christopher Daniel Manack

IPC: H01L23/16 ,  H01L23/00

Abstract: An integrated circuit (IC) includes a substrate including circuitry configured for a function, the circuitry including at least one stress sensitive circuit portion, with at least a portion of nodes in the circuitry electrically coupled to bond pads provided by a top metal layer. A metal wall that is ring-shaped is positioned above the top metal layer that is not electrically coupled to the circuitry. The stress sensitive circuit portion is with at least a majority of its area within an inner area of the substrate that is framed by the metal wall to provide a cavity.

公开(公告)号：US11894339B2

公开(公告)日：2024-02-06

申请号：US17121198

申请日：2020-12-14

Applicant: TEXAS INSTRUMENTS INCORPORATED

Inventor： Sreenivasan Kalyani Koduri ,  Leslie Edward Stark

IPC: H01L25/04 ,  H01L25/075 ,  G01S17/08 ,  H01L33/62

CPC classification number: H01L25/042 ,  G01S17/08 ,  H01L25/0753 ,  H01L33/62

Abstract: A method of manufacturing a sensor device includes obtaining a semiconductor die structure comprising a transmitter and a receiver. Then, a first sacrificial stud is affixed to the transmitter and a second sacrificial stud is affixed to the receiver. The semiconductor die is affixed to a lead frame, and pads on the semiconductor die structure are wirebonded to the lead frame. The lead frame, the semiconductor die structure, and the wirebonds are encapsulated in a molding compound, while the tops of the first and second sacrificial studs are left exposed. The first and second sacrificial studs prevent the molding compound from encapsulating the transmitter and the receiver, and are removed to expose the transmitter in a first cavity and the receiver in a second cavity. In some examples, the semiconductor die structure includes a first semiconductor die comprising the transmitter and a second semiconductor die comprising the receiver.

公开(公告)号：US11869864B2

公开(公告)日：2024-01-09

申请号：US17679087

申请日：2022-02-24

Applicant: Texas Instruments Incorporated

Inventor： Benjamin Stassen Cook ,  Ralf Muenster ,  Sreenivasan Kalyani Koduri

IPC: H01L23/00 ,  H01L23/367 ,  H01L23/15 ,  H01L23/495 ,  H01L23/373

CPC classification number: H01L24/29 ,  H01L23/15 ,  H01L23/3677 ,  H01L23/3735 ,  H01L23/4951 ,  H01L23/49541 ,  H01L24/27 ,  H01L24/32 ,  H01L24/48 ,  H01L24/73 ,  H01L2224/2746 ,  H01L2224/29082 ,  H01L2224/29344 ,  H01L2224/29366 ,  H01L2224/29499 ,  H01L2224/32225 ,  H01L2224/32245 ,  H01L2224/48091 ,  H01L2224/48106 ,  H01L2224/48247 ,  H01L2224/73265 ,  H01L2924/2064

Abstract: In some examples, a system comprises a set of nanoparticles and a set of nanowires extending from the set of nanoparticles.

公开(公告)号：US11728242B2

公开(公告)日：2023-08-15

申请号：US16843618

申请日：2020-04-08

Applicant: TEXAS INSTRUMENTS INCORPORATED

Inventor： Benjamin Stassen Cook ,  Ralf Jakobskrueger Muenster ,  Sreenivasan Kalyani Koduri

IPC: H01L23/48 ,  H01L21/768 ,  H01L23/495 ,  H01L23/00 ,  H01L21/288

CPC classification number: H01L23/481 ,  H01L21/76898 ,  H01L23/49575 ,  H01L24/32 ,  H01L24/33 ,  H01L24/73 ,  H01L21/2885 ,  H01L2224/32146 ,  H01L2224/73265

Abstract: In some examples, a semiconductor package comprises a semiconductor die having a first surface and a second surface opposing the first surface. The package comprises an orifice extending through a thickness of the semiconductor die from the first surface to the second surface. The package comprises a set of metallic nanowires positioned within the orifice and extending through the thickness of the semiconductor die from the first surface to the second surface.

公开(公告)号：US11476175B2

公开(公告)日：2022-10-18

申请号：US17125487

申请日：2020-12-17

Applicant: TEXAS INSTRUMENTS INCORPORATED

Inventor： Sreenivasan Kalyani Koduri ,  Leslie Edward Stark

IPC: H01L21/56 ,  H01L23/31 ,  H01L23/29

Abstract: In examples, a sensor package includes a semiconductor die, a sensor on the semiconductor die, and a mold compound covering the semiconductor die. The mold compound includes a sensor cavity over the sensor. The sensor package includes a polymer film member on the sensor and circumscribed by a wall of the mold compound forming the sensor cavity. The polymer film member is exposed to an exterior environment of the sensor package.

公开(公告)号：US20220208655A1

公开(公告)日：2022-06-30

申请号：US17135700

申请日：2020-12-28

Applicant: Texas Instruments Incorporated

Inventor： Christopher Daniel Manack ,  Sreenivasan Kalyani Koduri

IPC: H01L23/495 ,  H01L23/31 ,  H01L21/48 ,  H01L21/56

Abstract: In a described example, an apparatus includes: a package substrate having a die mount portion and lead portions; at least one semiconductor device die over the die mount portion of the package substrate, the semiconductor device die having bond pads on an active surface facing away from the package substrate; electrical connections between at least one of the bond pads and one of the lead portions; a post interconnect over at least one of the bond pads, the post interconnect extending away from the active surface of the semiconductor device die; and a dielectric material covering a portion of the package substrate, the semiconductor device die, a portion of the post interconnect, and the electrical connections, forming a packaged semiconductor device, wherein the post interconnect extends through the dielectric material and had an end facing away from the semiconductor device die that is exposed from the dielectric material.