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11.发明申请公开(公告)号：US20200319545A1
公开(公告)日：2020-10-08
申请号：US16908449
申请日：2020-06-22
Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.
Inventor： Yen-Cheng Lu , Shinn-Sheng Yu , Jeng-Horng Chen , Anthony Yen
Abstract: A lithography system includes a radiation source configured to generate an extreme ultraviolet (EUV) light. The lithography system includes a mask that defines one or more features of an integrated circuit (IC). The lithography system includes an illuminator configured to direct the EUV light onto the mask. The mask diffracts the EUV light into a 0-th order ray and a plurality of higher order rays. The lithography system includes a wafer stage configured to secure a wafer that is to be patterned according to the one or more features defined by the mask. The lithography system includes a pupil phase modulator positioned in a pupil plane that is located between the mask and the wafer stage. The pupil phase modulator is configured to change a phase of the 0-th order ray.
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公开(公告)号：US10514597B2
公开(公告)日：2019-12-24
申请号：US15670183
申请日：2017-08-07
Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.
Inventor： Yun-Yue Lin , Hsin-Chang Lee , Chia-Jen Chen , Chih-Cheng Lin , Anthony Yen , Chin-Hsiang Lin
Abstract: A lithography mask includes a substrate that contains a low thermal expansion material (LTEM). A reflective structure is disposed over a first side of the substrate. An absorber layer is disposed over the reflective structure. The absorber layer contains one or more first overlay marks. A conductive layer is disposed over a second side of the substrate, the second side being opposite the first side. The conductive layer contains portions of one or more second overlay marks. In some embodiments, the lithography mask includes an EUV lithography mask.
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公开(公告)号：US20190033720A1
公开(公告)日：2019-01-31
申请号：US15861156
申请日：2018-01-03
Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.
Inventor： Shinn-Sheng Yu , Ching-Fang Yu , Wen-Chuan Wang , Ting-Hao Hsu , Sheng-Chi Chin , Anthony Yen
Abstract: An extreme ultraviolet lithography method is disclosed. In an example, the EUVL method includes forming a resist layer on a substrate; performing a first exposure process to image a first pattern of a first sub-region of a first mask to the resist layer; performing a second exposure process to image a second pattern of a second sub-region of the first mask to the resist layer; and performing a third exposure process to image a third pattern of a first sub-region of a second mask to the resist layer. The second and third patterns are identical to the first pattern. The first, second and third exposure processes collectively form a latent image of the first pattern on the resist layer.
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公开(公告)号：US09442368B2
公开(公告)日：2016-09-13
申请号：US14980469
申请日：2015-12-28
Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.
Inventor： Chih-Tsung Shih , Tien-Hsi Lee , Chia-Jen Chen , Shang-Chieh Chien , Shinn-Sheng Yu , Jeng-Horng Chen , Anthony Yen
CPC classification number: G03F1/64 , B29C71/02 , B29C2071/022 , G03F1/62 , G03F7/2002
Abstract: The present disclosure relates to a method of forming an extreme ultraviolet (EUV) pellicle having an pellicle film connected to a pellicle frame without a supportive mesh, and an associated apparatus. In some embodiments, the method is performed by forming a cleaving plane within a substrate. A pellicle frame is attached to an upper surface of the substrate, and the substrate is cleaved along the cleaving plane to form a pellicle film attached to the pellicle frame. The method forms the pellicle without using a support structure, which may block EUV radiation and cause substantial non-uniformities in the intensity of EUV radiation incident on an EUV reticle.
Abstract translation: 本发明涉及一种形成极紫外（EUV）防护薄膜组件的方法，所述防护薄膜组件具有连接到没有支撑网的防护薄膜框架上的防护薄膜组件及相关装置。 在一些实施例中，通过在衬底内形成切割平面来执行该方法。 防护薄膜组件框架附接到基板的上表面，并且基板沿着切割平面被切割以形成附着到防护薄膜框架上的防护薄膜组件。 该方法不使用支撑结构形成防护薄膜组件，其可以阻挡EUV辐射并且在EUV掩模版上入射的EUV辐射的强度引起实质上的不均匀性。
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15.发明授权公开(公告)号：US08988652B2
公开(公告)日：2015-03-24
申请号：US13654750
申请日：2012-10-18
Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.
Inventor： Shu-Hao Chang , Tsiao-Chen Wu , Chia-Hao Hsu , Chia-Chen Chen , Ying-Yu Chen , Tzu-Li Lee , Shang-Chieh Chien , Jeng-Horng Chen , Anthony Yen
IPC: G03F7/20
CPC classification number: G03F7/2002 , G03F7/20 , G03F7/70916 , G03F7/70933
Abstract: A method and apparatus for ultraviolet (UV) and extreme ultraviolet (EUV) lithography patterning is provided. A UV or EUV light beam is generated and directed to the surface of a substrate disposed on a stage and coated with photoresist. A laminar flow of a layer of inert gas is directed across and in close proximity to the substrate surface coated with photoresist during the exposure, i.e. lithography operation. The inert gas is exhausted quickly and includes a short resonance time at the exposure location. The inert gas flow prevents flue gasses and other contaminants produced by outgassing of the photoresist, to precipitate on and contaminate other features of the lithography apparatus.
Abstract translation: 提供了紫外线（UV）和极紫外（EUV）光刻图案的方法和装置。 产生UV或EUV光束并将其引导到设置在载物台上并涂覆有光致抗蚀剂的基板的表面。 惰性气体层的层流被引导穿过并且紧邻在曝光期间涂覆有光致抗蚀剂的基底表面，即光刻操作。 惰性气体迅速耗尽并且在曝光位置包括短的共振时间。 惰性气体流动防止烟气和其它由光致抗蚀剂脱气产生的污染物沉淀并污染光刻设备的其它特征。
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Patent Agency Ranking
16.发明申请Extreme Ultraviolet (EUV) Mask, Method Of Fabricating The EUV Mask And Method Of Inspecting The EUV Mask 有权极紫外线（EUV）面膜，制造EUV面膜的方法和检查EUV面膜的方法公开(公告)号：US20150037712A1
公开(公告)日：2015-02-05
申请号：US13955164
申请日：2013-07-31
Applicant: Taiwan Semiconductor Manufacturing Co., LTD.
Inventor： Chih-Tsung Shih , Yen-Cheng Lu , Shinn-Sheng Yu , Jeng-Horng Chen , Anthony Yen
Abstract: An out-of-band (OoB) suppression layer is applied on a reflective multiplayer (ML) coating, so as to avoid the OoB reflection and to enhance the optical contrast at 13.5 nm A material having a low reflectivity at wavelength of 193-257 nm, for example, silicon carbide (SiC), is used as the OoB suppression layer. A method of fabricating an EUV mask having the OoB suppression layer and a method of inspecting an EUV mask having the OoB suppression are also provided.
Abstract translation: 将带外（OoB）抑制层施加在反射多人（ML）涂层上，以避免OoB反射并增强13.5nm处的光学对比度。在波长193-257处具有低反射率的材料 使用例如碳化硅（SiC）作为OoB抑制层。 还提供了制造具有OoB抑制层的EUV掩模的方法和检查具有OoB抑制的EUV掩模的方法。
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公开(公告)号：US11137684B2
公开(公告)日：2021-10-05
申请号：US16719118
申请日：2019-12-18
Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.
Inventor： Yun-Yue Lin , Hsin-Chang Lee , Chia-Jen Chen , Chih-Cheng Lin , Anthony Yen , Chin-Hsiang Lin
Abstract: A method of performing a lithography process includes receiving a lithography mask and performing overlay measurement. The lithography mask includes a substrate that contains a low thermal expansion material (LTEM); a reflective structure over a first side of the substrate; an absorber layer over the reflective structure and containing one or more first overlay marks; and a conductive layer over a second side of the substrate and containing one or more second overlay marks. The second side is opposite the first side. The overlay measurement includes using the one or more first overlay marks in an extreme ultraviolet (EUV) lithography process or using the one or more second overlay marks in a non-EUV lithography process.
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18.发明授权公开(公告)号：US10976655B2
公开(公告)日：2021-04-13
申请号：US16908449
申请日：2020-06-22
Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.
Inventor： Yen-Cheng Lu , Shinn-Sheng Yu , Jeng-Horng Chen , Anthony Yen
Abstract: A lithography system includes a radiation source configured to generate an extreme ultraviolet (EUV) light. The lithography system includes a mask that defines one or more features of an integrated circuit (IC). The lithography system includes an illuminator configured to direct the EUV light onto the mask. The mask diffracts the EUV light into a 0-th order ray and a plurality of higher order rays. The lithography system includes a wafer stage configured to secure a wafer that is to be patterned according to the one or more features defined by the mask. The lithography system includes a pupil phase modulator positioned in a pupil plane that is located between the mask and the wafer stage. The pupil phase modulator is configured to change a phase of the 0-th order ray.
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公开(公告)号：US10718718B2
公开(公告)日：2020-07-21
申请号：US16587010
申请日：2019-09-29
Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.
Inventor： Chun-Lin Louis Chang , Shang-Chieh Chien , Shang-Ying Wu , Li-Kai Cheng , Tzung-Chi Fu , Bo-Tsun Liu , Li-Jui Chen , Po-Chung Cheng , Anthony Yen , Chia-Chen Chen
IPC: G01N21/94 , G03F7/00 , G01N21/88 , G03F7/20 , H01L21/027 , G01N21/956 , G01N21/954
Abstract: A single-shot metrology for direct inspection of an entirety of the interior of an EUV vessel is provided. An EUV vessel including an inspection tool integrated with the EUV vessel is provided. During an inspection process, the inspection tool is moved into a primary focus region of the EUV vessel. While the inspection tool is disposed at the primary focus region and while providing a substantially uniform and constant light level to an interior of the EUV vessel by way of an illuminator, a panoramic image of an interior of the EUV vessel is captured by way of a single-shot of the inspection tool. Thereafter, a level of tin contamination on a plurality of components of the EUV vessel is quantified based on the panoramic image of the interior of the EUV vessel. The quantified level of contamination is compared to a KPI, and an OCAP may be implemented.
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20.发明授权公开(公告)号：US10691014B2
公开(公告)日：2020-06-23
申请号：US16220324
申请日：2018-12-14
Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.
Inventor： Yen-Cheng Lu , Shinn-Sheng Yu , Jeng-Horng Chen , Anthony Yen
Abstract: A lithography system includes a radiation source configured to generate an extreme ultraviolet (EUV) light. The lithography system includes a mask that defines one or more features of an integrated circuit (IC). The lithography system includes an illuminator configured to direct the EUV light onto the mask. The mask diffracts the EUV light into a 0-th order ray and a plurality of higher order rays. The lithography system includes a wafer stage configured to secure a wafer that is to be patterned according to the one or more features defined by the mask. The lithography system includes a pupil phase modulator positioned in a pupil plane that is located between the mask and the wafer stage. The pupil phase modulator is configured to change a phase of the 0-th order ray.
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