公开(公告)号：US20120313152A1

公开(公告)日：2012-12-13

申请号：US13488791

申请日：2012-06-05

申请人： Tomokazu YOKOI ,  Yasumasa YAMANE

发明人： Tomokazu YOKOI ,  Yasumasa YAMANE

IPC分类号： H01L29/78 ,  H01L21/20

CPC分类号： H01L29/78609 ,  H01L21/02554 ,  H01L21/02565 ,  H01L21/02664 ,  H01L21/20 ,  H01L27/1225 ,  H01L29/66742 ,  H01L29/66969 ,  H01L29/78618 ,  H01L29/7869 ,  H01L29/78693

摘要： A transistor which includes an oxide semiconductor and is capable of high-speed operation and a method of manufacturing the transistor. In addition, a highly reliable semiconductor device including the transistor and a method of manufacturing the semiconductor device. The semiconductor device includes an oxide semiconductor layer including a channel formation region, and a source and drain regions which are provided so that the channel formation region is interposed therebetween and have lower resistance than the channel formation region. The channel formation region and the source and drain regions each include a crystalline region.

摘要翻译： 包括氧化物半导体并且能够进行高速操作的晶体管以及晶体管的制造方法。 此外，包括晶体管的高可靠性半导体器件和制造半导体器件的方法。 半导体器件包括具有沟道形成区域的氧化物半导体层以及被设置为使得沟道形成区域介于其间并具有比沟道形成区域更低的电阻的源极和漏极区域。 沟道形成区域和源极区域和漏极区域各自包括结晶区域。

公开(公告)号：US20110193087A1

公开(公告)日：2011-08-11

申请号：US13023601

申请日：2011-02-09

申请人： Shunpei YAMAZAKI ,  Satoshi TORIUMI ,  Tomokazu YOKOI ,  Makoto FURUNO

发明人： Shunpei YAMAZAKI ,  Satoshi TORIUMI ,  Tomokazu YOKOI ,  Makoto FURUNO

IPC分类号： H01L31/105

CPC分类号： H01L31/03685 ,  H01L31/03762 ,  H01L31/1816 ,  Y02E10/545 ,  Y02E10/548

摘要： To provide a photoelectric conversion device with improved photoelectric conversion characteristics and cost competitiveness. A photoelectric conversion device including a semiconductor junction has a semiconductor layer in which a needle-like crystal is made to grow over an impurity semiconductor layer. The impurity semiconductor layer is formed of a microcrystalline semiconductor and includes an impurity imparting one conductivity type. An amorphous semiconductor layer is deposited on a microcrystalline semiconductor layer by setting the flow rate of a dilution gas (typically silane) to 1 time to 6 times the flow rate of a semiconductor source gas (typically hydrogen) at the time of deposition. Thus, a crystal with a three-dimensional shape tapered in a direction of the deposition of a film, i.e., in a direction from the microcrystalline semiconductor layer to the amorphous semiconductor layer is made to grow.

摘要翻译： 提供具有改善的光电转换特性和成本竞争力的光电转换装置。 包括半导体结的光电转换装置具有使针状晶体在杂质半导体层上生长的半导体层。 杂质半导体层由微晶半导体形成，并且包括赋予一种导电类型的杂质。 通过将稀释气体（通常为硅烷）的流量设定为沉积时的半导体源气体（通常为氢）的流量的1倍至6倍，将非晶半导体层沉积在微晶半导体层上。 因此，使得在膜的沉积方向即从微晶半导体层到非晶半导体层的方向上渐缩的三维形状的晶体生长。

公开(公告)号：US20110097877A1

公开(公告)日：2011-04-28

申请号：US12908228

申请日：2010-10-20

申请人： Mitsuhiro ICHIJO ,  Kazutaka KURIKI ,  Tomokazu YOKOI ,  Toshiya ENDO

发明人： Mitsuhiro ICHIJO ,  Kazutaka KURIKI ,  Tomokazu YOKOI ,  Toshiya ENDO

IPC分类号： H01L21/205 ,  C23C16/513

CPC分类号： H01L21/02532 ,  C23C16/45565 ,  C23C16/505 ,  H01L21/02595 ,  H01L21/0262 ,  H01L27/1214 ,  H01L27/127 ,  H01L29/04 ,  H01L29/66765 ,  H01L29/78696

摘要： A technique for manufacturing a microcrystalline semiconductor layer with high mass productivity is provided. In a reaction chamber of a plasma CVD apparatus, an upper electrode and a lower electrode are provided in almost parallel to each other. A hollow portion is formed in the upper electrode, and the upper electrode includes a shower plate having a plurality of holes formed on a surface of the upper electrode which faces the lower electrode. A substrate is provided over the lower electrode. A gas containing a deposition gas and hydrogen is supplied to the reaction chamber from the shower plate through the hollow portion of the upper electrode, and a rare gas is supplied to the reaction chamber from a portion different from the upper electrode. Accordingly, high-frequency power is supplied to the upper electrode to generate plasma, so that a microcrystalline semiconductor layer is formed over the substrate.

摘要翻译： 提供了一种以高质量生产率制造微晶半导体层的技术。 在等离子体CVD装置的反应室中，上部电极和下部电极彼此平行地设置。 在上部电极中形成中空部，上部电极具有形成在上部电极的与下部电极相对的面上形成的多个孔的喷淋板。 衬底设置在下电极上。 含有沉积气体和氢气的气体从淋浴板通过上部电极的中空部分供应到反应室，并且稀有气体从不同于上部电极的部分供应到反应室。 因此，向上部电极提供高频电力以产生等离子体，从而在基板上形成微晶半导体层。

公开(公告)号：US20100124804A1

公开(公告)日：2010-05-20

申请号：US12617406

申请日：2009-11-12

申请人： Erika TAKAHASHI ,  Takayuki KATO ,  Hidekazu MIYAIRI ,  Yasuhiro JINBO ,  Mitsuhiro ICHIJO ,  Tomokazu YOKOI

发明人： Erika TAKAHASHI ,  Takayuki KATO ,  Hidekazu MIYAIRI ,  Yasuhiro JINBO ,  Mitsuhiro ICHIJO ,  Tomokazu YOKOI

IPC分类号： H01L21/336

CPC分类号： H01L27/1288 ,  C23C16/0272 ,  C23C16/24 ,  C23C16/50 ,  H01L27/1214 ,  H01L29/66765 ,  H01L29/78669 ,  H01L29/78678

摘要： An object is to provide a method for manufacturing a thin film transistor having favorable electric characteristics, with high productivity. A gate electrode is formed over a substrate and a gate insulating layer is formed over the gate electrode. A first semiconductor layer is formed over the gate insulating layer by generating plasma using a deposition gas containing silicon or germanium, hydrogen, and a rare gas. Next, a second semiconductor layer including an amorphous semiconductor and a microcrystal semiconductor is formed in such a manner that the first semiconductor layer is partially grown as a seed crystal by generating plasma using a deposition gas containing silicon or germanium, hydrogen, and a gas containing nitrogen. Then, a semiconductor layer to which an impurity imparting one conductivity is added is formed and a conductive film is formed. Thus, a thin film transistor is manufactured.

摘要翻译： 本发明的目的在于提供一种制造具有良好的电特性，高生产率的薄膜晶体管的方法。 在基板上形成栅电极，在栅电极上形成栅极绝缘层。 通过使用包含硅或锗，氢气和稀有气体的沉积气体产生等离子体，在栅绝缘层上形成第一半导体层。 接下来，以这样的方式形成包括非晶半导体和微晶半导体的第二半导体层，使得通过使用包含硅或锗的沉积气体，氢气和含有气体的气体产生等离子体，将第一半导体层部分地生长为晶种 氮。 然后，形成添加有赋予一种导电性的杂质的半导体层，形成导电膜。 因此，制造薄膜晶体管。

公开(公告)号：US20090267067A1

公开(公告)日：2009-10-29

申请号：US12426983

申请日：2009-04-21

申请人： Yasuhiro JINBO ,  Tomokazu YOKOI

发明人： Yasuhiro JINBO ,  Tomokazu YOKOI

IPC分类号： H01L29/786

CPC分类号： H01L29/78696 ,  H01J37/32018 ,  H01J37/32091 ,  H01L29/78669 ,  H01L29/78678

摘要： A thin film transistor has a gate electrode; a gate insulating layer provided so as to cover the gate electrode layer; a pair of impurity semiconductor layers forming source and drain regions which is provided so that at least part of each of them overlaps the gate electrode layer and which are provided with a space therebetween; a microcrystalline semiconductor layer provided over the gate insulating layer in part of a channel length; a semiconductor layer provided over the gate insulating layer so as to cover at least the microcrystalline semiconductor layer; and an amorphous semiconductor layer provided between the semiconductor layer and the pair of impurity semiconductor layers. An impurity element which reduces the coordination number of silicon and generates dangling bonds is made to exist in the semiconductor layer.

摘要翻译： 薄膜晶体管具有栅电极; 设置为覆盖所述栅极电极层的栅极绝缘层; 形成源区和漏区的一对杂质半导体层，其被设置为使得它们的至少一部分与栅电极层重叠并且在它们之间设置有空间; 在沟道长度的一部分上设置在所述栅绝缘层上的微晶半导体层; 半导体层，设置在所述栅极绝缘层上以至少覆盖所述微晶半导体层; 以及设置在所述半导体层和所述一对杂质半导体层之间的非晶半导体层。 在半导体层中存在减少硅的配位数并产生悬挂键的杂质元素。

公开(公告)号：US20090029514A1

公开(公告)日：2009-01-29

申请号：US12178356

申请日：2008-07-23

申请人： Tomokazu YOKOI ,  Atsuo ISOBE ,  Motomu KURATA ,  Takeshi SHICHI ,  Daisuke OHGARANE ,  Takashi SHINGU

发明人： Tomokazu YOKOI ,  Atsuo ISOBE ,  Motomu KURATA ,  Takeshi SHICHI ,  Daisuke OHGARANE ,  Takashi SHINGU

IPC分类号： H01L21/336

CPC分类号： H01L29/66765

摘要： A method for manufacturing a semiconductor device, by which a bottom gate thin film transistor that has an improved S value and a channel forming region with a smaller thickness than that of a source region and a drain region can be manufactured in a simple process. An island-like conductive film is formed over a surface of an insulating substrate in a portion corresponding to a channel forming region, and is covered with an insulating film to form a projection portion. After an amorphous semiconductor film is deposited to cover the projection portion, the amorphous semiconductor film is irradiated with laser light so as to be melted and crystallized. Part of the melted semiconductor over the projection portion flows into regions adjacent to both sides of the projection portion, which results in reduction in thickness of the semiconductor film over the projection portion (channel forming region).

摘要翻译： 一种制造半导体器件的方法，通过该方法可以以简单的方法制造具有改善的S值的底栅极薄膜晶体管和具有比源极区和漏极区更小的厚度的沟道形成区。 在对应于沟道形成区域的部分的绝缘基板的表面上形成岛状导电膜，并且被绝缘膜覆盖以形成突出部。 在沉积非晶半导体膜以覆盖突出部分之后，用激光照射非晶半导体膜以使其熔化并结晶。 突出部分上的熔融半导体的一部分流入与突出部分的两侧相邻的区域，这导致半导体膜在突出部分（沟道形成区域）上的厚度减小。