中科微点-全球专利检索

  1. Login
  2. Sign Up

Search Results

48 records (took 0.018 seconds)

    Method for generating masks for manufacturing of a semiconductor structure
    11.
    发明授权
    Method for generating masks for manufacturing of a semiconductor structure 有权

    公开(公告)号：US10444622B2

    公开(公告)日：2019-10-15

    申请号：US15892935

    申请日：2018-02-09

    Applicant: UNITED MICROELECTRONICS CORP.

    Inventor： Tsung-Yeh Wu ,  Chia-Wei Huang ,  Yung-Feng Cheng

    IPC: G06F17/50 ,  G03F1/70 ,  G03F7/20 ,  G03F1/36

    Abstract: A method for generating masks for manufacturing of a semiconductor structure includes the following steps. First, a design pattern is provided to a processor. The design pattern includes at least one first pattern and at least two second patterns shorter than the first pattern, wherein two of the second patterns are arranged in a line along an extending direction of the patterns. Then, the second patterns are elongated by the processor such that the two second patterns arranged in the line are separated from each other by a distance equal to a minimum space of the design pattern. The design pattern is divided into a first set of patterns and a second set of patterns by the processor. A first mask is generated by the processor based on the first set of patterns. A second mask is generated by the processor based on the second set of patterns.

    METHOD OF FORMING PHOTOMASK
    12.
    发明申请
    METHOD OF FORMING PHOTOMASK 审中-公开

    公开(公告)号：US20180143529A1

    公开(公告)日：2018-05-24

    申请号：US15361007

    申请日：2016-11-24

    Applicant: UNITED MICROELECTRONICS CORP.

    Inventor： Chih-I Wei ,  Chia-Wei Huang ,  Yung-Feng Cheng

    IPC: G03F1/36 ,  G06F17/50

    CPC classification number: G03F1/36 ,  G03F1/84 ,  G06F17/5081

    Abstract: A method of forming a photomask is provided. A first layout pattern is first provided to a computer system and followed by generating an assist feature pattern by the computer system based on the first layout pattern and adding the assist feature pattern into the first layout pattern to form a second layout pattern. Thereafter, an optical proximity correction process is performed with reference to both the first layout pattern and the assist feature pattern to the second layout pattern without altering the assist feature pattern to form a third layout pattern by the computer system. Then, the third layout pattern is output to form a photomask.

    Method for forming a semiconductor structure
    13.
    发明授权
    Method for forming a semiconductor structure 有权
    半导体结构的形成方法

    公开(公告)号：US09368365B1

    公开(公告)日：2016-06-14

    申请号：US14709488

    申请日：2015-05-12

    Applicant: UNITED MICROELECTRONICS CORP.

    Inventor： Shih-Hsun Kuo ,  Ting-Cheng Tseng ,  Tan-Ya Yin ,  Chia-Wei Huang ,  Ming-Jui Chen

    IPC: H01L21/30 ,  H01L21/308

    CPC classification number: H01L21/3086 ,  H01L21/0337 ,  H01L21/3085 ,  H01L21/823431 ,  H01L21/845 ,  H01L29/66795

    Abstract: A manufacturing method for forming a semiconductor structure includes: first, a plurality of fin structures are formed on a substrate and arranged along a first direction, next, a first fin cut process is performed, so as to remove parts of the fin structures which are disposed within at least one first fin cut region, and a second fin cut process is then performed, so as to remove parts of the fin structures which are disposed within at least one second fin cut region, where the second fin cut region is disposed along at least one edge of the first fin cut region.

    Abstract translation: 一种用于形成半导体结构的制造方法，其特征在于：首先，在基板上形成多个翅片结构，沿第一方向配置，接着，进行第一翅片切割加工， 设置在至少一个第一翅片切割区域内，然后执行第二翅片切割过程，以便去除设置在至少一个第二翅片切割区域内的翅片结构的部分，其中第二翅片切割区域沿着 第一鳍片切割区域的至少一个边缘。

    Static random access memory unit cell structure and static random access memory unit cell layout structure
    14.
    发明授权
    Static random access memory unit cell structure and static random access memory unit cell layout structure 有权
    静态随机存取单元单元格结构和静态随机存取单元布局结构

    公开(公告)号：US09196352B2

    公开(公告)日：2015-11-24

    申请号：US13776589

    申请日：2013-02-25

    Applicant: UNITED MICROELECTRONICS CORP.

    Inventor： Ching-Wen Hung ,  Po-Chao Tsao ,  Shu-Ru Wang ,  Chia-Wei Huang ,  Chieh-Te Chen ,  Feng-Yi Chang ,  Chih-Sen Huang

    IPC: H01L21/70 ,  G11C11/00 ,  G11C11/412 ,  H01L27/02 ,  H01L27/11

    CPC classification number: G11C11/412 ,  H01L27/0207 ,  H01L27/1104

    Abstract: A static random access memory unit cell layout structure is disclosed, in which a slot contact is disposed on one active area and another one across from the one. A static random access memory unit cell structure and a method of fabricating the same are also disclosed, in which, a slot contact is disposed on drains of a pull-up transistor and a pull-down transistor, and a metal-zero interconnect is disposed on the slot contact and a gate line of another pull-up transistor. Accordingly, there is not an intersection of vertical and horizontal metal-zero interconnects, and there is no place suffering from twice etching. Leakage junction due to stitch recess can be avoided.

    Abstract translation: 公开了一种静态随机存取存储器单元布局结构，其中，槽触点设置在一个有源区上，另一个位于一个有源区上。 还公开了一种静态随机存取存储单元单元结构及其制造方法，其中，在上拉晶体管和下拉晶体管的漏极上设置一个槽触点，并且设置金属零互连 在槽触点和另一个上拉晶体管的栅极线上。 因此，没有垂直和水平的金属零互连，没有两次蚀刻的地方。 可以避免缝合凹陷引起的泄漏接头。

    Method for separating photomask pattern
    16.
    发明授权
    Method for separating photomask pattern 有权
    分离光掩模图案的方法

    公开(公告)号：US08741507B1

    公开(公告)日：2014-06-03

    申请号：US13742361

    申请日：2013-01-16

    Applicant: United Microelectronics Corp.

    Inventor： Chun-Hsien Huang ,  Ming-Jui Chen ,  Chia-Wei Huang ,  Ting-Cheng Tseng

    IPC: G03F1/70

    CPC classification number: G03F1/70

    Abstract: A method for separating photomask pattern, including the following steps: first, a layout pattern is provided, wherein the layout pattern is defined to have at least one critical pattern and at least one non-critical pattern. Then, a first split process is performed to separate the critical pattern into a plurality of first patterns and a plurality of second patterns. A second split process is performed to separate the non-critical pattern into a plurality of third patterns and a plurality of fourth patterns. Finally, the first patterns and the third patterns are output to a first photomask, and the second patterns and the fourth patterns are output to a second photomask.

    Abstract translation: 一种用于分离光掩模图案的方法，包括以下步骤：首先，提供布局图案，其中布局图案被定义为具有至少一个关键图案和至少一个非关键图案。 然后，执行第一分割处理以将关键图案分离成多个第一图案和多个第二图案。 执行第二分割处理以将非关键图案分离成多个第三图案和多个第四图案。 最后，将第一图案和第三图案输出到第一光掩模，并将第二图案和第四图案输出到第二光掩模。

    SEMICONDUCTOR STRUCTURE AND METHOD FOR FABRICATING SEMICONDUCTOR LAYOUT
    17.
    发明申请
    SEMICONDUCTOR STRUCTURE AND METHOD FOR FABRICATING SEMICONDUCTOR LAYOUT 有权
    半导体结构和制造半导体布局的方法

    公开(公告)号：US20140045105A1

    公开(公告)日：2014-02-13

    申请号：US14065443

    申请日：2013-10-29

    Applicant: UNITED MICROELECTRONICS CORP.

    Inventor： Chia-Wei Huang ,  Ming-Jui Chen ,  Chun-Hsien Huang

    IPC: G03F1/76

    CPC classification number: G03F1/76 ,  G03F1/70 ,  G06F17/5068 ,  G06F17/5081 ,  G06F19/00 ,  G06F2217/12 ,  G21K5/00 ,  H01L21/31144 ,  H01L21/76811 ,  H01L21/76816 ,  H01L23/5226 ,  H01L23/528 ,  H01L2924/0002 ,  H01L2924/00

    Abstract: A method for fabricating a semiconductor layout includes providing a first layout having a plurality of line patterns and a second layout having a plurality of connection patterns, defining at least a first to-be-split pattern overlapping with the connection pattern among the line patterns, splitting the first to-be-split pattern at where the first to-be-split pattern overlapping with the connection pattern, decomposing the first layout to form a third layout and a fourth layout, and outputting the third layout and the further layout to a first mask and a second mask respectively.

    Abstract translation: 一种用于制造半导体布局的方法包括提供具有多个线图案的第一布局和具有多个连接图案的第二布局，所述多个连接图案定义与线图案中的连接图案重叠的至少第一分割图案， 将第一待分割图案分割成与连接图案重叠的第一待分割图案，分解第一布局以形成第三布局和第四布局，并将第三布局和其他布局输出到 第一掩模和第二掩模。

Patent Agency Ranking