METHOD FOR DISSOLVING A SILICON DIOXIDE LAYER
    11.
    发明申请
    METHOD FOR DISSOLVING A SILICON DIOXIDE LAYER 有权
    用于溶解二氧化硅层的方法

    公开(公告)号:US20160056052A1

    公开(公告)日:2016-02-25

    申请号:US14779477

    申请日:2014-03-03

    申请人: SOITEC

    IPC分类号: H01L21/322 H01L21/324

    摘要: This disclosure relates to a method for dissolving a silicon dioxide layer in a structure, including, from the back surface thereof to the front surface thereof, a supporting substrate, the silicon dioxide layer and a semiconductor layer, the dissolution method being implemented in a furnace in which structures are supported on a support, the dissolution method resulting in the diffusion of oxygen atoms included in the silicon dioxide layer through the semiconductor layer and generating volatile products, and the furnace including traps suitable for reacting with the volatile products, so as to reduce the concentration gradient of the volatile products parallel to the front surface of at least one structure.

    摘要翻译: 本公开涉及一种将二氧化硅层溶解在结构中的方法,包括从其后表面到其前表面的支撑衬底,二氧化硅层和半导体层,该溶解方法在炉中实施 其中结构支撑在载体上,溶解方法导致二氧化硅层中包含的氧原子扩散通过半导体层并产生挥发性产物,并且该炉包括适于与挥发性产物反应的阱,以便 降低与至少一个结构的前表面平行的挥发性产物的浓度梯度。

    METHOD TO IMPROVE SLIP RESISTANCE OF SILICON WAFERS
    13.
    发明申请
    METHOD TO IMPROVE SLIP RESISTANCE OF SILICON WAFERS 审中-公开
    提高硅波形耐滑性的方法

    公开(公告)号:US20150187597A1

    公开(公告)日:2015-07-02

    申请号:US14576617

    申请日:2014-12-19

    IPC分类号: H01L21/324 H01L21/02

    CPC分类号: H01L21/3225

    摘要: By controlling the concentration and size of bulk micro defects (BMD) during the manufacture of an integrated circuit slip and associated yield loss due to slip may be eliminated. A process for eliminating slip that is customized to an integrated circuit (IC) manufacturing flow is disclosed. The process is adapted to the oxygen content of the starting material and to the thermal budget of an IC manufacturing flow and generates a sufficient concentration of BMDs of a size that is optimized to getter microcracks thereby eliminating slip. Slip is eliminated in unpatterned wafers and in wafers containing shallow trench isolation and deep trench isolation using a BMD nucleation anneal and a BMD growth anneal.

    摘要翻译: 通过控制在集成电路滑移的制造过程中的体积微缺陷(BMD)的浓度和尺寸以及由于滑动引起的相关的成品率损失可以被消除。 公开了一种消除针对集成电路(IC)制造流程定制的滑移的过程。 该方法适用于起始材料的氧含量和IC制造流程的热预算,并且产生足够浓度的BMD,其尺寸被优化以消除微裂纹从而消除滑移。 在未图案化的晶片和含有浅沟槽隔离的晶片和使用BMD成核退火和BMD生长退火的深沟槽隔离的晶片中消除了滑移。

    Method for qualifying a semiconductor wafer for subsequent processing
    14.
    发明授权
    Method for qualifying a semiconductor wafer for subsequent processing 有权
    用于对用于后续处理的半导体晶片进行限定的方法

    公开(公告)号:US09064823B2

    公开(公告)日:2015-06-23

    申请号:US13889515

    申请日:2013-05-08

    摘要: A method is provided for qualifying a semiconductor wafer for subsequent processing, such as thermal processing. A plurality of locations are defined about a periphery of the semiconductor wafer, and one or more properties, such as oxygen concentration and a density of bulk micro defects present, are measured at each of the plurality of locations. A statistical profile associated with the periphery of the semiconductor wafer is determined based on the one or more properties measured at the plurality of locations. The semiconductor wafer is subsequently thermally treated when the statistical profile falls within a predetermined range. The semiconductor wafer is rejected from subsequent processing when the statistical profile deviates from the predetermined range. As such, wafers prone to distortion, warpage, and breakage are rejected from subsequent thermal processing.

    摘要翻译: 提供了一种用于限定半导体晶片以进行后续处理(诸如热处理)的方法。 围绕半导体晶片的周边限定多个位置,并且在多个位置的每一个处测量一个或多个特性,例如存在的氧浓度和体积微缺陷的密度。 基于在多个位置处测量的一个或多个属性来确定与半导体晶片的外围相关联的统计概况。 当统计特性落在预定范围内时,半导体晶片随后进行热处理。 当统计概况偏离预定范围时,半导体晶片从后续处理中被拒绝。 因此,容易发生变形,翘曲和断裂的晶片从随后的热处理中被拒绝。

    SILICON WAFER AND METHOD FOR MANUFACTURING THE SAME
    15.
    发明申请
    SILICON WAFER AND METHOD FOR MANUFACTURING THE SAME 审中-公开
    硅波及其制造方法

    公开(公告)号:US20150044422A1

    公开(公告)日:2015-02-12

    申请号:US14448077

    申请日:2014-07-31

    摘要: A silicon wafer is manufactured by subjecting a silicon wafer sliced from a silicon single-crystal ingot grown by the Czochralski process to a rapid thermal process in which the silicon wafer is heated to a maximum temperature within a range of 1300 to 1380° C., and kept at the maximum temperature for 5 to 60 seconds; and removing a surface layer of the wafer where a semiconductor device is to be manufactured by a thickness of not less X [μm] which is calculated according to the below equations (1) to (3): X[μm]=a[μm]+b[μm]  (1); a[μm]=(0.0031×(said maximum temperature)[° C.]−3.1)×6.4×(cooling rate)−0.4[° C./second] . . . (2); and b[μm]=a/(solid solubility limit of oxygen) [atoms/cm3]/(oxygen concentration in substrate) [atoms/cm3]  (3).

    摘要翻译: 通过使由切克劳斯基(Czochralski)工艺生长的硅单晶锭切片的硅晶片经受快速热处理,将硅晶片加热至1300〜1380℃的最高温度, 并保持在最高温度5至60秒; 并且根据以下等式(1)至(3)计算出不少于X [μm]的厚度,去除要制造半导体器件的晶片的表面层:X [μm] = a [μm ] + b [μm](1); a [μm] =(0.0031×(所述最高温度)[℃] -3.1)×6.4×(冷却速度)〜0.4 [℃/秒]。 。 。 (2); 和b [μm] = a /(氧的固溶度极限)[原子/ cm 3] /(底物中的氧浓度)[原子/ cm 3](3)。

    METHOD OF MANUFACTURING SEMICONDUCTOR DEVICE
    19.
    发明申请
    METHOD OF MANUFACTURING SEMICONDUCTOR DEVICE 有权
    制造半导体器件的方法

    公开(公告)号:US20140193964A1

    公开(公告)日:2014-07-10

    申请号:US13905323

    申请日:2013-05-30

    IPC分类号: H01L21/322

    摘要: The present invention provides a method of manufacturing a semiconductor device. The method at least comprises the following steps. First, the semiconductor device, which comprises a gate, a gate dielectric layer, an active layer, a source and a drain, is manufactured. However, the semiconductor device has a plurality of defects, and the active layer is a metal oxide thin film. After annealing the semiconductor device, it will be transferred into a chamber. A final step of injecting a supercritical fluid carried with a co-solvent into the chamber is then performed to modify the abovementioned defects.

    摘要翻译: 本发明提供一种制造半导体器件的方法。 该方法至少包括以下步骤。 首先,制造包括栅极,栅介质层,有源层,源极和漏极的半导体器件。 然而,半导体器件具有多个缺陷,有源层是金属氧化物薄膜。 在半导体器件退火之后,将其转移到腔室中。 然后进行将携带有辅助溶剂的超临界流体注入到室中的最后步骤,以改变上述缺陷。

    METHOD OF PRODUCING EPITAXIAL SILICON WAFER, EPITAXIAL SILICON WAFER, AND METHOD OF PRODUCING SOLID-STATE IMAGE SENSING DEVICE
    20.
    发明申请
    METHOD OF PRODUCING EPITAXIAL SILICON WAFER, EPITAXIAL SILICON WAFER, AND METHOD OF PRODUCING SOLID-STATE IMAGE SENSING DEVICE 有权
    生产外延硅膜,外延硅膜的方法和生产固态图像感测装置的方法

    公开(公告)号:US20140134779A1

    公开(公告)日:2014-05-15

    申请号:US14078217

    申请日:2013-11-12

    申请人: SUMCO Corporation

    发明人: Takeshi Kadono

    摘要: Provided is an epitaxial silicon wafer free of epitaxial defects caused by dislocation clusters and COPs with reduced metal contamination achieved by higher gettering capability and a method of producing the epitaxial wafer.A method of producing an epitaxial silicon wafer includes a first step of irradiating a silicon wafer free of dislocation clusters and COPs with cluster ions to form a modifying layer formed from a constituent element of the cluster ions in a surface portion of the silicon wafer; and a second step of forming an epitaxial layer on the modifying layer of the silicon wafer.

    摘要翻译: 提供了一种外延硅晶片,其由位错簇引起的外延缺陷和通过较高的吸杂能力实现的具有减少的金属污染的COP和一种制造外延晶片的方法。 一种外延硅晶片的制造方法,其特征在于,包括:第一工序,在硅晶片的表面部照射不含位错簇的硅晶片和具有簇离子的COP,形成由所述簇离子的构成元素形成的改性层; 以及在硅晶片的改性层上形成外延层的第二步骤。