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    MULTIPLE-INPUT MULTIPLE-OUTPUT RF ANTENNA ARCHITECTURES
    222.
    发明申请
    MULTIPLE-INPUT MULTIPLE-OUTPUT RF ANTENNA ARCHITECTURES 审中-公开
    多路输入多输出射频天线架构

    公开(公告)号：US20150207238A1

    公开(公告)日：2015-07-23

    申请号：US14600977

    申请日：2015-01-20

    Applicant: RF Micro Devices, Inc.

    Inventor： Ruediger Bauder

    IPC: H01Q21/00

    CPC classification number: H01Q9/42 ,  H01Q21/24 ,  H01Q21/28

    Abstract: RF communications circuitry, which includes a first RF antenna element, a second RF antenna element, a third RF antenna element, and a fourth RF antenna element is disclosed. The first RF antenna element is proximal to the second RF antenna element. The third RF antenna element is proximal to the fourth RF antenna element. A primary axis of the first RF antenna element is about perpendicular to a primary axis of one of the third RF antenna element and the fourth RF antenna element.

    Abstract translation: 公开了包括第一RF天线元件，第二RF天线元件，第三RF天线元件和第四RF天线元件的RF通信电路。 第一RF天线元件靠近第二RF天线元件。 第三RF天线元件靠近第四RF天线元件。 第一RF天线元件的主轴大致垂直于第三RF天线元件和第四RF天线元件之一的主轴。

    GROUP WRITE TECHNIQUE FOR A BUS INTERFACE SYSTEM
    224.
    发明申请
    GROUP WRITE TECHNIQUE FOR A BUS INTERFACE SYSTEM 审中-公开
    用于总线接口系统的组写入技术

    公开(公告)号：US20150193321A1

    公开(公告)日：2015-07-09

    申请号：US14659379

    申请日：2015-03-16

    Applicant: RF Micro Devices, Inc.

    Inventor： Christopher Truong Ngo ,  Alexander Wayne Hietala

    IPC: G06F11/30 ,  G06F11/16 ,  G06F11/22 ,  G06F11/10

    CPC classification number: G06F11/3027 ,  G06F1/10 ,  G06F1/26 ,  G06F11/1004 ,  G06F11/1052 ,  G06F11/1604 ,  G06F11/221

    Abstract: Embodiments of bus interface systems and methods of operating the same are disclosed. In one embodiment, a bus interface system includes a master bus controller and multiple slave bus controllers that are each coupled to a bus line. The master bus controller is configured to generate a first set of data pulses along the bus line representing a payload segment. Each of the slave bus controllers decodes the first set of data pulses along the bus line representing the payload segment and performs an error check. Each slave bus controller is then configured to generate an acknowledgement pulse along the bus line to indicate that the slave bus controller's particular error check was passed. In this manner, the bus interface system can perform a group write bus function and the master bus controller can determine that the multiple slave bus controllers each received an accurate copy of the payload segment.

    Abstract translation: 公开了总线接口系统的实施例及其操作方法。 在一个实施例中，总线接口系统包括主总线控制器和多个从总线控制器，每个从总线控制器耦合到总线。 主总线控制器被配置为沿着表示有效载荷段的总线产生第一组数据脉冲。 每个从总线控制器沿着表示有效载荷段的总线解码第一组数据脉冲，并执行错误检查。 然后，每个从总线控制器被配置为沿着总线生成确认脉冲，以指示从总线控制器的特定错误检查已经通过。 以这种方式，总线接口系统可以执行组写总线功能，并且主总线控制器可以确定多个从总线控制器各自接收到有效载荷段的准确副本。

    Field effect transistor (FET) having fingers with rippled edges
    227.
    发明授权
    Field effect transistor (FET) having fingers with rippled edges 有权
    具有波纹边缘的手指的场效应晶体管（FET）

    公开(公告)号：US09070761B2

    公开(公告)日：2015-06-30

    申请号：US13966400

    申请日：2013-08-14

    Applicant: RF Micro Devices, Inc.

    Inventor： Joseph Herbert Johnson

    IPC: H01L29/78 ,  H01L29/66 ,  H01L29/417 ,  H01L29/423 ,  H01L29/778 ,  H01L29/20

    CPC classification number: H01L29/78 ,  H01L29/2003 ,  H01L29/41725 ,  H01L29/42316 ,  H01L29/4238 ,  H01L29/66477 ,  H01L29/7787

    Abstract: A field effect transistor (FET) having fingers with rippled edges is disclosed. The FET includes a semiconductor substrate having a front side with a finger axis. A drain finger is disposed on the front side of the semiconductor substrate such that a greatest dimension of the drain finger lies parallel to the finger axis. A gate finger is disposed on the front side of the semiconductor substrate. The gate finger is spaced from the drain finger such that a greatest dimension of the gate finger lies parallel to the finger axis. A source finger is disposed on the front side of the semiconductor substrate. The source finger is spaced from the gate finger such that a greatest dimension of the source finger lies parallel to the finger axis. The drain finger, the gate finger, and the source finger each have rippled edges with an axis parallel with the finger axis.

    Abstract translation: 公开了具有波纹边缘的手指的场效应晶体管（FET）。 FET包括具有指状轴线的前侧的半导体衬底。 排水指状物设置在半导体衬底的前侧，使得排水指状件的最大尺寸平行于指状轴线。 栅极指状物设置在半导体衬底的正面上。 门指与排水手指间隔开，使得门指的最大尺寸平行于指轴。 源极指设置在半导体衬底的正面上。 源极指与栅极指状物间隔开，使得源极指的最大尺寸平行于指状轴线。 排水手指，门指和源手指各自具有波纹边缘，轴线与指轴平行。

    RADIO FREQUENCY POWER AMPLIFIER WITH NOISE REDUCTION FEEDBACK LINEARIZATION
    228.
    发明申请
    RADIO FREQUENCY POWER AMPLIFIER WITH NOISE REDUCTION FEEDBACK LINEARIZATION 审中-公开
    无噪声功率放大器，具有噪声降低反馈线性化

    公开(公告)号：US20150171815A1

    公开(公告)日：2015-06-18

    申请号：US14568495

    申请日：2014-12-12

    Applicant: RF Micro Devices, Inc.

    Inventor： George Maxim ,  Baker Scott ,  Dirk Robert Walter Leipold

    IPC: H03G3/30

    CPC classification number: H03G3/3042 ,  H03F1/26 ,  H03F1/3247 ,  H03F1/3282 ,  H03F3/193

    Abstract: RF PA circuitry includes an RF signal path, an adjustable component, a distortion compensation feedback loop including distortion compensation circuitry, RF noise filtering circuitry, and baseband noise filtering circuitry. The adjustable component is located in the RF signal path. The distortion compensation feedback loop is coupled in parallel with at least a portion of the RF signal path, and includes the distortion compensation circuitry. Further, the distortion compensation circuitry is configured to adjust one or more parameters of the adjustable component via a component adjustment signal based on a measurement of a signal at an output of the RF signal path. The RF noise filtering circuitry is coupled in the RF signal path and configured to attenuate noise therein. The baseband noise filtering circuitry is coupled between the distortion compensation circuitry and the adjustable component and configured to attenuate noise in the component adjustment signal.

    Abstract translation: RF PA电路包括RF信号路径，可调组件，包括失真补偿电路，RF噪声滤波电路和基带噪声滤波电路的失真补偿反馈回路。 可调组件位于RF信号路径中。 失真补偿反馈回路与RF信号路径的至少一部分并联耦合，并且包括失真补偿电路。 此外，失真补偿电路被配置为基于在RF信号路径的输出处的信号的测量，经由组件调整信号来调整可调组件的一个或多个参数。 RF噪声滤波电路被耦合在RF信号路径中并被配置为衰减其中的噪声。 基带噪声滤波电路耦合在失真补偿电路和可调组件之间，并被配置为衰减元件调整信号中的噪声。

    Clock and data recovery using dual manchester encoded data streams
    229.
    发明授权
    Clock and data recovery using dual manchester encoded data streams 有权
    使用双曼彻斯特编码数据流的时钟和数据恢复

    公开(公告)号：US09054941B2

    公开(公告)日：2015-06-09

    申请号：US14334978

    申请日：2014-07-18

    Applicant: RF Micro Devices, Inc.

    Inventor： Christopher Truong Ngo

    IPC: H04L5/16 ,  H04L25/49

    CPC classification number: H04L25/4904 ,  H04L25/14

    Abstract: Two Manchester encoded bit streams each bit stream with accompanying embedded clock data are disclosed. The two encoded bit streams are encoded at the source using opposite polarities of the source clock to position transitions within the bit streams at the rising and falling edges of the source clock. The receiver may extract the clock data from both bit streams. Because both rising and falling edge clock data is available between the two bit streams, the receiver does not need a phase locked loop (PLL) or incur the accompanying expense of such PLL. Further, by avoiding use of a PLL, a nearly all digital circuit may be created, which may provide further cost and space savings. Still further, a higher data throughput is provided without increasing pin count or signal bandwidth.

    Abstract translation: 公开了两个曼彻斯特编码比特流，每个比特流与伴随的嵌入式时钟数据。 使用源时钟的相反极性在源处对两个编码比特流进行编码，以在源时钟的上升沿和下降沿定位位流内的转换。 接收机可以从两个比特流中提取时钟数据。 因为两个比特流之间的上升沿和下降沿时钟数据都可用，所以接收机不需要锁相环（PLL）或者产生这种PLL的伴随费用。 此外，通过避免使用PLL，可以创建几乎所有的数字电路，这可以提供进一步的成本和空间节省。 此外，提供更高的数据吞吐量而不增加引脚数或信号带宽。

    LOW DISTORTION ANTENNA SWITCHING CIRCUITRY
    230.
    发明申请
    LOW DISTORTION ANTENNA SWITCHING CIRCUITRY 审中-公开
    低失真天线开关电路

    公开(公告)号：US20150155906A1

    公开(公告)日：2015-06-04

    申请号：US14560399

    申请日：2014-12-04

    Applicant: RF Micro Devices, Inc.

    Inventor： Thomas Philip Budka

    IPC: H04B1/44 ,  H04B15/00

    CPC classification number: H04B1/006

    Abstract: Antenna switching circuitry includes an antenna node, a number of signal path nodes, and a number of switching elements. Each one of the switching elements is coupled between a different one of the signal path nodes and the antenna node. At least two of the signal path nodes are coupled together in order to form a low distortion node, such that the switching elements between the low distortion node and the antenna node are used to pass a low-distortion radio frequency (RF) signal. By coupling two of the signal path nodes together, a low distortion signal path is created to the antenna. Creating a low distortion signal path using multiple switching elements allows for the size of the switching elements to remain small, which reduces the parasitic capacitance of each one of the switches and therefore the insertion loss of the antenna switching circuitry.

    Abstract translation: 天线切换电路包括天线节点，多个信号路径节点和多个交换元件。 每个开关元件耦合在不同的一个信号路径节点和天线节点之间。 信号路径节点中的至少两个耦合在一起以形成低失真节点，使得低失真节点和天线节点之间的开关元件用于通过低失真射频（RF）信号。 通过将两个信号路径节点耦合在一起，向天线产生低失真信号路径。 使用多个开关元件创建低失真信号路径允许开关元件的尺寸保持较小，这降低了每个开关的寄生电容，并因此降低了天线切换电路的插入损耗。

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