INTEGRATED CIRCUIT AND PROCESS THEREOF
    222.
    发明申请

    公开(公告)号:US20170117151A1

    公开(公告)日:2017-04-27

    申请号:US14945443

    申请日:2015-11-19

    CPC classification number: H01L27/0207 H01L21/32139 H01L27/11582 H01L28/00

    Abstract: An integrated circuit process includes the following steps. A substrate including a first area and a second area is provided. A plurality of line patterns cover the substrate of the first area, and a sacrificial line pattern covers the substrate of the second area, wherein these line patterns separate from and are orthogonal to the sacrificial line pattern. The present invention also provides an integrated circuit formed by said process. A substrate includes a first area and a second area; a plurality of line patterns cover the substrate of the first area; a slot pattern is in the substrate of the second area, wherein these line patterns are orthogonal to the slot pattern. Additionally, a plurality of line patterns cover the substrate; a sacrificial line pattern is at ends of the line patterns, wherein these line patterns separate from and are orthogonal to the sacrificial line pattern.

    Method of forming non-continuous line pattern and non-continuous line pattern structure
    225.
    发明授权
    Method of forming non-continuous line pattern and non-continuous line pattern structure 有权
    形成非连续线条图案和非连续线条图案结构的方法

    公开(公告)号:US09583343B2

    公开(公告)日:2017-02-28

    申请号:US14753019

    申请日:2015-06-29

    Abstract: A method of forming a non-continuous line pattern includes forming a DSA material layer on a substrate, performing a phase separation of the DSA material layer to form an ordered periodic pattern including a plurality of first polymer structures and the second polymer structures arranged alternately, forming a first mask to cover a first portion of the ordered periodic pattern, performing a first etching process to remove a portion of the first polymer structures exposed by the first mask, removing the first mask, forming a second mask to cover a second portion of the ordered periodic pattern, with an interval to the first portion of the ordered periodic pattern, performing a second etching process to remove a portion of the second polymer structures exposed by the second mask, and removing the second mask. The remaining first polymer structures and the remaining second polymer structures are not connected to each other.

    Abstract translation: 形成非连续线图案的方法包括在基底上形成DSA材料层,进行DSA材料层的相分离以形成包括多个第一聚合物结构和交替布置的第二聚合物结构的有序周期性图案, 形成第一掩模以覆盖有序周期性图案的第一部分,执行第一蚀刻工艺以去除由第一掩模暴露的第一聚合物结构的一部分,去除第一掩模,形成第二掩模以覆盖第二掩模的第二部分 所述有序周期性图案间隔到所述有序周期性图案的第一部分,执行第二蚀刻工艺以去除由所述第二掩模暴露的所述第二聚合物结构的一部分,以及去除所述第二掩模。 剩余的第一聚合物结构和剩余的第二聚合物结构彼此不连接。

    Semiconductor structure and process thereof
    226.
    发明授权
    Semiconductor structure and process thereof 有权
    半导体结构及其工艺

    公开(公告)号:US09570339B2

    公开(公告)日:2017-02-14

    申请号:US14687932

    申请日:2015-04-16

    Abstract: A semiconductor process including the following step is provided. A sacrificial layer is formed in a substrate. The sacrificial layer and the substrate are etched to form a trench in the sacrificial layer and the substrate. A first isolation material fills the trench, thereby a first isolation structure being formed. The sacrificial layer is patterned to form a plurality of sacrificial patterns. A plurality of spacers are formed beside the sacrificial patterns respectively. The sacrificial patterns are removed. Layouts of the spacers are transferred into the substrate, so that a plurality of fin structures are formed in the substrate. The spacers are then removed. The present invention also provides a semiconductor structure formed by said semiconductor process.

    Abstract translation: 提供包括以下步骤的半导体工艺。 在衬底中形成牺牲层。 蚀刻牺牲层和衬底以在牺牲层和衬底中形成沟槽。 第一隔离材料填充沟槽,从而形成第一隔离结构。 将牺牲层图案化以形成多个牺牲图案。 在牺牲图案旁边分别形成多个间隔物。 牺牲图案被去除。 间隔物的布置被转移到基底中,使得在基底中形成多个翅片结构。 然后移除间隔物。 本发明还提供了由所述半导体工艺形成的半导体结构。

    Overlay operation method and overlay control method
    227.
    发明授权
    Overlay operation method and overlay control method 有权
    叠加操作方法和叠加控制方法

    公开(公告)号:US09568842B2

    公开(公告)日:2017-02-14

    申请号:US14696488

    申请日:2015-04-27

    CPC classification number: G03F7/70633 G03F1/70

    Abstract: An overlay operation method and an overlay control method are disclosed. A first mark and a second mark are identified on a substrate, wherein the first mark and the second mark are formed by a process in combination with using a photomask. Next, a first measurement is performed to obtain an offset between the first mark and the second mark in a direction. Then, an operation is performed to judge whether the offset is in a range from a pre-determined offset minus a deviation to the pre-determined offset plus the deviation, wherein the pre-determined offset is determined by the photomask.

    Abstract translation: 公开了覆盖操作方法和覆盖控制方法。 在基板上识别第一标记和第二标记,其中第一标记和第二标记通过与使用光掩模组合的方法形成。 接下来,执行第一测量以在方向上获得第一标记和第二标记之间的偏移。 然后,执行操作以判断偏移是否在从预定偏移减去偏差到预定偏移加上偏差的范围内,其中预定偏移由光掩模确定。

    SEMICONDUCTOR DEVICE AND METHOD FOR FABRICATING THE SAME
    228.
    发明申请
    SEMICONDUCTOR DEVICE AND METHOD FOR FABRICATING THE SAME 有权
    半导体器件及其制造方法

    公开(公告)号:US20170040415A1

    公开(公告)日:2017-02-09

    申请号:US14840038

    申请日:2015-08-30

    Abstract: A method for fabricating semiconductor device is disclosed. The method includes the steps of: providing a substrate having a first region and a second region; forming a plurality of fin-shaped structures and a first shallow trench isolation (STI) around the fin-shaped structures on the first region and the second region; forming a patterned hard mask on the second region; removing the fin-shaped structures and the first STI from the first region; forming a second STI on the first region; removing the patterned hard mask; and forming a gate structure on the second STI.

    Abstract translation: 公开了半导体器件的制造方法。 该方法包括以下步骤:提供具有第一区域和第二区域的衬底; 在所述第一区域和所述第二区域上的所述鳍状结构周围形成多个鳍状结构和第一浅沟槽隔离(STI); 在所述第二区域上形成图案化的硬掩模; 从所述第一区域去除所述鳍状结构和所述第一STI; 在所述第一区域上形成第二STI; 去除图案化的硬掩模; 以及在第二STI上形成栅极结构。

    METHOD OF FORMING NON-CONTINUOUS LINE PATTERN AND NON-CONTINUOUS LINE PATTERN STRUCTURE
    230.
    发明申请
    METHOD OF FORMING NON-CONTINUOUS LINE PATTERN AND NON-CONTINUOUS LINE PATTERN STRUCTURE 有权
    形成非连续线图和非连续线图形结构的方法

    公开(公告)号:US20160343567A1

    公开(公告)日:2016-11-24

    申请号:US14753019

    申请日:2015-06-29

    Abstract: A method of forming a non-continuous line pattern includes forming a DSA material layer on a substrate, performing a phase separation of the DSA material layer to form an ordered periodic pattern including a plurality of first polymer structures and the second polymer structures arranged alternately, forming a first mask to cover a first portion of the ordered periodic pattern, performing a first etching process to remove a portion of the first polymer structures exposed by the first mask, removing the first mask, forming a second mask to cover a second portion of the ordered periodic pattern, with an interval to the first portion of the ordered periodic pattern, performing a second etching process to remove a portion of the second polymer structures exposed by the second mask, and removing the second mask. The remaining first polymer structures and the remaining second polymer structures are not connected to each other.

    Abstract translation: 形成非连续线图案的方法包括在基底上形成DSA材料层,进行DSA材料层的相分离以形成包括多个第一聚合物结构和交替布置的第二聚合物结构的有序周期性图案, 形成第一掩模以覆盖有序周期性图案的第一部分,执行第一蚀刻工艺以去除由第一掩模暴露的第一聚合物结构的一部分,去除第一掩模,形成第二掩模以覆盖第二掩模的第二部分 所述有序周期性图案间隔到所述有序周期性图案的第一部分,执行第二蚀刻工艺以去除由所述第二掩模暴露的所述第二聚合物结构的一部分,以及去除所述第二掩模。 剩余的第一聚合物结构和剩余的第二聚合物结构彼此不连接。

Patent Agency Ranking