公开(公告)号：US5294039A

公开(公告)日：1994-03-15

申请号：US061842

申请日：1993-05-14

Applicant: Deepak K. Pai ,  Terrance A. Krinke

Inventor： Deepak K. Pai ,  Terrance A. Krinke

IPC: H01L23/043 ,  H01L23/498 ,  H01R12/57 ,  H05K1/02 ,  H05K3/34 ,  H05K3/36 ,  H05K13/00 ,  H05K13/04

CPC classification number: H01R12/57 ,  H01L23/49811 ,  H01L23/49861 ,  H05K13/0092 ,  H05K13/0465 ,  H05K3/3426 ,  H01F2027/295 ,  H01L2924/0002 ,  H05K1/0271 ,  H05K2201/10727 ,  H05K2201/10757 ,  H05K2201/10924 ,  H05K2201/10946 ,  H05K2201/10984 ,  H05K2203/107 ,  H05K3/36 ,  Y02P70/613 ,  Y10T29/49126

Abstract: A curved lead provides a mechanical and electrical connection between a board contact on a circuit board and a chip contact associated with a circuit chip. The chip can be mounted to the circuit board, to a chip carrier or to a multiple-chip module. The curved lead is substantially entirely plated with solder and is formed of a single piece of conductive material. The curved lead has a first surf ace for connection to the chip contact and a second surface, generally parallel to the first surface, for connection to the board contact. The first and second surfaces are connected by at least one curved portion and are arranged to mount the circuit chip to the circuit board with the solder in a compliant, generally parallel arrangement substantially free of stress.

Abstract translation: 弯曲的引线提供电路板上的电路板触点与与电路芯片相关联的芯片触点之间的机械和电连接。 芯片可以安装到电路板，芯片载体或多芯片模块。 弯曲的引线基本上完全用焊料电镀并且由单片导电材料形成。 弯曲引线具有用于连接到芯片触点的第一冲浪和大体平行于第一表面的第二表面，用于连接到板触点。 第一表面和第二表面通过至少一个弯曲部分连接，并且布置成将电路芯片安装到电路板上，其中焊料以基本上没有应力的顺从的大致平行布置。

公开(公告)号：US5214563A

公开(公告)日：1993-05-25

申请号：US815256

申请日：1991-12-31

Applicant: Howard S. Estes

Inventor： Howard S. Estes

IPC: H05K3/34 ,  H05K3/40 ,  H05K7/20

CPC classification number: H05K3/3436 ,  H01R12/714 ,  H05K3/3426 ,  H05K3/4015 ,  H05K2201/10265 ,  H05K2201/1031 ,  H05K2201/10689 ,  H05K2201/10909 ,  H05K2201/10946 ,  H05K2201/10962 ,  H05K2201/10984 ,  H05K2203/0415 ,  H05K2203/306 ,  Y02P70/611 ,  Y02P70/613

Abstract: Thermally reactive lead assemblies and electronic circuits are provided which include a solderable, conductive metallic element having a first configuration at ambient temperature and a second expanded configuration at an elevated temperature, such as at soldering temperatures. The second configuration of the conductive metallic element provides electrical continuity between a pair of soldering locations of the electronic circuit, such as between a semiconductor device lead and a conductive surface on a printed circuit board.

Abstract translation: 提供了热反应引线组件和电子电路，其包括可焊接的导电金属元件，其在环境温度下具有第一构型，并且在升高的温度下，例如在焊接温度下具有第二扩展构型。 导电金属元件的第二配置在电子电路的一对焊接位置之间提供电连续性，例如在半导体器件引线和印刷电路板上的导电表面之间。

公开(公告)号：US5177326A

公开(公告)日：1993-01-05

申请号：US779909

申请日：1991-10-21

Applicant: Kurt R. Goldhammer

Inventor： Kurt R. Goldhammer

IPC: H01L21/48 ,  H01L21/68 ,  H01L23/498 ,  H05K1/02 ,  H05K3/34

CPC classification number: H01L21/6835 ,  H01L21/4842 ,  H01L21/4853 ,  H01L23/49811 ,  H05K3/3426 ,  H01L2924/0002 ,  H05K1/0271 ,  H05K2201/10727 ,  H05K2201/10757 ,  H05K2201/10924 ,  H05K2201/10946 ,  Y02P70/613 ,  Y10T29/49124 ,  Y10T29/4913 ,  Y10T29/49147

Abstract: A lead wire array for a leadless chip carrier which functions to mount and electrically interconnect a leadless chip carrier to a printed wiring board. The array is formed from a length of bare wire which is appropriately folded and bent to provide interconnections between the contact pads on the leadless chip carrier and contact pads on the printed wiring board, which are then separated by removing portions of the lead wire array after its attachment to the leadless chip carrier.

Abstract translation: 一种用于无引线芯片载体的引线阵列，其用于将无引线芯片载体安装并电连接到印刷线路板。 阵列由裸线形成，其被适当地折叠和弯曲，以在无引线芯片载体上的接触焊盘和印刷线路板上的接触焊盘之间提供互连，然后通过去除引线阵列的部分之后被去除 其连接到无引线芯片载体。

公开(公告)号：US5098305A

公开(公告)日：1992-03-24

申请号：US324906

申请日：1989-03-17

Applicant: Nicholas J. Krajewski ,  David J. Johnson ,  Arthur O. Kunstmann

Inventor： Nicholas J. Krajewski ,  David J. Johnson ,  Arthur O. Kunstmann

IPC: C22F1/00 ,  H01L21/48 ,  H01L21/607 ,  H01L23/49 ,  H01R4/01 ,  H05K3/30 ,  H05K3/32 ,  H05K3/36 ,  H05K3/40

CPC classification number: H01L24/16 ,  C22F1/006 ,  H01L21/4853 ,  H01L24/11 ,  H01R12/523 ,  H01R4/01 ,  H05K3/308 ,  H05K3/328 ,  H05K3/36 ,  H01L2224/1134 ,  H01L2224/13099 ,  H01L2224/13144 ,  H01L2224/45015 ,  H01L2224/45144 ,  H01L2224/4943 ,  H01L2224/78301 ,  H01L2224/85045 ,  H01L2224/85201 ,  H01L2225/06524 ,  H01L2225/06527 ,  H01L2225/06541 ,  H01L2225/06589 ,  H01L2225/06593 ,  H01L2225/06596 ,  H01L24/45 ,  H01L2924/00013 ,  H01L2924/00014 ,  H01L2924/01004 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01014 ,  H01L2924/01022 ,  H01L2924/01027 ,  H01L2924/01028 ,  H01L2924/01029 ,  H01L2924/0103 ,  H01L2924/01033 ,  H01L2924/01037 ,  H01L2924/01039 ,  H01L2924/01047 ,  H01L2924/0105 ,  H01L2924/01052 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/01204 ,  H01L2924/014 ,  H01L2924/10329 ,  H01L2924/14 ,  H01L2924/3011 ,  H05K2201/096 ,  H05K2201/1059 ,  H05K2201/10825 ,  H05K2201/10909 ,  H05K2201/10946 ,  H05K2203/0495 ,  H05K3/368 ,  Y10T29/49126

Abstract: A method and apparatus for interconnecting circuit board assemblies using memory metal wires mechanically inserted into through-plated holes. The invention has its application in the interconnection of stacked circuit board assemblies where kinked memory metal wires are stretched so the wires are substantially straight; inserted into axially aligned through-plated holes of circuit boards; and released so that the memory metal wires reform their original kinked shaped within the through-plated holes, forming an electrical connection between the circuit boards. Memory metal alloys are used in the construction of the kinked memory metal wires to take advantage of the pseudoelastic behavior of the alloys in the austenitic phase below the forming temperature range.

Abstract translation: 一种使用机械地插入通孔的存储金属线互连电路板组件的方法和装置。 本发明适用于堆叠电路板组件的互连，其中扭曲的存储金属线被拉伸，使得电线基本上是直的; 插入到电路板的轴向对齐的通孔中; 并释放，使得记忆金属线在穿透孔内改造其原来的扭结形状，在电路板之间形成电连接。 记忆金属合金用于扭结记忆金属丝的构造，以利用低于成形温度范围的奥氏体相中合金的假弹性行为。

公开(公告)号：US5083237A

公开(公告)日：1992-01-21

申请号：US576789

申请日：1990-09-04

Applicant: Tetsurouo Tsuji

Inventor： Tetsurouo Tsuji

IPC: H01G4/12 ,  H01G2/06 ,  H01G4/30 ,  H01G4/40 ,  H05K1/14

CPC classification number: H01G2/06 ,  H01G4/40 ,  H05K1/145 ,  H05K2201/049 ,  H05K2201/10636 ,  H05K2201/10946 ,  Y02P70/611

Abstract: In the inventive electronic parts, external leads are installed at a board on which a multilayer capacitor is mounted, external leads being electrically connected with terminal electrodes of the capacitor through conductors which are provided on the board. And therefore it is possible to easily fabricate the capacitor into an electric device in three-dimensions through the external leads.

Abstract translation: 在本发明的电子部件中，外部引线安装在其上安装有多层电容器的板上，外部引线通过设置在板上的导体与电容器的端子电极电连接。 因此，可以通过外部引线容易地将电容器制造成三维的电子装置。

公开(公告)号：US5054192A

公开(公告)日：1991-10-08

申请号：US53142

申请日：1987-05-21

Applicant: Seymour R. Cray ,  Nicholas J. Krajewski

Inventor： Seymour R. Cray ,  Nicholas J. Krajewski

IPC: H01L21/48 ,  H01L21/60 ,  H01L21/607 ,  H01L23/50 ,  H01R12/52 ,  H05K3/30 ,  H05K3/32 ,  H05K3/36

CPC classification number: H01L24/11 ,  H01L21/4853 ,  H01R12/523 ,  H05K3/308 ,  H05K3/328 ,  H01L2224/1134 ,  H01L2224/13099 ,  H01L2224/13144 ,  H01L2224/45144 ,  H01L2224/4943 ,  H01L2224/78301 ,  H01L2225/06524 ,  H01L2225/06527 ,  H01L2225/06541 ,  H01L2225/06589 ,  H01L2225/06593 ,  H01L2225/06596 ,  H01L2924/00013 ,  H01L2924/00014 ,  H01L2924/01004 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01039 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/014 ,  H01L2924/10329 ,  H01L2924/12033 ,  H01L2924/14 ,  H05K2201/096 ,  H05K2201/1059 ,  H05K2201/10825 ,  H05K2201/10909 ,  H05K2201/10946 ,  H05K2203/0495 ,  H05K3/368 ,  Y10T29/49135 ,  Y10T29/4914 ,  Y10T29/49153

Abstract: A method and apparatus for interconnecting electronic circuits using nearly pure soft annealed gold mechanically compressed within through-plated holes. The invention has its application in attaching integrated circuit dice directly to circuit boards by ball bonding gold wires to the bonding pads of the integrated circuit dice in a substantially perpendicular relationship to the surfaces of the dice and inserting the gold leads into through-plated holes of circuit boards which provide an electrical and a mechanical connection once the leads are compressed within the through-plated holes. The present invention also finds its application in the interconnection of sandwiched circuit board assemblies where soft gold lead wires are inserted into axially aligned through-plated holes of the circuit boards and compressed so that the hold lead wires compress and buckle within the through-plated holes, forming an electrical connection between the circuit boards.

Abstract translation: 一种使用在纯通孔内机械压缩的近纯软质退火金的电子电路互连的方法和装置。 本发明的应用是将集成电路芯片直接连接到电路板上，通过将金线以与芯片表面基本垂直的方式与集成电路芯片的焊盘焊接在一起，将金线插入到通孔的通孔中 一旦导线在穿透孔内被压缩就提供电气和机械连接的电路板。 本发明还应用于夹层电路板组件的互连中，其中软金导线插入到电路板的轴向对齐的通孔中并被压缩，使得保持引线在穿通孔内压缩和弯曲 在电路板之间形成电连接。

公开(公告)号：US5045975A

公开(公告)日：1991-09-03

申请号：US386290

申请日：1989-07-27

Applicant: Seymour R. Cray ,  Nicholas J. Krajewski

Inventor： Seymour R. Cray ,  Nicholas J. Krajewski

IPC: H01L21/48 ,  H01L21/607 ,  H05K3/30 ,  H05K3/32 ,  H05K3/36

CPC classification number: H01L24/11 ,  H01L21/4853 ,  H01R12/523 ,  H05K3/308 ,  H05K3/328 ,  H05K3/36 ,  H01L2224/1134 ,  H01L2224/13099 ,  H01L2224/13144 ,  H01L2224/45015 ,  H01L2224/45144 ,  H01L2224/4943 ,  H01L2224/78301 ,  H01L2225/06524 ,  H01L2225/06527 ,  H01L2225/06541 ,  H01L2225/06589 ,  H01L2225/06593 ,  H01L2225/06596 ,  H01L24/45 ,  H01L2924/00013 ,  H01L2924/00014 ,  H01L2924/01004 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01014 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01039 ,  H01L2924/01041 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/01204 ,  H01L2924/014 ,  H01L2924/10329 ,  H01L2924/14 ,  H05K2201/096 ,  H05K2201/1059 ,  H05K2201/10825 ,  H05K2201/10909 ,  H05K2201/10946 ,  H05K2203/0495 ,  H05K3/368 ,  Y10S428/901 ,  Y10T29/49126 ,  Y10T29/4914

Abstract: A method and apparatus for interconnecting electronic circuits using nearly pure soft annealed gold mechanically compressed within through-plated holes. The invention has its application in attaching integrated circuit dice directly to circuit boards by ball bonding gold wires to the bonding pads of the integrated circuit dice in a substantially perpendicular relationship to the surfaces of the disc and inserting the gold leads into through-plated holes of circuit boards which provide an electrical and a mechanical connection once the leads are compressed within the through-plated holes. The present invention also finds its application in the interconnection of sandwiched circuit board assemblies where soft gold lead wires are inserted into axially aligned through-plated holes of the circuit boards and compressed so that the gold lead wires compress and buckle within the through-plated holes, forming an electrical connection between the circuit boards.

Abstract translation: 一种使用在纯通孔内机械压缩的近纯软质退火金的电子电路互连的方法和装置。 本发明的应用是将集成电路芯片直接连接到电路板上，通过将金线以与盘的表面基本垂直的方式将金线焊接到集成电路芯片的焊盘上，并将金引线插入到通孔的通孔中 一旦导线在穿透孔内被压缩就提供电气和机械连接的电路板。 本发明还将其应用于夹层电路板组件的互连中，其中软金导线插入到电路板的轴向对齐的通孔中并被压缩，使得金引线在穿透孔内压缩和弯曲 在电路板之间形成电连接。

公开(公告)号：US4807036A

公开(公告)日：1989-02-21

申请号：US74003

申请日：1987-07-16

Applicant: Hisashi Osada ,  Hideaki Fujioka ,  Ikuo Kato ,  Yoshinari Yamashita

Inventor： Hisashi Osada ,  Hideaki Fujioka ,  Ikuo Kato ,  Yoshinari Yamashita

IPC: H04N9/64 ,  H05K1/02 ,  H05K1/03 ,  H05K1/16 ,  H04N5/62

CPC classification number: H05K1/162 ,  H04N9/646 ,  H05K1/0233 ,  H05K1/0306 ,  H05K2201/09672 ,  H05K2201/1003 ,  H05K2201/10946

Abstract: A complex circuit component for a video signal circuit in a television receiver set has a single substrate, on which a first ceramic trap for removing speech carrier wave together with an inductor for that trap, a second trap for removing color subcarrier wave, and a delay circuit coupled with output of said second trap are mounted. The capacitors for those circuits are implemented by a pair of conductive patterns deposited on front surface and rear surface of the substrate. The capacitor for said first ceramic trap is subject to trimming so that the characteristics of the trap is adjustable.

Abstract translation: 用于电视接收机组中的视频信号电路的复杂电路部件具有单个基板，用于去除语音载波的第一陶瓷陷阱与该陷波器的电感器一起，用于去除彩色副载波的第二陷波器和延迟 与所述第二陷阱的输出耦合的电路被安装。 用于这些电路的电容器由沉积在基板的前表面和后表面上的一对导电图案来实现。 用于所述第一陶瓷捕集器的电容器进行修整，使得阱的特性是可调节的。

公开(公告)号：US4739125A

公开(公告)日：1988-04-19

申请号：US907006

申请日：1986-09-15

Applicant: Yutaka Watanabe ,  Fumiyuki Kobayashi ,  Masao Sekibata ,  Shigeo Kuroda ,  Akio Yasukawa ,  Shigejiro Sekine

Inventor： Yutaka Watanabe ,  Fumiyuki Kobayashi ,  Masao Sekibata ,  Shigeo Kuroda ,  Akio Yasukawa ,  Shigejiro Sekine

IPC: H01L23/50 ,  H01L23/495 ,  H01L23/498 ,  H05K1/02 ,  H05K1/18 ,  H05K3/34

CPC classification number: H01L23/49555 ,  H01L23/49811 ,  H05K3/3426 ,  H01L2924/0002 ,  H05K1/0271 ,  H05K2201/10689 ,  H05K2201/10719 ,  H05K2201/10727 ,  H05K2201/10757 ,  H05K2201/10946 ,  Y02P70/613

Abstract: An electric component part has its lead terminals bent in thickness directions in a middle section thereof at least two positions so that a step section virtually in parallel to the bottom of a circuit substrate is formed with the intention of absorbing the external force applied to the part by chaging the shape of the lead terminals. Increase in the part layout area due to the formation of the horizontal step section can be avoided, when necessary, by shifting the terminal lead out position on the component part inward thereby to minimize the jetty dimensions.

Abstract translation: 电气部件的导线端子在其中间部分的至少两个位置处具有在厚度方向上弯曲的引线端子，从而形成与电路基板的底部实际上平行的台阶部分，其目的是吸收施加到部件的外力 通过跟踪引线端子的形状。 当需要时，可以避免由于形成水平台阶部而导致的部件布局区域的增加，通过将部件部件上的端子引出位置向内移位，从而使喷射尺寸最小化。

公开(公告)号：US4730238A

公开(公告)日：1988-03-08

申请号：US914094

申请日：1986-10-01

Applicant: Carl R. Cook

Inventor： Carl R. Cook

IPC: H05K1/14 ,  H05K5/00 ,  H05K1/11

CPC classification number: H05K5/0091 ,  H05K1/144 ,  H05K2201/10924 ,  H05K2201/10946

Abstract: A multiple layer connection system for compactly connecting a plurality of surface mount integrated circuit packages to a printed circuit board is disclosed. A plurality of staggered metal legs is respectively inserted into a plurality of slots formed along an edge of an intermediate plastic sheet. A first outside sheet and a second outside sheet sandwich the intermediate sheet between themselves. The first outside sheet has a plurality of foil conductors formed on an inside layer thereof to connect with a first portion of the staggered legs. A plurality of feed through holes are in electrical connection with the first conductive traces and with a plurality of first outside foil traces which are connectable by soldering to the legs of a surface mount integrated circuit package. A second plurality of inside foil traces is formed on an inside layer of the second plastic sheet and contacts a second group of the legs. A second plurality of feed through holes connects the second plurality of inside foil to a second plurality of outside foil traces formed on an outside layer of the second sheet. A second integrated circuit surface mount device is connectable by soldering to the second plurality of outside conductive traces.

Abstract translation: 公开了一种用于将多个表面贴装集成电路封装紧凑连接到印刷电路板的多层连接系统。 多个交错的金属腿分别插入沿着中间塑料片的边缘形成的多个槽中。 第一外片和第二外片将中间片夹在它们之间。 第一外片具有形成在其内层上的多个箔导体，以与交错腿的第一部分连接。 多个馈通孔与第一导电迹线电连接，并且具有可通过焊接连接到表面安装集成电路封装的支腿的多个第一外部箔迹线。 第二多个内箔痕迹形成在第二塑料片的内层上并接触第二组腿。 第二多个进给通孔将第二多个内箔连接到形成在第二片的外层上的第二多个外箔痕迹。 第二集成电路表面安装器件可通过焊接连接到第二多个外部导电迹线。