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公开(公告)号：US20170044009A1
公开(公告)日：2017-02-16
申请号：US15339149
申请日：2016-10-31
Applicant: TEXAS INSTRUMENTS INCORPORATED
Inventor： Simon Joshua Jacobs
CPC classification number: B81C1/00317 , B81B3/0083 , B81B7/0067 , B81B2201/042 , B81B2207/015 , B81C1/00047 , B81C1/00119 , B81C1/00261 , B81C1/00269 , B81C1/00595 , B81C2201/014 , B81C2203/0109 , B81C2203/0118 , B81C2203/0127 , B81C2203/0145 , B81C2203/0735 , B81C2203/0771 , G02B1/115 , G02B26/0833
Abstract: For an optical electronic device and method that forms cavities through an interposer wafer after bonding the interposer wafer to a window wafer, the cavities are etched into the bonded interposer/window wafer pair using the anti-reflective coating of the window wafer as an etch stop. After formation of the cavities, the bonded interposer/window wafer pair is bonded peripherally of die areas to the MEMS device wafer, with die area micromechanical elements sealed within respectively corresponding ones of the cavities.
Abstract translation: 对于在将插入器晶片粘合到窗户晶片之后通过插入器晶片形成空腔的光学电子器件和方法，使用窗口晶片的抗反射涂层将空腔蚀刻到粘合的插入物/窗口晶片对中作为蚀刻停止 。 在形成空腔之后，结合的插入物/窗口晶片对在管芯区域周围被结合到MEMS器件晶片，其中管芯区域微机械元件分别密封在相应的一个空腔中。
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公开(公告)号：US20160355398A1
公开(公告)日：2016-12-08
申请号：US14731433
申请日：2015-06-05
Applicant: UNITED MICROELECTRONICS CORPORATION
Inventor： YAN-DA CHEN , WENG YI CHEN , CHANG-SHENG HSU , KUAN-YU WANG , YUAN SHENG LIN
CPC classification number: H01L21/02107 , B81B2207/015 , B81C1/00801 , B81C2201/014 , B81C2201/016
Abstract: Provided herein is a semiconductor device is provided. The semiconductor device includes a substrate including a MEMS region and a connection region thereon; a dielectric layer disposed on the substrate in the connection region; a poly-silicon layer disposed on the dielectric layer, wherein the poly-silicon layer serves as an etch-stop layer; a connection pad disposed on the poly-silicon layer; and a passivation layer covering the dielectric layer, wherein the passivation layer includes an opening that exposes the connection pad and a transition region between the connection pad and the passivation layer.
Abstract translation: 本文提供了一种半导体器件。 半导体器件包括：衬底，其包括MEMS区域及其上的连接区域; 设置在所述连接区域中的所述基板上的电介质层; 设置在所述电介质层上的多晶硅层，其中所述多晶硅层用作蚀刻停止层; 设置在所述多晶硅层上的连接焊盘; 以及覆盖所述电介质层的钝化层，其中所述钝化层包括暴露所述连接焊盘的开口和所述连接焊盘与所述钝化层之间的过渡区域。
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283.发明授权Method for forming MEMS structure with an etch stop layer buried within inter-dielectric layer 有权用埋置在介电层内的蚀刻停止层形成MEMS结构的方法公开(公告)号：US09499399B2
公开(公告)日：2016-11-22
申请号：US13917655
申请日：2013-06-14
Applicant: UNITED MICROELECTRONICS CORP.
Inventor： Li-Che Chen , Te-Yuan Wu , Chia-Huei Lin , Hui-Min Wu , Kun-Che Hsieh , Kuan-Yu Wang , Chung-Yi Chiu
IPC: B81C1/00 , H01L21/302 , H01L21/461
CPC classification number: B81B3/0075 , B81B2207/07 , B81C1/00246 , B81C1/00801 , B81C2201/014 , B81C2203/0714 , B81C2203/0735
Abstract: A method of forming a MEMS structure, in which an etch stop layer is formed to be buried within the inter-dielectric layer and, during an etch of the substrate and the inter-dielectric layer from backside to form a chamber, the etch stop layer protect the remaining inter-dielectric layer. The chamber thus formed has an opening at a backside of the substrate, a ceiling opposite to the opening, and a sidewall joining the ceiling. The sidewall may further include a portion of the etch stop layer.
Abstract translation: 一种形成MEMS结构的方法，其中形成蚀刻停止层以埋入介电层内，并且在从背面蚀刻基板和介电层之间形成室时，蚀刻停止层 保护剩余的介电层。 如此形成的室在基板的背面具有开口，与开口相对的天花板和连接天花板的侧壁。 侧壁还可包括蚀刻停止层的一部分。
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公开(公告)号：US20160257561A1
公开(公告)日：2016-09-08
申请号：US15049314
申请日：2016-02-22
Applicant: Honeywell International Inc.
Inventor： Carl Stewart , Richard Davis , Gilberto Morales
CPC classification number: B81C1/00158 , B81B3/0021 , B81B3/007 , B81B2201/0264 , B81B2203/0127 , B81C2201/014 , B81C2201/0198 , B81C2203/0728 , G01L7/08 , G01L9/0042 , G01L9/0044 , G01L9/0047 , G01L9/0054 , G01L9/0055
Abstract: A method includes forming a mask that defines a masked area and an unmasked area on a front side of a substrate, and implanting a buried layer corresponding to the unmasked area on the front side of the substrate. The method also includes forming an epitaxial layer having a back side on the front side of the substrate and on a front side of the buried layer, and creating an opening into a back side of the substrate up to a back side of the epitaxial layer and a back side of the one or portions of the buried layer.
Abstract translation: 一种方法包括形成掩模，其在衬底的正面上限定掩蔽区域和未掩蔽区域，以及在衬底的正面上注入对应于未掩模区域的掩埋层。 该方法还包括在衬底的正面和掩埋层的前侧上形成具有背面的外延层，并且在衬底的背面形成直到外延层的背面的开口，并且 掩埋层的一个或多个部分的背面。
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公开(公告)号：US20160137485A1
公开(公告)日：2016-05-19
申请号：US14201453
申请日：2014-03-07
Applicant: Robert Bosch GmbH
Inventor： Andrew Graham , Gary Yama , Gary O'Brien
CPC classification number: B81B3/0021 , B81B2201/0271 , B81B2203/04 , B81B2203/053 , B81C1/00095 , B81C1/00166 , B81C2201/0132 , B81C2201/014 , B81C2201/0177 , B81C2203/0136
Abstract: In one embodiment, a method of forming an out-of-plane electrode includes forming an oxide layer above an upper surface of a device layer, etching an etch stop perimeter defining trench extending through the oxide layer, forming a first cap layer portion on an upper surface of the oxide layer and within the etch stop perimeter defining trench, etching a first electrode perimeter defining trench extending through the first cap layer portion and stopping at the oxide layer, depositing a first material portion within the first electrode perimeter defining trench, depositing a second cap layer portion above the deposited first material portion, and vapor releasing a portion of the oxide layer with the etch stop portion providing a lateral etch stop.
Abstract translation: 在一个实施例中，形成平面外电极的方法包括在器件层的上表面上形成氧化物层，蚀刻限定延伸穿过氧化物层的沟槽的蚀刻停止周界，在第一帽层部分上形成 氧化物层的上表面，并且在蚀刻停止周界内限定沟槽，蚀刻延伸穿过第一盖层部分并停止在氧化物层处的第一电极周界，限定沟槽，在第一电极周界限定沟槽内沉积第一材料部分，沉积 在沉积的第一材料部分上方的第二盖层部分，以及用蚀刻停止部分提供横向蚀刻停止物的一部分氧化物层的蒸气。
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Patent Agency Ranking
286.发明授权Microfluidic devices for the generation of nano-vapor bubbles and their methods of manufacture and use 有权用于产生纳米气泡的微流体装置及其制造和使用方法公开(公告)号：US09139416B2
公开(公告)日：2015-09-22
申请号：US13828904
申请日：2013-03-14
Applicant: University of South Carolina
Inventor： Chen Li , Fanghao Yang , Xianming Dai , Yan Tong
CPC classification number: B01L3/502707 , B01J19/0093 , B01J2219/00783 , B01J2219/00828 , B01J2219/00835 , B01J2219/00846 , B01J2219/0086 , B01L3/502715 , B01L2200/12 , B01L2300/0858 , B01L2300/12 , B81B1/00 , B81B7/0087 , B81B2201/058 , B81B2203/033 , B81B2203/0361 , B81C1/00031 , B81C1/00111 , B81C1/00119 , B81C1/00206 , B81C2201/014 , Y10T137/0318 , Y10T428/24496
Abstract: Microfluidic devices having superhydrophilic bi-porous interfaces are provided, along with their methods of formation. The device can include a substrate defining a microchannel formed between a pair of side walls and a bottom surface and a plurality of nanowires extending from each of the side walls and the bottom surface. For example, the nanowires can be silicon nanowires (e.g., pure silicon, silicon oxide, silicon carbide, etc., or mixtures thereof).
Abstract translation: 提供了具有超亲水双孔界面的微流体装置及其形成方法。 该装置可以包括限定形成在一对侧壁和底表面之间的微通道的衬底和从每个侧壁和底表面延伸的多个纳米线。 例如，纳米线可以是硅纳米线（例如，纯硅，氧化硅，碳化硅等，或其混合物）。
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287.发明申请MICRO-ELECTRO-MECHANICAL-SYSTEM DEVICE WITH GUARD RING AND METHOD FOR MAKING SAME 审中-公开具有护环的微电子机械系统装置及其制造方法公开(公告)号：US20150197420A1
公开(公告)日：2015-07-16
申请号：US14670766
申请日：2015-03-27
Applicant: Hsin Hui Hsu , Sheng Ta Lee , Chuan Wei Wang
Inventor： Hsin Hui Hsu , Sheng Ta Lee , Chuan Wei Wang
IPC: B81C1/00
CPC classification number: B81C1/00698 , B81C1/00571 , B81C2201/014 , B81C2203/0109 , H01L23/585 , H01L41/0472 , H01L41/1132 , H01L2924/0002 , H01L2924/3025 , H01L2924/00
Abstract: The present invention discloses a MEMS device with guard ring, and a method for making the MEMS device. The MEMS device comprises a bond pad and a sidewall surrounding and connecting with the bond pad, characterized in that the sidewall forms a guard ring by an etch-resistive material.
Abstract translation: 本发明公开了一种具有保护环的MEMS器件及其制造方法。 MEMS器件包括接合焊盘和围绕并与接合焊盘连接的侧壁，其特征在于，所述侧壁通过耐蚀刻材料形成保护环。
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公开(公告)号：US08975104B2
公开(公告)日：2015-03-10
申请号：US14185160
申请日：2014-02-20
Inventor： Mourad El-Gamal , Frederic Nabki , Paul-Vahe Cicek
CPC classification number: B81C1/00666 , B81B3/0021 , B81B7/008 , B81B2201/01 , B81B2201/0235 , B81B2201/0271 , B81B2201/03 , B81B2207/015 , B81B2207/03 , B81C1/00063 , B81C1/00246 , B81C1/00396 , B81C1/00587 , B81C2201/014 , B81C2201/0169 , B81C2201/0174 , B81C2203/0721 , B81C2203/0735
Abstract: A method of providing microelectromechanical structures (MEMS) that are compatible with silicon CMOS electronics is provided. The method providing for processes and manufacturing sequences limiting the maximum exposure of an integrated circuit upon which the MEMS is manufactured to below 350° C., and potentially to below 250° C., thereby allowing direct manufacturing of the MEMS devices onto electronics, such as Si CMOS circuits. The method further providing for the provisioning of MEMS devices with multiple non-conductive structural layers such as silicon carbide separated with small lateral gaps. Such silicon carbide structures offering enhanced material properties, increased environmental and chemical resilience while also allowing novel designs to be implemented taking advantage of the non-conductive material of the structural layer. The use of silicon carbide being beneficial within the formation of MEMS elements such as motors, gears, rotors, translation drives, etc where increased hardness reduces wear of such elements during operation.
Abstract translation: 提供了一种提供与硅CMOS电子器件兼容的微机电结构（MEMS）的方法。 该方法提供了将MEMS制造的集成电路的最大曝光限制在低于350℃并可能低于250℃的工艺和制造顺序，从而允许将MEMS器件直接制造到电子器件上，例如 作为Si CMOS电路。 该方法进一步提供具有多个非导电结构层的MEMS器件，例如用小的侧向间隙分离的碳化硅。 这种碳化硅结构提供了增强的材料性能，增加了环境和化学弹性，同时还允许利用结构层的非导电材料实现新颖的设计。 在形成MEMS元件（例如马达，齿轮，转子，平移驱动器等）中使用碳化硅是有益的，其中增加的硬度降低了操作期间这些元件的磨损。
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公开(公告)号：US20150031161A1
公开(公告)日：2015-01-29
申请号：US14514356
申请日：2014-10-14
Applicant: SAMSUNG ELECTRO-MECHANICS CO., LTD.
Inventor： Jong Woon Kim , Won Kyu Jeung
IPC: B81C1/00
CPC classification number: B81C1/00158 , B81B3/0062 , B81B3/007 , B81B2201/0235 , B81B2203/053 , B81C1/00484 , B81C1/00531 , B81C1/00539 , B81C1/00571 , B81C2201/01 , B81C2201/0132 , B81C2201/0133 , B81C2201/014 , C09K13/00 , C09K13/08 , G01C19/56 , G01P15/0802 , G01P15/0922 , G01P15/18 , G01P2015/084 , G01P2015/0871
Abstract: Disclosed herein an inertial sensor and a method of manufacturing the same. An inertial sensor 100 according to a preferred embodiment of the present invention is configured to include a plate-shaped membrane 110, a mass body 120 that includes an adhesive part 123 disposed under a central portion 113 of the membrane 110 and provided at the central portion thereof and a patterning part 125 provided at an outer side of the adhesive part 123 and patterned to vertically penetrate therethrough, and a first adhesive layer 130 that is formed between the membrane 110 and the adhesive part 123 and is provided at an inner side of the patterning part 125. An area of the first adhesive layer 130 is narrow by isotropic etching using the patterning part 125 as a mask, thereby making it possible to improve sensitivity of the inertial sensor 100.
Abstract translation: 本文公开了一种惯性传感器及其制造方法。 根据本发明的优选实施例的惯性传感器100被配置为包括板状膜110，质量体120，其包括设置在膜110的中心部分113下方并设置在中心部分处的粘合部123 以及设置在粘合部123的外侧并被图案化以垂直贯穿其中的图案形成部分125，以及形成在膜110和粘合部123之间的第一粘合层130，并且设置在第一粘合层130的内侧 图形部分125.通过使用图案形成部分125作为掩模的各向同性蚀刻，第一粘合剂层130的区域变窄，从而可以提高惯性传感器100的灵敏度。
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公开(公告)号：US20140367805A1
公开(公告)日：2014-12-18
申请号：US13917655
申请日：2013-06-14
Applicant: United Microelectronics Corp.
Inventor： Li-Che Chen , Te-Yuan Wu , Chia-Huei Lin , Hui-Min Wu , Kun-Che Hsieh , Kuan-Yu Wang , Chung-Yi Chiu
IPC: B81C1/00
CPC classification number: B81B3/0075 , B81B2207/07 , B81C1/00246 , B81C1/00801 , B81C2201/014 , B81C2203/0714 , B81C2203/0735
Abstract: A method of forming a MEMS structure, in which an etch stop layer is formed to be buried within the inter-dielectric layer and, during an etch of the substrate and the inter-dielectric layer from backside to form a chamber, the etch stop layer protect the remaining inter-dielectric layer. The chamber thus formed has an opening at a backside of the substrate, a ceiling opposite to the opening, and a sidewall joining the ceiling. The sidewall may further include a portion of the etch stop layer.
Abstract translation: 一种形成MEMS结构的方法，其中形成蚀刻停止层以埋入介电层内，并且在从背面蚀刻基板和介电层之间形成室时，蚀刻停止层 保护剩余的介电层。 如此形成的室在基板的背面具有开口，与开口相对的天花板和连接天花板的侧壁。 侧壁还可包括蚀刻停止层的一部分。
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