公开(公告)号：US20240283460A1

公开(公告)日：2024-08-22

申请号：US18171211

申请日：2023-02-17

Applicant: OMNIVISION TECHNOLOGIES, INC.

Inventor： Rui Wang ,  Hiroaki Ebihara

IPC: H03M1/00 ,  H03M1/18 ,  H03M1/36 ,  H04N25/77 ,  H04N25/78

CPC classification number: H03M1/002 ,  H03M1/18 ,  H03M1/36 ,  H04N25/77 ,  H04N25/78

Abstract: A pixel cell readout circuit comprises a ramp generator having a ramp generator output. A first gain network is coupled to the ramp generator output and configured to provide a first variable comparator gain. A second gain network is coupled to the ramp generator output and configured to provide a second variable comparator gain. A first comparator has a first input coupled to the first gain network. The first comparator further has a second input selectively coupled to a first bitline and selectively coupled to a second bitline. A second comparator has a first input coupled to the second gain network. The second comparator further has a second input selectively coupled to the first bitline and selectively coupled to the second bitline.

公开(公告)号：US20240241357A1

公开(公告)日：2024-07-18

申请号：US18098652

申请日：2023-01-18

Applicant: OmniVision Technologies, Inc.

Inventor： I-Lung LU ,  Kuang-Ju WANG ,  Jau-Jan DENG

IPC: G02B15/177 ,  G02B13/18

CPC classification number: G02B15/177 ,  G02B13/18

Abstract: A compound lens includes four coaxially aligned lenses: (i) first lens and, in order of increasing distance therefrom, and on a same side thereof, (ii) a second lens, an inter-lens substrate, a third lens, and a fourth lens. The first lens and the third lens are negative lenses. The second lens and the fourth lens are positive lenses.

公开(公告)号：US20240178260A1

公开(公告)日：2024-05-30

申请号：US18434974

申请日：2024-02-07

Applicant: OMNIVISION TECHNOLOGIES, INC.

Inventor： Sing-Chung Hu

IPC: H01L27/146 ,  H01L23/467 ,  H01L31/024

CPC classification number: H01L27/14636 ,  H01L23/467 ,  H01L27/14634 ,  H01L27/1469 ,  H01L31/024

Abstract: Image sensors include a pixel die that is stacked on a logic die. The logic die includes at least one function logic element disposed on a bond side thereof, and a logic oxide array of raised logic oxide features also disposed on the bond side. The pixel die includes a pixel array disposed on a light receiving side thereof, and a pixel oxide array of raised pixel oxide features disposed on a bond side of the pixel die. A plurality of outer bonds is disposed between an outer region of the logic die and an outer region of the pixel die. A plurality of inner bonds is formed at an inner region of the image sensor between the pixel oxide array and the logic oxide array, the inner bonds being spaced apart by a plurality of fluidly connected air gaps that extend between the logic die and the pixel die.

公开(公告)号：US11991465B2

公开(公告)日：2024-05-21

申请号：US17815526

申请日：2022-07-27

Applicant: OMNIVISION TECHNOLOGIES, INC.

Inventor： Andreas Suess ,  Shoushun Chen

IPC: H04N25/709 ,  H04N25/50 ,  H04N25/74 ,  H04N25/778

CPC classification number: H04N25/709 ,  H04N25/50 ,  H04N25/74 ,  H04N25/778

Abstract: Low power event driven pixels with passive, differential difference detection circuitry (and reset control circuits for the same) are disclosed herein. In one embodiment, an event driven pixel comprises a photosensor, a photocurrent-to-voltage converter, and a difference circuit. The difference circuit includes (a) a first circuit branch configured to sample a reference light level based on a voltage output by the photocurrent-to-voltage converter, and to output a first analog light level onto a first column line that is based on the reference light level; and (b) a second circuit branch configured to sample a light level based on the voltage, and to output a second analog light level onto a second column line that is based on the light level. A difference between the second analog light level and the first analog light level indicates whether the event driven pixel has detected an event in an external scene.

公开(公告)号：US11984464B2

公开(公告)日：2024-05-14

申请号：US16946842

申请日：2020-07-08

Applicant: OmniVision Technologies, Inc.

Inventor： Seong Yeol Mun ,  Yuanliang Liu

IPC: H01L27/146 ,  H01L21/762

CPC classification number: H01L27/1463 ,  H01L21/76224 ,  H01L27/14605 ,  H01L27/14607 ,  H01L27/14616 ,  H01L27/1464 ,  H01L27/14643

Abstract: Examples of the disclosed subject matter propose disposing trench isolation structure around the perimeter of the pixel transistor region of the pixel cell. The trench isolation structure includes front side (e.g., shallow and deep) trench isolation structure and back side deep trench isolation structure that abut against or contacts the bottom of front side deep trench isolation structure for isolating the pixel transistor channel of the pixel cell's pixel transistor region. The formation and arrangement of the trench isolation structure in the pixel transistor region forms a floating doped well region, containing, for example, a floating diffusion (FD) and source/drains (e.g., (N) doped regions) of the pixel transistors. This floating P-well region aims to reduce junction leakage associated with the floating diffusion region of the pixel cell.

公开(公告)号：US20240122461A1

公开(公告)日：2024-04-18

申请号：US17965358

申请日：2022-10-13

Applicant: OmniVision Technologies, Inc.

Inventor： Paul Wickboldt

IPC: A61B1/06 ,  A61B1/00 ,  A61B1/045

CPC classification number: A61B1/0638 ,  A61B1/000095 ,  A61B1/045 ,  A61B1/0655 ,  A61B1/0684 ,  A61B1/0002 ,  A61B1/00186

Abstract: A multi-band imager includes a first light source that illuminates an area of interest during a first time period and a second light source that illuminates the area of interest during a second time period, the second light source comprising a multi-band pass filter, an image sensor capturing first and second images during the first and second time periods. An enhanced image of the area of interest is generated by combining the first image and the second image.

公开(公告)号：US20240114258A1

公开(公告)日：2024-04-04

申请号：US17957451

申请日：2022-09-30

Applicant: OMNIVISION TECHNOLOGIES, INC.

Inventor： Keiji Mabuchi

IPC: H04N5/378 ,  H04N5/33 ,  H04N9/04

CPC classification number: H04N5/378 ,  H04N5/33 ,  H04N9/045

Abstract: A method of operating an imaging system is described. The method comprising transferring first image charges accumulated during a long exposure period of a first image frame to respective floating diffusion regions of a first pixel and a second pixel, reading out long exposure image signals from the respective floating diffusion regions to a first storage capacitor associated with the first pixel and a second storage capacitor associated with the second pixel, transferring second image charges accumulated during a short exposure period of the first image frame to the respective floating diffusion regions of the first pixel and the second pixel, reading out a short exposure image signal from a corresponding one of the floating diffusion regions to the second storage capacitor, and reading out storage charge signals from the first storage capacitor and the second storage capacitor to generate image data for the first image frame.

公开(公告)号：US11948965B2

公开(公告)日：2024-04-02

申请号：US17220695

申请日：2021-04-01

Applicant: OmniVision Technologies, Inc.

Inventor： Hui Zang ,  Gang Chen

IPC: H01L27/146 ,  H01L27/148 ,  H01L29/423

CPC classification number: H01L27/14643 ,  H01L27/14683 ,  H01L27/14831 ,  H01L27/14887 ,  H01L29/4236

Abstract: An uneven-trench pixel cell includes a semiconductor substrate that includes a floating diffusion region, a photodiode region, and, between a front surface and a back surface: a first sidewall surface, a shallow bottom surface, a second sidewall surface, and a deep bottom surface. The first sidewall surface and a shallow bottom surface define a shallow trench, located between the floating diffusion region and the photodiode region, that extends into the semiconductor substrate from the front surface. A shallow depth of the shallow trench exceeds a junction depth of the floating diffusion region. The second sidewall surface and a deep bottom surface define a deep trench, located between the floating diffusion region and the photodiode region, that extends into the semiconductor substrate from the front surface. A distance between the deep bottom surface and the front surface defines a deep depth, of the deep trench, that exceeds the shallow depth.

公开(公告)号：US20240089639A1

公开(公告)日：2024-03-14

申请号：US17940872

申请日：2022-09-08

Applicant: OmniVision Technologies, Inc.

Inventor： Liang ZUO ,  Zhenfu TIAN ,  Jiayu GUO ,  Dennis LEE ,  Zhiqiang SONG

IPC: H04N5/369 ,  H04N5/367 ,  H04N5/378

CPC classification number: H04N5/379 ,  H04N5/367 ,  H04N5/378

Abstract: A global shutter image sensor with improved pixel failure coverage detects failures caused by the pixel chip of the image sensor. The global shutter image sensor includes a pixel chip including an array of photodiodes and associated logic, and a logic chip, bonded to the pixel chip, including an array of logic blocks for processing the images detected by the photodiodes. A failure detection circuit coupled to a reference voltage node of the image sensor detects a failure in the pixel chip by capturing a first level of pixel bias current and a second level of pixel bias current wherein a difference between the first level and the second level drives an output of the failure detection circuit either as logic high or as logic low.

公开(公告)号：US20240073556A1

公开(公告)日：2024-02-29

申请号：US18451754

申请日：2023-08-17

Applicant: OMNIVISION TECHNOLOGIES, INC.

Inventor： Andreas Suess ,  Tomas Geurts

IPC: H04N25/67 ,  H04N25/616 ,  H04N25/706 ,  H04N25/709 ,  H04N25/76 ,  H04N25/78

CPC classification number: H04N25/67 ,  H04N25/616 ,  H04N25/706 ,  H04N25/709 ,  H04N25/7795 ,  H04N25/78

Abstract: Fixed pattern noise (FPN) reduction techniques in image sensors operated with pulse illumination are disclosed herein. In one embodiment, a method includes, during a first sub-exposure period of a frame, (a) operating a first tap of a pixel to capture a first signal corresponding to first charge at a first floating diffusion, the first charge corresponding to first light incident on a photosensor, and (b) operating a second tap of the pixel to capture a first parasitic signal corresponding to FPN at a second floating diffusion. The method further includes, during a second sub-exposure period of the frame, (a) operating the second tap to capture a second signal corresponding to second charge at the second floating diffusion, the second charge corresponding to second light incident on the photosensor, and (b) operating the first tap to capture a second parasitic signal corresponding to FPN at the first floating diffusion.