公开(公告)号：US20180323059A1

公开(公告)日：2018-11-08

申请号：US15957565

申请日：2018-04-19

Applicant: ASM IP Holding B.V.

Inventor： Nupur Bhargava ,  John Tolle ,  Joe Margetis ,  Matthew Goodman ,  Robert Vyne

IPC: H01L21/02 ,  H01L29/66 ,  C30B25/10 ,  C30B29/10

CPC classification number: H01L21/0262 ,  C30B25/02 ,  C30B25/10 ,  C30B29/06 ,  C30B29/10 ,  C30B29/52 ,  H01L21/02532 ,  H01L21/02535 ,  H01L21/02573 ,  H01L21/02576 ,  H01L21/02579 ,  H01L29/66795

Abstract: A method for forming a silicon-containing epitaxial layer is disclosed. The method may include, heating a substrate to a temperature of less than approximately 950° C. and exposing the substrate to a first silicon source comprising a hydrogenated silicon source, a second silicon source, a dopant source, and a halogen source. The method may also include depositing a silicon-containing epitaxial layer wherein the dopant concentration within the silicon-containing epitaxial layer is greater than 3×1021 atoms per cubic centimeter.

公开(公告)号：US20170278707A1

公开(公告)日：2017-09-28

申请号：US15450199

申请日：2017-03-06

Applicant: ASM IP Holding B.V.

Inventor： Joe Margetis ,  John Tolle ,  Gregory Bartlett ,  Nupur Bhargava

IPC: H01L21/02 ,  C23C16/455

CPC classification number: H01L21/02636 ,  C23C16/24 ,  C23C16/455 ,  C23C16/45514 ,  C23C16/45574 ,  H01L21/02529 ,  H01L21/02532 ,  H01L21/02535 ,  H01L21/02576 ,  H01L21/02579 ,  H01L21/0262

Abstract: A gas distribution system is disclosed in order to obtain better film uniformity on a substrate in a cross-flow reactor. The better film uniformity may be achieved by an asymmetric bias on individual injection ports of the gas distribution system. The gas distribution may allow for varied tunability of the film properties.

公开(公告)号：US20170154770A1

公开(公告)日：2017-06-01

申请号：US14956115

申请日：2015-12-01

Applicant: ASM IP Holding B.V.

Inventor： Joe Margetis ,  John Tolle

IPC: H01L21/02 ,  H01L29/165 ,  H01L29/161

CPC classification number: H01L21/02535 ,  H01L21/0245 ,  H01L21/02452 ,  H01L21/02505 ,  H01L21/02532 ,  H01L21/0262 ,  H01L21/02636 ,  H01L29/161 ,  H01L29/165

Abstract: Methods of forming silicon germanium tin (SiGexGe1−xSny) films are disclosed. Exemplary methods include growing films including silicon, germanium and tin in an epitaxial chemical vapor deposition reactor. Exemplary methods are suitable for high volume manufacturing. Also disclosed are structures and devices including silicon germanium tin films.

公开(公告)号：US20170047446A1

公开(公告)日：2017-02-16

申请号：US14827177

申请日：2015-08-14

Applicant: ASM IP Holding B.V.

Inventor： Joe Margetis ,  John Tolle

IPC: H01L29/78 ,  C23C16/455 ,  H01L29/167 ,  H01L29/08 ,  H01L21/02 ,  H01L29/161

CPC classification number: C23C16/455 ,  C23C16/0272 ,  C23C16/30 ,  C23C16/45512 ,  C30B25/02 ,  C30B29/52 ,  H01L21/02532 ,  H01L21/02535 ,  H01L21/02576 ,  H01L21/02579 ,  H01L21/0262 ,  H01L29/167

Abstract: Methods of forming p-type doped germanium-tin layers, systems for forming the p-type doped germanium-tin layers, and structures including the p-type doped germanium-tin layers are disclosed. The p-type doped germanium-tin layers include an n-type dopant, which allows relatively high levels of tin and/or p-type dopant to be included into the p-type doped germanium-tin layers.

Abstract translation: 公开了形成p型掺杂锗 - 锡层的方法，用于形成p型掺杂锗 - 锡层的系统，以及包括p型掺杂锗 - 锡层的结构。 p型掺杂的锗 - 锡层包括n型掺杂剂，其允许相对高水平的锡和/或p型掺杂剂包含在p型掺杂的锗 - 锡层中。

公开(公告)号：US20240332016A1

公开(公告)日：2024-10-03

申请号：US18742250

申请日：2024-06-13

Applicant: ASM IP Holding B.V.

Inventor： Amir Kajbafvala ,  Peter Westrom ,  Joe Margetis ,  Xin Sun ,  Caleb Miskin ,  Yen Lin Leow ,  Yanfu Lu

IPC: H01L21/02 ,  C23C16/08 ,  C23C16/455 ,  C23C16/52 ,  C30B25/16 ,  C30B25/18 ,  C30B29/52

CPC classification number: H01L21/0262 ,  C23C16/08 ,  C23C16/45512 ,  C23C16/52 ,  C30B25/165 ,  C30B25/186 ,  C30B29/52 ,  H01L21/02532

Abstract: A method of forming a silicon germanium layer on a surface of a substrate and a system for forming a silicon germanium layer are disclosed. Examples of the disclosure provide a method that includes providing a plurality of growth precursors to control and/or promote parasitic gas-phase and surface reactions, such that greater control of the film (e.g., thickness and/or composition) uniformity can be realized.

公开(公告)号：US20240274437A1

公开(公告)日：2024-08-15

申请号：US18644475

申请日：2024-04-24

Applicant: ASM IP Holding B.V.

Inventor： Amir Kajbafvala ,  Joe Margetis ,  Xin Sun ,  David Kohen ,  Dieter Pierreux

IPC: H01L21/02 ,  C23C16/08 ,  C23C16/24 ,  C23C16/42 ,  C23C16/455 ,  C23C16/52 ,  C30B25/16 ,  C30B25/18 ,  C30B29/06 ,  C30B29/52 ,  H01L29/06 ,  H01L29/423 ,  H01L29/786

CPC classification number: H01L21/0262 ,  C23C16/08 ,  C23C16/24 ,  C23C16/42 ,  C23C16/45523 ,  C23C16/52 ,  C30B25/165 ,  C30B25/18 ,  C30B29/06 ,  C30B29/52 ,  H01L21/02507 ,  H01L21/02532 ,  H01L21/02576 ,  H01L21/02579 ,  H01L21/02603 ,  H01L29/0673 ,  H01L29/42392 ,  H01L29/78696

Abstract: Methods and systems for forming structures including one or more layers comprising silicon germanium and one or more layers comprising silicon are disclosed. Exemplary methods can include using a surfactant, using particular precursors, and/or using a transition step to improve an interface between adjacent layers comprising silicon germanium and comprising silicon.

公开(公告)号：US20230145240A1

公开(公告)日：2023-05-11

申请号：US18147916

申请日：2022-12-29

Applicant: ASM IP Holding B.V.

Inventor： John Tolle ,  Joe Margetis ,  David Kohen

IPC: H01L21/02 ,  H01L29/08 ,  H01L29/66 ,  C23C16/458 ,  C23C16/02 ,  C23C16/30 ,  C23C16/52 ,  C23C16/22 ,  C23C16/44 ,  C23C16/46 ,  C23C16/455

CPC classification number: H01L21/02576 ,  H01L21/02661 ,  H01L29/0847 ,  H01L29/66795 ,  H01L21/02532 ,  C23C16/4583 ,  C23C16/0227 ,  C23C16/30 ,  H01L21/02639 ,  C23C16/52 ,  C23C16/22 ,  C23C16/44 ,  C23C16/46 ,  C23C16/0209 ,  C23C16/455 ,  H01L21/0262 ,  H01L21/02609

Abstract: A method for forming a doped layer is disclosed. The doped layer may be used in a NMOS or a silicon germanium application. The doped layer may be created using an n-type halide species in a n-type dopant application, for example.

公开(公告)号：US11004977B2

公开(公告)日：2021-05-11

申请号：US16679885

申请日：2019-11-11

Applicant: ASM IP Holding B.V.

Inventor： John Tolle ,  Joe Margetis

IPC: H01L29/78 ,  H01L21/02 ,  H01L29/167 ,  H01L29/36 ,  H01L29/165 ,  H01L29/08 ,  H01L29/45 ,  H01L29/66

Abstract: A method for depositing a Group IV semiconductor on a surface of a substrate is disclosed. The method may include: providing a substrate within a reaction chamber and heating the substrate to a deposition temperature. The methods may further include: exposing the substrate to at least one Group IV precursor and exposing the substrate to at least one Group IIIA dopant precursor; wherein the at least one Group IIIA dopant precursor comprises a borohydride, an organic borohydride, a halide, or an organohalide. Semiconductor device structures including a Group IV semiconductor deposited by the methods of the disclosure are also provided.

公开(公告)号：US20210035802A1

公开(公告)日：2021-02-04

申请号：US16932275

申请日：2020-07-17

Applicant: ASM IP Holding B.V.

Inventor： John Tolle ,  Joe Margetis ,  David Kohen

IPC: H01L21/02 ,  H01L29/08 ,  H01L29/66 ,  C23C16/458 ,  C23C16/02 ,  C23C16/30

Abstract: A method for forming a doped layer is disclosed. The doped layer may be used in a NMOS or a silicon germanium application. The doped layer may be created using an n-type halide species in a n-type dopant application, for example.

公开(公告)号：US10685834B2

公开(公告)日：2020-06-16

申请号：US15985261

申请日：2018-05-21

Applicant: ASM IP Holding B.V.

Inventor： Nupur Bhargava ,  Joe Margetis ,  John Tolle

IPC: H01L21/02 ,  C23C16/40 ,  C23C16/02 ,  C23C16/14 ,  C23C16/28 ,  C23C16/455 ,  C23C16/24

Abstract: A method for forming a forming a silicon germanium tin (SiGeSn) layer is disclosed. The method may include, providing a substrate within a reaction chamber, exposing the substrate to a pre-deposition precursor pulse, which comprises tin tetrachloride (SnCl4), exposing the substrate to a deposition precursor gas mixture comprising a hydrogenated silicon source, germane (GeH4), and tin tetrachloride (SnCl4), and depositing the silicon germanium tin (SiGeSn) layer over a surface of the substrate. Semiconductor device structures including a silicon germanium tin (SiGeSn) layer formed by the methods of the disclosure are also provided.