公开(公告)号：US5489988A

公开(公告)日：1996-02-06

申请号：US368502

申请日：1995-01-03

申请人： Donald E. Ackley ,  Michael Krihak ,  Chan-Long Shieh

发明人： Donald E. Ackley ,  Michael Krihak ,  Chan-Long Shieh

IPC分类号： G01N21/78 ,  G02B6/13 ,  G02B6/26 ,  G02B6/30 ,  G02B6/36 ,  G02B6/42 ,  G01N21/00 ,  G02B6/00

CPC分类号： G01N21/783 ,  G02B6/13 ,  G02B6/262 ,  G02B6/30 ,  G02B6/4214

摘要： A sensor (10,30,40,50,70) for detecting chemicals and changes in the surrounding environment utilizes a sol-gel sensor element (14,16,17,54,56,57) containing a chemical indicator. Grooves (12,13,24,52,53) are formed in a substrate (11,51). The grooves are filled with a sol-gel material having a chemical indicator, and the sol-gel is cured to adhere to the substrate (11,51). The grooves (12,13,24,52,53) are formed to facilitate optically coupling a fiber optic cable (46) to the sol-gel sensor element. Light is coupled from the fiber optic cable (46) to the sol-gel sensor element (14,16,17,54,56,57).

摘要翻译： 用于检测化学物质和周围环境变化的传感器（10,30,40,50,70）利用含有化学指示剂的溶胶 - 凝胶传感器元件（14,16,17,54,56,57）。 沟槽（12,13,24,52,53）形成在衬底（11,51）中。 用具有化学指示剂的溶胶 - 凝胶材料填充凹槽，并且溶胶 - 凝胶固化以粘附到基底（11,51）上。 凹槽（12,13,24,52,53）形成为便于将光纤电缆（46）光学耦合到溶胶 - 凝胶传感器元件。 光从光纤电缆（46）耦合到溶胶 - 凝胶传感器元件（14,16,17,54,56,57）。

公开(公告)号：US5478774A

公开(公告)日：1995-12-26

申请号：US261276

申请日：1994-06-15

申请人： Donald E. Ackley ,  Piotr Grodzinski ,  Michael S. Lebby ,  Hsing-Chung Lee ,  Chan-Long Shieh

发明人： Donald E. Ackley ,  Piotr Grodzinski ,  Michael S. Lebby ,  Hsing-Chung Lee ,  Chan-Long Shieh

IPC分类号： H01S5/00 ,  H01S5/042 ,  H01S5/183 ,  H01S5/22 ,  H01L21/20

CPC分类号： H01S5/18308 ,  H01S5/18305 ,  H01S5/18327 ,  H01S5/2214 ,  Y10S438/969

摘要： A method of fabricating VCSELs including the steps of epitaxially growing a first mirror stack of a first conductivity type, an active region on the first mirror stack, and a first portion of a second mirror stack of a second conductivity type on the active region. A dielectric layer is then formed on the first portion of the second mirror stack, patterned to define an operating region and a remaining portion of the second mirror stack is epitaxially grown on the first portion to form a complete second mirror stack. Portions of the second mirror stack overlying the dielectric layer are polycrystalline in formation and substantially limit the remaining portion of the second mirror stack to the operating region. The polycrystalline layers can then be removed and electrical contacts formed.

摘要翻译： 一种制造VCSEL的方法，包括以下步骤：在有源区上外延生长第一导电类型的第一反射镜叠层，第一反射镜叠层上的有源区和第二导电类型的第二反射镜叠层的第一部分。 然后在第二反射镜叠层的第一部分上形成电介质层，其被图案化以限定操作区域，并且在第一部分上外延生长第二反射镜叠层的剩余部分以形成完整的第二反射镜叠层。 覆盖在介电层上的第二反射镜叠层的部分在形成时是多晶的，并且基本上将第二反射镜叠层的剩余部分限制到操作区域。 然后可以去除多晶层并形成电接触。

公开(公告)号：US5331658A

公开(公告)日：1994-07-19

申请号：US935307

申请日：1992-08-26

申请人： Chan-Long Shieh ,  Donald E. Ackley

发明人： Chan-Long Shieh ,  Donald E. Ackley

IPC分类号： G01D5/26 ,  H01S5/026 ,  H01S5/028 ,  H01S5/06 ,  H01S5/183 ,  H01S3/19

CPC分类号： H01S5/18377 ,  G01D5/26 ,  H01S5/0607 ,  H01S5/0028 ,  H01S5/0264 ,  H01S5/18308 ,  H01S5/18363 ,  H01S5/18366 ,  H01S5/18375 ,  H01S5/2063

摘要： A vertical cavity surface emitting laser (VCSEL) having sensing capabilities is fabricated by forming a layer having the capability to change the threshold current of the VCSEL. This can be accomplished by forming a deformable membrane or a cantilevered beam on the VCSEL. The deformation of movement of the beam causes a change in the threshold current of the VCSEL, so that it can go from lasing to nonlasing or vice versa. In addition, a layer which changes reflectivity in the presence of a particular chemical can also be formed on the VCSEL to produce the same result.

摘要翻译： 通过形成具有改变VCSEL的阈值电流的能力的层来制造具有感测能力的垂直腔表面发射激光器（VCSEL）。 这可以通过在VCSEL上形成可变形膜或悬臂梁来实现。 光束的运动变形引起VCSEL的阈值电流的变化，从而可以从激光发射到非激光，反之亦然。 此外，还可以在VCSEL上形成在特定化学品存在下改变反射率的层，以产生相同的结果。

公开(公告)号：US5317587A

公开(公告)日：1994-05-31

申请号：US925139

申请日：1992-08-06

申请人： Donald E. Ackley ,  Chan-Long Shieh

发明人： Donald E. Ackley ,  Chan-Long Shieh

IPC分类号： H01S5/00 ,  H01S5/028 ,  H01S5/042 ,  H01S5/183 ,  H01S5/323 ,  H01S3/19

CPC分类号： H01S5/18344 ,  H01S2301/166 ,  H01S5/0425 ,  H01S5/18391 ,  H01S5/18394

摘要： A VCSEL formed on a substrate with an upper mirror stack etched to form a mesa shaped area with material positioned on the upper mirror stack including optically transparent, electrically conductive material defining an electrical contact window to control current distribution within the laser, and material positioned on the surface of the mesa shaped area with an optical thickness selected to provide a desired mirror reflectivity profile which controls the optical mode independently of the mesa edges, thereby, providing separate control of the current and the optical mode.

摘要翻译： VCSEL形成在具有上反射镜堆叠的衬底上，其被蚀刻以形成台面形状区域，其中材料位于上反射镜堆叠上，包括光学透明的导电材料，其限定电接触窗口以控制激光器内的电流分布，以及位于 选择具有光学厚度的台面形区域的表面以提供独立于台面边缘来控制光学模式的期望的镜面反射率分布，从而提供对电流和光学模式的单独控制。

公开(公告)号：US5256596A

公开(公告)日：1993-10-26

申请号：US857877

申请日：1992-03-26

申请人： Donald E. Ackley ,  Chan-Long Shieh

发明人： Donald E. Ackley ,  Chan-Long Shieh

IPC分类号： H01S5/00 ,  H01S5/042 ,  H01S5/183 ,  H01S5/20 ,  H01L21/20

CPC分类号： H01S5/18308 ,  H01S5/2063

摘要： VCSELs including a central active layer with upper and lower mirror stacks wherein a circular trench is formed in one mirror stack to define a lasing area. The trench reduces reflectivity to prevent lasing outside the operating area and a deep beryllium implant in either of the mirror stacks, along with the trench, confines current distribution to maximize power output and efficiency. A transparent metal contact is used as a top contact in one embodiment.

摘要翻译： VCSEL包括具有上反射镜和下反射镜叠层的中心活性层，其中在一个反射镜叠层中形成圆形沟槽以限定激光区域。 沟槽减少了反射率，以防止在工作区域外发生激光，并且任何一个反射镜堆叠中的深铍植入物与沟槽一起限制电流分布以最大化功率输出和效率。 在一个实施例中，透明金属接触件用作顶部接触件。

公开(公告)号：US09911857B2

公开(公告)日：2018-03-06

申请号：US12915712

申请日：2010-10-29

申请人： Chan-Long Shieh ,  Fatt Foong ,  Gang Yu

发明人： Chan-Long Shieh ,  Fatt Foong ,  Gang Yu

IPC分类号： H01L29/786

CPC分类号： H01L29/7869 ,  H01L29/78696

摘要： A metal oxide semiconductor device including an active layer of metal oxide, a layer of gate dielectric, and a layer of low trap density material. The layer of low trap density material is sandwiched between the active layer of metal oxide and the layer of gate dielectric. The layer of low trap density material has a major surface parallel and in contact with a major surface of the active layer of metal oxide to form a low trap density interface with the active layer of metal oxide. A second layer of low trap density material can optionally be placed in contact with the opposed major surface of the active layer of metal oxide so that a low trap density interface is formed with both surfaces of the active layer of metal oxide.

公开(公告)号：US09773824B2

公开(公告)日：2017-09-26

申请号：US15087716

申请日：2016-03-31

申请人： Chan-Long Shieh ,  Gang Yu

发明人： Chan-Long Shieh ,  Gang Yu

IPC分类号： H01L27/146 ,  H01L27/12 ,  H01L33/00 ,  H01L33/44 ,  H01L33/46 ,  H01L33/62 ,  H01L33/64 ,  H01L27/15

CPC分类号： H01L27/14609 ,  H01L27/1225 ,  H01L27/1248 ,  H01L27/1262 ,  H01L27/14603 ,  H01L27/1463 ,  H01L27/14663 ,  H01L27/14692 ,  H01L27/156 ,  H01L33/0075 ,  H01L33/44 ,  H01L33/46 ,  H01L33/62 ,  H01L33/642 ,  H01L2933/0025 ,  H01L2933/0033 ,  H01L2933/0066 ,  H01L2933/0075

摘要： A method of fabricating a pixelated imager and structure including a substrate with a bottom contact layer and active element blanket layers deposited on the bottom contact layer. The blanket layers are separated into an array of active elements with trenches isolating adjacent active elements in the array. A dielectric passivation/planarization layer is positioned over the array of active elements. An array of active element readout circuits overlies the passivation/planarization layer above the trenches with one active element readout circuit coupled to each active element of the array of active elements. Each active element and coupled active element readout circuit defines a pixel and the array of active elements and the coupled array of active element readout circuits defines a pixelated imager, and the readout circuit coupled to each active element includes at least one TFT with an active channel comprising a metal-oxide semiconductor material.

公开(公告)号：US09614102B2

公开(公告)日：2017-04-04

申请号：US15080231

申请日：2016-03-24

申请人： Chan-Long Shieh ,  Gang Yu ,  Fatt Foong

发明人： Chan-Long Shieh ,  Gang Yu ,  Fatt Foong

IPC分类号： H01L29/786 ,  H01L27/12 ,  H01L29/66 ,  H01L21/70 ,  H01L21/02

CPC分类号： H01L29/78696 ,  H01L21/02554 ,  H01L21/02565 ,  H01L21/707 ,  H01L27/1225 ,  H01L27/124 ,  H01L27/1288 ,  H01L29/66969 ,  H01L29/78606 ,  H01L29/7869

摘要： A method of fabricating MO TFTs includes positioning opaque gate metal on a transparent substrate to define a gate area. Depositing gate dielectric material overlying the gate metal and a surrounding area, and depositing metal oxide semiconductor material thereon. Depositing etch stop material on the semiconductor material. Positioning photoresist defining an isolation area in the semiconductor material, the etch stop material and the photoresist being selectively removable. Exposing the photoresist from the rear surface of the substrate and removing exposed portions to leave the etch stop material uncovered except for a portion overlying and aligned with the gate metal. Etching uncovered portions of the semiconductor material to isolate the TFT. Using the photoresist, selectively etching the etch stop layer to leave a portion overlying and aligned with the gate metal and defining a channel area in the semiconductor material. Depositing and patterning conductive material to form source and drain areas.

公开(公告)号：US20160293769A1

公开(公告)日：2016-10-06

申请号：US15186628

申请日：2016-06-20

申请人： Chan-Long Shieh ,  Gang Yu ,  Fatt Foong ,  Tian Xiao ,  Juergen Musolf

发明人： Chan-Long Shieh ,  Gang Yu ,  Fatt Foong ,  Tian Xiao ,  Juergen Musolf

IPC分类号： H01L29/786 ,  H01L23/535 ,  H01L21/467 ,  H01L29/66 ,  H01L21/4763 ,  H01L29/417 ,  H01L29/06

CPC分类号： H01L29/7869 ,  H01L21/467 ,  H01L21/4763 ,  H01L23/535 ,  H01L29/0649 ,  H01L29/41733 ,  H01L29/66969 ,  H01L29/78696

摘要： A method of fabricating a stable, high mobility metal oxide thin film transistor includes the steps of providing a substrate, positioning a gate on the substrate, and depositing a gate dielectric layer on the gate and portions of the substrate not covered by the gate. A multiple film active layer including a metal oxide semiconductor film and a metal oxide passivation film is deposited on the gate dielectric with the passivation film positioned in overlying relationship to the semiconductor film. An etch-stop layer is positioned on a surface of the passivation film and defines a channel area in the active layer. A portion of the multiple film active layer on opposite sides of the etch-stop layer is modified to form an ohmic contact and metal source/drain contacts are positioned on the modified portion of the multiple film active layer.

摘要翻译： 一种制造稳定的高迁移率金属氧化物薄膜晶体管的方法包括以下步骤：提供衬底，将栅极定位在衬底上，以及在栅极上沉积栅极电介质层，并且将衬底部分未被栅极覆盖。 包括金属氧化物半导体膜和金属氧化物钝化膜的多层膜活性层沉积在栅极电介质上，钝化膜位于与半导体膜的重叠关系中。 蚀刻停止层位于钝化膜的表面上并限定有源层中的沟道区。 在蚀刻停止层的相对侧上的多个膜有源层的一部分被修改以形成欧姆接触，并且金属源极/漏极触点位于多个膜有源层的修改部分上。

公开(公告)号：US09362413B2

公开(公告)日：2016-06-07

申请号：US14081130

申请日：2013-11-15

申请人： Gang Yu ,  Chan-Long Shieh ,  Juergen Musolf ,  Fatt Foong ,  Tian Xiao

发明人： Gang Yu ,  Chan-Long Shieh ,  Juergen Musolf ,  Fatt Foong ,  Tian Xiao

IPC分类号： H01L29/786 ,  H01L29/24 ,  H01L21/02 ,  H01L29/66

CPC分类号： H01L27/1203 ,  H01L21/02565 ,  H01L21/02664 ,  H01L29/24 ,  H01L29/66969 ,  H01L29/7869

摘要： A method of fabricating a high mobility semiconductor metal oxide thin film transistor including the steps of depositing a layer of semiconductor metal oxide material, depositing a blanket layer of etch-stop material on the layer of MO material, and patterning a layer of source/drain metal on the blanket layer of etch-stop material including etching the layer of source/drain metal into source/drain terminals positioned to define a channel area in the semiconductor metal oxide layer. The etch-stop material being electrically conductive in a direction perpendicular to the plane of the blanket layer at least under the source/drain terminals to provide electrical contact between each of the source/drain terminals and the layer of semiconductor metal oxide material. The etch-stop material is also chemical robust to protect the layer of semiconductor metal oxide channel material during the etching process.

摘要翻译： 一种制造高迁移率半导体金属氧化物薄膜晶体管的方法，包括以下步骤：沉积半导体金属氧化物材料层，在MO材料层上沉积蚀刻停止材料的覆盖层，以及图案化源/漏层 包括将源极/漏极金属层蚀刻成定位成限定半导体金属氧化物层中的沟道区域的源极/漏极端子的蚀刻停止材料的覆盖层上的金属。 蚀刻停止材料至少在源极/漏极端子之下在垂直于覆盖层的平面的方向上导电，以在源极/漏极端子和半导体金属氧化物材料层之间提供电接触。 蚀刻停止材料也是化学稳固的，以在蚀刻工艺期间保护半导体金属氧化物沟道材料层。