公开(公告)号：US11107763B2

公开(公告)日：2021-08-31

申请号：US16469113

申请日：2016-12-30

Applicant: Intel Corporation

Inventor： Thomas Wagner ,  Andreas Wolter ,  Georg Seidemann

IPC: H01L23/522 ,  H01L23/538 ,  H01L23/00 ,  H01L25/065

Abstract: A microelectronic package includes at least two semiconductor die, one die stacked over at least partially another. At a least the upper die is oriented with its active surface facing in the direction of a redistribution structure, and one or more wires are coupled to extend from contacts on that active surface into conductive structures in the redistribution structure.

公开(公告)号：US10522454B2

公开(公告)日：2019-12-31

申请号：US15997555

申请日：2018-06-04

Applicant: Intel Corporation

Inventor： Thorsten Meyer ,  Gerald Ofner ,  Andreas Wolter ,  Georg Seidemann ,  Sven Albers ,  Christian Geissler

IPC: H01L23/498 ,  H01L23/50 ,  H01L23/00 ,  H01L21/48 ,  H01L21/56 ,  H01L23/31 ,  H01L25/16 ,  H01L23/13

Abstract: A microelectronic package including a passive microelectronic device disposed within a package body, wherein the package body is the portion of the microelectronic package which provides support and/or rigidity to the microelectronic package. In a flip-chip type microelectronic package, the package body may comprise a microelectronic substrate to which an active microelectronic device is electrically attached. In an embedded device type microelectronic package, the package body may comprise the material in which the active microelectronic device is embedded.

公开(公告)号：US20190287904A1

公开(公告)日：2019-09-19

申请号：US16349170

申请日：2016-12-29

Applicant: Intel Corporation

Inventor： Georg Seidemann ,  Thomas Wagner ,  Andreas Wolter ,  Bernd Waidhas

IPC: H01L23/528 ,  H01L23/00 ,  H01L23/48 ,  H01L21/768 ,  H01L23/532

Abstract: A system-in-package apparatus includes a semiconductive bridge that uses bare-die pillars to couple with a semiconductive device such as a processor die. The apparatus achieves a thin form factor.

公开(公告)号：US20190006318A1

公开(公告)日：2019-01-03

申请号：US15637935

申请日：2017-06-29

Applicant: Intel Corporation

Inventor： Bernd Waidhas ,  Georg Seidemann ,  Andreas Augustin ,  Laurent Millou ,  Andreas Wolter ,  Reinhard Mahnkopf ,  Stephan Stoeckl ,  Thomas Wagner

IPC: H01L25/065 ,  H01L21/48 ,  H01L23/48

CPC classification number: H01L25/0657 ,  G06F15/76 ,  H01L21/486 ,  H01L23/481 ,  H01L25/105 ,  H01L25/50 ,  H01L2224/16225 ,  H01L2225/06513 ,  H01L2225/06541 ,  H01L2225/06572 ,  H01L2225/1011 ,  H01L2225/1017 ,  H01L2225/1058

Abstract: A semiconductive device stack, includes a baseband processor die with an active surface and a backside surface, and a recess in the backside surface. A recess-seated device is disposed in the recess, and a through-silicon via in the baseband processor die couples the baseband processor die at the active surface to the recess-seated die at the recess. A processor die is disposed on the baseband processor die backside surface, and a memory die is disposed on the processor die. The several dice are coupled by through-silicon via groups.

公开(公告)号：US12125815B2

公开(公告)日：2024-10-22

申请号：US17131663

申请日：2020-12-22

Applicant: Intel Corporation

Inventor： Bernd Waidhas ,  Andreas Wolter ,  Georg Seidemann ,  Thomas Wagner

IPC: H01L23/31 ,  H01L23/00 ,  H01L23/538

CPC classification number: H01L24/20 ,  H01L23/3157 ,  H01L23/5386 ,  H01L24/06 ,  H01L24/13 ,  H01L2924/3511 ,  H01L2924/381

Abstract: Embodiments disclosed herein include electronic package and methods of forming such packages. In an embodiment, an electronic package comprises a mold layer and a first die embedded in the mold layer. In an embodiment, the first die comprises first pads at a first pitch and second pads at a second pitch. In an embodiment, the electronic package further comprises a second die embedded in the mold layer, where the second die comprises third pads at the first pitch and fourth pads at the second pitch. In an embodiment, a bridge die is embedded in the mold layer, and the bridge die electrically couples the second pads to the fourth pads.

公开(公告)号：US11784143B2

公开(公告)日：2023-10-10

申请号：US16421315

申请日：2019-05-23

Applicant: Intel Corporation

Inventor： Sonja Koller ,  Kilian Roth ,  Josef Hagn ,  Andreas Wolter ,  Andreas Augustin

IPC: H01L23/66 ,  H01L23/31 ,  H01L23/538 ,  H01L23/552 ,  H01L21/48 ,  H01P3/00 ,  H01P11/00 ,  H01Q1/22 ,  H01L21/56

CPC classification number: H01L23/66 ,  H01L21/4853 ,  H01L21/565 ,  H01L23/315 ,  H01L23/3128 ,  H01L23/5389 ,  H01L23/552 ,  H01P3/003 ,  H01P11/001 ,  H01Q1/2283 ,  H01L2223/6627 ,  H01L2223/6638 ,  H01L2223/6677

Abstract: Embodiments include semiconductor packages and methods of forming the semiconductor packages. A semiconductor package includes a die over a substrate, a first conductive layer over the die, and a conductive cavity antenna over the first conductive layer and substrate. The conductive cavity antenna includes a conductive cavity, a cavity region, and a plurality of interconnects. The conductive cavity is over the first conductive layer and surrounds the cavity region. The semiconductor package also includes a second conductive layer over the conductive cavity antenna, first conductive layer, and substrate. The conductive cavity extends vertically from the first conductive layer to the second conductive layer. The cavity region may be embedded with the conductive cavity, the first conductive layer, and the second conductive layer. The plurality of interconnects may include first, second, and third interconnects. The first interconnects may include through-mold vias (TMVs), through-silicon vias (TSVs), conductive sidewalls, or conductive trenches.

公开(公告)号：US10319688B2

公开(公告)日：2019-06-11

申请号：US14361625

申请日：2013-12-09

Applicant: INTEL CORPORATION

Inventor： Andreas Wolter ,  Saravana Maruthamuthu ,  Mikael Knudsen ,  Thorsten Meyer ,  Georg Seidemann ,  Pablo Herrero ,  Pauli Jaervinen

IPC: H01Q1/38 ,  H01L23/66 ,  H01L23/552 ,  H01L23/00 ,  H01L25/10 ,  H01L21/48 ,  H01L23/31 ,  H01L23/48 ,  H01L23/498 ,  H01L25/065 ,  H01Q1/50 ,  H01Q1/52 ,  H01L23/29

Abstract: An antenna is described on ceramics that may be used for a packaged die. In one example, a package has a die, a ceramic substrate over the die, an antenna attached to the ceramic substrate, and conductive leads electrically connecting the antenna to the die.

公开(公告)号：US09921694B2

公开(公告)日：2018-03-20

申请号：US14778142

申请日：2014-12-16

Applicant: Intel Corporation

Inventor： Sven Albers ,  Klaus Reingruber ,  Teodora Ossiander ,  Andreas Wolter ,  Sonja Koller ,  Georg Seidemann ,  Jan Proschwitz ,  Hans-Joachim Barth ,  Bastiaan Elshof

IPC: G09G5/00 ,  G06F3/044 ,  H04B1/3827 ,  G01L1/24 ,  G06F1/16 ,  G06F3/038 ,  G06F3/042 ,  G06F3/045 ,  G06F3/0354

CPC classification number: G06F3/044 ,  G01L1/24 ,  G06F1/163 ,  G06F3/03547 ,  G06F3/038 ,  G06F3/042 ,  G06F3/045 ,  G06F2203/04102 ,  G06F2203/04109 ,  H04B1/385

Abstract: Some forms relate to wearable computing devices that include a “touch pad” like interface. In some forms, the example wearable computing devices may be integrated with (or attached to) textiles (i.e. clothing). In other forms, the example wearable computing devices may be attached directly to the skin of someone (i.e., similar to a bandage) that utilizes any of the example wearable computing devices. The example wearable computing devices include a flexible touch pad that may allow a user of the wearable computing device to more easily operate the wearable computing device. The example wearable computing devices described herein may include a variety of electronics. Some examples include a power supply and/or a communication device among other types of electronics.

公开(公告)号：US20160240492A1

公开(公告)日：2016-08-18

申请号：US14361625

申请日：2013-12-09

Applicant: INTEL CORPORATION

Inventor： Andreas Wolter ,  Saravana Maruthamuthu ,  Mikael Knudsen ,  Meyer Thorsten ,  Georg Seidemann ,  Pablo Herrero ,  Pauli Jaervinen

IPC: H01L23/66 ,  H01Q1/50 ,  H01Q1/52 ,  H01L23/498 ,  H01L21/48 ,  H01L23/31 ,  H01L23/552 ,  H01L25/065 ,  H01L23/00 ,  H01Q1/38 ,  H01L23/48

CPC classification number: H01L23/66 ,  H01L21/4846 ,  H01L23/295 ,  H01L23/3128 ,  H01L23/481 ,  H01L23/49833 ,  H01L23/49838 ,  H01L23/552 ,  H01L24/16 ,  H01L24/17 ,  H01L24/19 ,  H01L24/20 ,  H01L24/29 ,  H01L24/32 ,  H01L24/73 ,  H01L24/81 ,  H01L25/0657 ,  H01L25/105 ,  H01L2223/6616 ,  H01L2223/6677 ,  H01L2224/12105 ,  H01L2224/16225 ,  H01L2224/16227 ,  H01L2224/16235 ,  H01L2224/2919 ,  H01L2224/32225 ,  H01L2224/73253 ,  H01L2224/73267 ,  H01L2225/06517 ,  H01L2225/06548 ,  H01L2225/1035 ,  H01L2225/1041 ,  H01L2225/1058 ,  H01L2924/1421 ,  H01L2924/15311 ,  H01L2924/181 ,  H01L2924/3025 ,  H01Q1/38 ,  H01Q1/50 ,  H01Q1/526 ,  H01L2924/00

Abstract: An antenna is described on ceramics that may be used for a packaged die. In one example, a package has a die, a ceramic substrate over the die, an antenna attached to the ceramic substrate, and conductive leads electrically connecting the antenna to the die.

Abstract translation: 在可用于封装模具的陶瓷上描述天线。 在一个示例中，封装具有管芯，管芯上的陶瓷衬底，附着到陶瓷衬底的天线以及将天线电连接到管芯的导电引线。