公开(公告)号：US20240222301A1

公开(公告)日：2024-07-04

申请号：US18147497

申请日：2022-12-28

Applicant: Intel Corporation

Inventor： Bohan Shan ,  Hongxia Feng ,  Haobo Chen ,  Srinivas Pietambaram ,  Bai Nie ,  Gang Duan ,  Kyle Arrington ,  Ziyin Lin ,  Yiqun Bai ,  Xiaoying Guo ,  Dingying Xu ,  Sairam Agraharam ,  Ashay Dani ,  Eric J. M. Moret ,  Tarek Ibrahim

IPC: H01L23/00

CPC classification number: H01L24/11 ,  H01L2224/10122 ,  H01L2224/11011 ,  H01L2924/143 ,  H01L2924/186

Abstract: Methods and apparatus for optical thermal treatment in semiconductor packages are disclosed. A disclosed example integrated circuit (IC) package includes a dielectric substrate, an interconnect associated with the dielectric substrate, and light absorption material proximate or surrounding the interconnect, the light absorption material to increase in temperature in response to being exposed to a pulsed light for thermal treatment corresponding to the IC package.

公开(公告)号：US20240222259A1

公开(公告)日：2024-07-04

申请号：US18147535

申请日：2022-12-28

Applicant: Intel Corporation

Inventor： Haobo Chen ,  Bohan Shan ,  Xiyu Hu ,  Rhonda Jack ,  Catherine Mau ,  Hongxia Feng ,  Xiao Liu ,  Wei Wei ,  Srinivas Pietambaram ,  Gang Duan ,  Xiaoying Guo ,  Dingying Xu ,  Kyle Arrington ,  Ziyin Lin ,  Hiroki Tanaka ,  Leonel Arana

IPC: H01L23/498 ,  H01L21/48 ,  H01L23/29 ,  H01L23/31

CPC classification number: H01L23/49894 ,  H01L21/481 ,  H01L23/291 ,  H01L23/3192 ,  H01L24/16

Abstract: Methods, systems, apparatus, and articles of manufacture to produce integrated circuit (IC) packages having silicon nitride adhesion promoters are disclosed. An example IC package disclosed herein includes a metal layer on a substrate, a layer on the metal layer, the layer including silicon and nitrogen, and solder resist on the layer.

公开(公告)号：US11923268B2

公开(公告)日：2024-03-05

申请号：US16781475

申请日：2020-02-04

Applicant: INTEL CORPORATION

Inventor： Jesus Gerardo Reyes Schuldes ,  Shankar Devasenathipathy ,  Pramod Malatkar ,  Aravindha Antoniswamy ,  Kyle Arrington

IPC: H01L23/367 ,  H01L21/48 ,  H01L23/00 ,  H01L23/373 ,  H05K1/02

CPC classification number: H01L23/3675 ,  H01L21/4814 ,  H01L23/373 ,  H01L24/16 ,  H01L24/73 ,  H05K1/0204 ,  H01L2224/16 ,  H01L2224/73253 ,  H01L2924/1532

Abstract: Techniques and mechanisms for promoting heat conduction in a packaged device using a heat spreader that is fabricated by a build-up process. In an embodiment, 3D printing of a heat spreader successively deposit layers of a thermal conductor material, where said layers variously extend each over a respective one or more IC dies. The heat spreader forms a flat top side, wherein a bottom side of the heat spreader extends over, and conforms at least partially to, different respective heights of various IC dies. In another embodiment, fabrication of a portion of the heat spreader comprises printing pore structures that contribute to a relatively low thermal conductivity of said portion. An average orientation of the oblong pores contributes to different respective thermal conduction properties for various directions of heat flow.

公开(公告)号：US11616000B2

公开(公告)日：2023-03-28

申请号：US17359085

申请日：2021-06-25

Applicant: Intel Corporation

Inventor： Dong-Ho Han ,  Jaejin Lee ,  Jerrod Peterson ,  Kyle Arrington

IPC: H01L23/373 ,  H01L23/60 ,  H01L23/552 ,  H01L23/528

Abstract: Methods and apparatus are disclosed to provide electrical shielding for integrated circuit packages using a thermal interface material. An integrated circuit package includes a substrate including a ground plane layer and a solder mask; a semiconductor die attached to the substrate, the solder mask layer separating the semiconductor die from the ground plane layer; and a thermal interface material surrounding at least a portion of the semiconductor die, the thermal interface material electrically coupled to the ground plane layer.

公开(公告)号：US20220201889A1

公开(公告)日：2022-06-23

申请号：US17128620

申请日：2020-12-21

Applicant: Intel Corporation

Inventor： Raanan Sover ,  James Williams ,  Bradley Smith ,  Nir Peled ,  Paul George ,  Jason Armstrong ,  Alexey Chinkov ,  Meir Cohen ,  Je-Young Chang ,  Kuang Liu ,  Ravindranath Mahajan ,  Kelly Lofgreen ,  Kyle Arrington ,  Michael Crocker ,  Sergio Antonio Chan Arguedas

IPC: H05K7/20

Abstract: A two-phase immersion cooling system for an integrated circuit assembly may be formed utilizing boiling enhancement structures formed on or directly attached to heat dissipation devices within the integrated circuit assembly, formed on or directly attached to integrated circuit devices within the integrated circuit assembly, and/or conformally formed over support devices and at least a portion of an electronic board within the integrated circuit assembly. In still a further embodiment, the two-phase immersion cooling system may include a low boiling point liquid including at least two liquids that are substantially immiscible with one another.

公开(公告)号：US20210242105A1

公开(公告)日：2021-08-05

申请号：US16781475

申请日：2020-02-04

Applicant: INTEL CORPORATION

Inventor： Jesus Gerardo Reyes Schuldes ,  Shankar Devasenathipathy ,  Pramod Malatkar ,  Aravindha Antoniswamy ,  Kyle Arrington

IPC: H01L23/367 ,  H01L23/373 ,  H01L21/48 ,  H01L23/00 ,  H05K1/02

Abstract: Techniques and mechanisms for promoting heat conduction in a packaged device using a heat spreader that is fabricated by a build-up process. In an embodiment, 3D printing of a heat spreader successively deposit layers of a thermal conductor material, where said layers variously extend each over a respective one or more IC dies. The heat spreader forms a flat top side, wherein a bottom side of the heat spreader extends over, and conforms at least partially to, different respective heights of various IC dies. In another embodiment, fabrication of a portion of the heat spreader comprises printing pore structures that contribute to a relatively low thermal conductivity of said portion. An average orientation of the oblong pores contributes to different respective thermal conduction properties for various directions of heat flow.

公开(公告)号：US20210225729A1

公开(公告)日：2021-07-22

申请号：US16746732

申请日：2020-01-17

Applicant: Intel Corporation

Inventor： Elah Bozorg-Grayeli ,  Kyle Arrington ,  Sergio Chan Arguedas ,  Aravindha Antoniswamy

IPC: H01L23/373 ,  H01L23/16 ,  H01L23/367 ,  H01L23/00 ,  H01L21/48

Abstract: A second-level thermal interface material (TIM2) that is to couple to a system-level thermal solution is applied to an integrated circuit (IC) assembly comprising an IC die and an assembly substrate prior to the assembly substrate being joined to a host component at the system-level. Challenges associated with TIM2 application may therefore be addressed at a first level of IC die integration, simplifying subsequent assembly and better controlling thermal coupling to a subsequently applied thermal solution. Where a first-level IC assembly includes a stiffener, the TIM may be affixed to the stiffener through an adhesive bond or a fusion bond. After the IC assembly including the TIM is soldered to the host board, a thermal solution may be placed in contact with the TIM. With early application of a solder TIM, a solder TIM may be reflowed upon the IC die multiple times.