公开(公告)号：US09701532B2

公开(公告)日：2017-07-11

申请号：US15196207

申请日：2016-06-29

Applicant: International Business Machines Corporation

Inventor： Qing Cao ,  Kangguo Cheng ,  Zhengwen Li ,  Fei Liu

IPC: H01L21/00 ,  B81B3/00 ,  B81C1/00

CPC classification number: B81B3/0086 ,  B81B7/0058 ,  B81B2203/0307 ,  B81B2203/033 ,  B81C1/00039 ,  B81C1/00698 ,  B81C2201/017 ,  B81C2203/0764 ,  B82Y10/00 ,  C08K5/34 ,  G06N3/0635 ,  H01L21/00 ,  H01L21/02263 ,  H01L21/30625 ,  H01L21/465 ,  H01L27/092 ,  H01L29/42316 ,  H01L49/00

Abstract: An electromechanical device comprises a substrate structure, a set of electrodes, one or more anchor trenches, and one or more multi-faced components. For example, each of the one or more multi-faced components comprises an isolation region formed on a first portion of the surface of the component, a high resistance region formed on a second portion of the surface of the component, and a low resistance region formed on a third portion of the surface of the component. For example, the synapse device is configured to provide an analog resistive output, ranging between the high resistance region and the low resistance region, from at least one of the set of electrodes in response to a pulsed voltage input to at least another one of the set of electrodes.

公开(公告)号：US09685417B2

公开(公告)日：2017-06-20

申请号：US14750636

申请日：2015-06-25

Applicant: International Business Machines Corporation

Inventor： Qing Cao ,  Kangguo Cheng ,  Fei Liu

IPC: H01L23/00 ,  H01L23/29 ,  H01L21/56

CPC classification number: H01L23/573 ,  G01T1/02 ,  H01L21/56 ,  H01L23/295 ,  H01L23/57

Abstract: Circuits which self-destruct under radiation are provided. In one aspect, a method for creating a radiation-sensitive circuit is provided. The method includes the step of: connecting an integrated circuit to a power supply and to a ground in parallel with at least one dosimeter device, wherein the dosimeter device is configured to change from being an insulator to being a conductor under radiation. Radiation-sensitive circuits are also provided.

公开(公告)号：US20170170117A1

公开(公告)日：2017-06-15

申请号：US15441873

申请日：2017-02-24

Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATION

Inventor： Qing Cao ,  Kangguo Cheng ,  Zhengwen Li ,  Fei Liu

IPC: H01L23/525 ,  H01L23/367 ,  H01L23/373 ,  H01L21/02 ,  H01L29/06 ,  H01L21/3205 ,  H01L21/8234 ,  H01L23/522 ,  H01L23/532

CPC classification number: H01L23/525 ,  H01L21/02115 ,  H01L21/32053 ,  H01L21/823437 ,  H01L23/367 ,  H01L23/3677 ,  H01L23/3732 ,  H01L23/5228 ,  H01L23/5256 ,  H01L23/528 ,  H01L23/53209 ,  H01L23/5329 ,  H01L29/0649

Abstract: A semiconductor device includes a first dielectric layer formed from a thermally conductive dielectric material. Contacts are formed in the first dielectric layer, the planar contacts being spaced apart to form a gap therebetween. The thermally conductive dielectric material of the first dielectric layer is formed on lateral sides of the planar contacts and in the gap. A resistive element is formed laterally across the gap between the planar contacts and in direct contact with at least the thermally conductive dielectric material in the gap.

公开(公告)号：US09607952B1

公开(公告)日：2017-03-28

申请号：US14928425

申请日：2015-10-30

Applicant: International Business Machines Corporation

Inventor： Qing Cao ,  Ying He ,  Jeehwan Kim ,  Ning Li

IPC: H01L21/00 ,  H01L23/00 ,  H01L23/29 ,  H01L23/31 ,  H01L21/56

CPC classification number: H01L23/573 ,  H01L23/295 ,  H01L2924/14

Abstract: A method includes embedding high-z oxide nanoparticles in a semiconductor package of a semiconductor packaged assembly, wherein the high-z nanoparticles are operative to emit electron radiation when exposed to a radiation source to render a semiconductor device in the semiconductor package inoperable.

公开(公告)号：US09576853B2

公开(公告)日：2017-02-21

申请号：US15168580

申请日：2016-05-31

Applicant: International Business Machines Corporation

Inventor： Qing Cao ,  Oki Gunawan

IPC: H01F7/00 ,  H01F7/02 ,  B82Y40/00 ,  H01L21/768 ,  H01L43/12 ,  H01L21/02 ,  H01L21/283 ,  H01L21/66 ,  H01L23/532

CPC classification number: H01L21/76897 ,  B82Y40/00 ,  G01D5/24 ,  H01F7/00 ,  H01F7/02 ,  H01F7/0236 ,  H01F7/0247 ,  H01F7/0273 ,  H01F7/0284 ,  H01F7/202 ,  H01L21/02697 ,  H01L21/283 ,  H01L21/76838 ,  H01L21/76892 ,  H01L22/10 ,  H01L23/53276 ,  H01L43/12 ,  H01L2221/1094 ,  H01L2924/0002 ,  Y10S977/762 ,  Y10T29/41 ,  H01L2924/00

Abstract: A magnetic trap is configured to arrange at least one diamagnetic rod. The magnetic trap includes first and second magnets on a substrate that forms the magnetic trap defining a template configured to self-assemble diamagnetic material. Each of the first and second magnets extends along a longitudinal direction to define a magnet length, and contact each other to define a contact line. The first magnet and the second magnet have a diametric magnetization in a direction perpendicular to the contact line and the longitudinal direction so as to generate a longitudinal energy potential that traps the diamagnetic rod along the longitudinal direction.

Abstract translation: 磁阱被配置成布置至少一个反磁性棒。 磁捕集器包括基板上的第一和第二磁体，其形成限定配置成自组装反磁性材料的模板的磁捕集器。 第一和第二磁体中的每一个沿着纵向方向延伸以限定磁体长度，并且彼此接触以限定接触线。 第一磁体和第二磁体在垂直于接触线和纵向的方向上具有直径磁化，以产生沿着纵向方向捕获反磁性棒的纵向能量势。

公开(公告)号：US09496230B1

公开(公告)日：2016-11-15

申请号：US14700376

申请日：2015-04-30

Applicant: International Business Machines Corporation

Inventor： Qing Cao ,  Shu-Jen Han ,  Li-Wen Hung

IPC: H01L23/16 ,  H01L31/075 ,  H01L23/00 ,  H01L25/16 ,  H01L31/02 ,  H01L31/0288 ,  H01L31/18 ,  H01L49/02

CPC classification number: H01L31/075 ,  B81C1/0015 ,  G06K7/10366 ,  G06K19/07372 ,  H01L23/544 ,  H01L23/576 ,  H01L31/02005 ,  H01L31/02019 ,  H01L31/0203 ,  H01L31/0288 ,  H01L31/05 ,  H01L31/105 ,  H01L31/1804 ,  H01L2223/5444 ,  H01L2223/54486 ,  H01L2924/14

Abstract: Embodiments relate to the detection of semiconductor tampering with a light-sensitive circuit. A tamper detection device for an integrated circuit includes a light-sensitive circuit disposed within a package of an integrated circuit. The light-sensitive circuit closes in response to an exposure to a light source, indicating a tamper condition.

Abstract translation: 实施例涉及用光敏电路检测半导体篡改。 用于集成电路的篡改检测装置包括设置在集成电路的封装内的感光电路。 光敏电路响应于对光源的曝光而闭合，表示篡改状况。

公开(公告)号：US20160322313A1

公开(公告)日：2016-11-03

申请号：US14700376

申请日：2015-04-30

Applicant: International Business Machines Corporation

Inventor： Qing Cao ,  Shu-Jen Han ,  Li-Wen Hung

IPC: H01L23/00 ,  H01L31/075 ,  H01L49/02 ,  H01L31/0288 ,  H01L31/18 ,  H01L25/16 ,  H01L31/02

CPC classification number: H01L31/075 ,  B81C1/0015 ,  G06K7/10366 ,  G06K19/07372 ,  H01L23/544 ,  H01L23/576 ,  H01L31/02005 ,  H01L31/02019 ,  H01L31/0203 ,  H01L31/0288 ,  H01L31/05 ,  H01L31/105 ,  H01L31/1804 ,  H01L2223/5444 ,  H01L2223/54486 ,  H01L2924/14

Abstract: Embodiments relate to the detection of semiconductor tampering with a light-sensitive circuit. A tamper detection device for an integrated circuit includes a light-sensitive circuit disposed within a package of an integrated circuit. The light-sensitive circuit closes in response to an exposure to a light source, indicating a tamper condition.

Abstract translation: 实施例涉及用光敏电路检测半导体篡改。 用于集成电路的篡改检测装置包括设置在集成电路的封装内的感光电路。 光敏电路响应于对光源的曝光而闭合，表示篡改状况。

公开(公告)号：US20160293668A1

公开(公告)日：2016-10-06

申请号：US14744132

申请日：2015-06-19

Applicant: International Business Machines Corporation

Inventor： Qing Cao ,  Kangguo Cheng ,  Zhengwen Li ,  Fei Liu ,  Zhen Zhang

IPC: H01L27/28 ,  H01L51/10 ,  H01L51/00 ,  H01L51/05

CPC classification number: H01L51/055 ,  B82Y10/00 ,  B82Y30/00 ,  B82Y40/00 ,  H01L27/283 ,  H01L51/0048 ,  H01L51/0525 ,  H01L51/0541 ,  H01L51/0558 ,  H01L51/0566 ,  H01L51/057 ,  H01L51/105 ,  H01L2251/303 ,  Y10S977/742 ,  Y10S977/842 ,  Y10S977/938

Abstract: A transistor device includes an array of fin structures arranged on a substrate, each of the fin structures being vertically alternating stacks of a first isoelectric point material having a first isoelectric point and a second isoelectric point material having a second isoelectric point that is different than the first isoelectric point; one or more carbon nanotubes (CNTs) suspended between the fin structures and contacting a side surface of the second isoelectric point material in the fin structures; a gate wrapped around the array of CNTs; and source and drain contacts arranged over the fin structures; wherein each of the fin structures have a trapezoid shape or parallel sides that are oriented about 90° with respect to the substrate.

Abstract translation: 晶体管器件包括布置在衬底上的翅片结构的阵列，每个翅片结构是具有第一等电点的第一等电点材料和具有不同于第一等电点材料的第二等电点材料的第二等电点材料的垂直交替堆叠 第一等电点; 一个或多个碳纳米管（CNT），其悬挂在翅片结构之间并与翅片结构中的第二等电点材料的侧表面接触; 围绕CNT阵列的门; 以及布置在鳍结构上的源极和漏极触点; 其中每个翅片结构具有相对于基底定向成大约90°的梯形或平行边。

公开(公告)号：US20160276220A1

公开(公告)日：2016-09-22

申请号：US15168580

申请日：2016-05-31

Applicant: International Business Machines Corporation

Inventor： Qing Cao ,  Oki Gunawan

IPC: H01L21/768 ,  H01L23/532

CPC classification number: H01L21/76897 ,  B82Y40/00 ,  G01D5/24 ,  H01F7/00 ,  H01F7/02 ,  H01F7/0236 ,  H01F7/0247 ,  H01F7/0273 ,  H01F7/0284 ,  H01F7/202 ,  H01L21/02697 ,  H01L21/283 ,  H01L21/76838 ,  H01L21/76892 ,  H01L22/10 ,  H01L23/53276 ,  H01L43/12 ,  H01L2221/1094 ,  H01L2924/0002 ,  Y10S977/762 ,  Y10T29/41 ,  H01L2924/00

Abstract: A magnetic trap is configured to arrange at least one diamagnetic rod. The magnetic trap includes first and second magnets on a substrate that forms the magnetic trap defining a template configured to self-assemble diamagnetic material. Each of the first and second magnets extends along a longitudinal direction to define a magnet length, and contact each other to define a contact line. The first magnet and the second magnet have a diametric magnetization in a direction perpendicular to the contact line and the longitudinal direction so as to generate a longitudinal energy potential that traps the diamagnetic rod along the longitudinal direction.

Abstract translation: 磁阱被配置成布置至少一个反磁性棒。 磁捕集器包括基板上的第一和第二磁体，其形成限定配置成自组装反磁性材料的模板的磁捕集器。 第一和第二磁体中的每一个沿着纵向方向延伸以限定磁体长度，并且彼此接触以限定接触线。 第一磁体和第二磁体在垂直于接触线和纵向的方向上具有直径磁化，以产生沿着纵向方向捕获反磁性棒的纵向能量势。

公开(公告)号：US20160218306A1

公开(公告)日：2016-07-28

申请号：US15090762

申请日：2016-04-05

Applicant: International Business Machines Corporation

Inventor： Qing Cao ,  Kangguo Cheng ,  Shu-Jen Han ,  Zhengwen Li ,  Fei Liu

IPC: H01L51/05 ,  H01L51/00 ,  H01L51/10 ,  H01L27/28

CPC classification number: H01L51/0545 ,  H01L27/283 ,  H01L51/0006 ,  H01L51/0017 ,  H01L51/0021 ,  H01L51/0048 ,  H01L51/055 ,  H01L51/0558 ,  H01L51/105

Abstract: A method of arranging at least one carbon nanotube on a semiconductor substrate includes depositing the at least one carbon nanotube on a dielectric layer of the semiconductor device. The method further includes arranging the at least one carbon nanotube on the dielectric layer in response to applying a voltage potential to an electrically conductive electrode of the semiconductor device, and applying a ground potential to an electrically conductive semiconductor layer of the semiconductor device.