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21.
公开(公告)号:US20150179812A1
公开(公告)日:2015-06-25
申请号:US14573124
申请日:2014-12-17
Applicant: Japan Display Inc.
Inventor: Isao SUZUMURA , Norihiro UEMURA , Hidekazu MIYAKE , Yohei YAMAGUCHI
IPC: H01L29/786 , H01L21/473 , H01L21/4763 , H01L21/033 , H01L27/12 , H01L29/66
CPC classification number: H01L27/1225 , H01L21/02071 , H01L21/02164 , H01L21/02211 , H01L21/02274 , H01L21/32138 , H01L21/32139 , H01L21/473 , H01L27/1248 , H01L27/127 , H01L29/66969 , H01L29/7869 , H01L29/78693
Abstract: There is provided a bottom gate channel etched thin film transistor that can suppress initial Vth depletion and a Vth shift. A thin film transistor is formed, including a gate electrode interconnection disposed on a substrate, a gate insulating film, an oxide semiconductor layer to be a channel layer, a stacked film of a source electrode interconnection and a first hard mask layer, a stacked film of a drain electrode interconnection and a second hard mask layer, and a protective insulating film.
Abstract translation: 提供了可以抑制初始Vth耗尽和Vth偏移的底栅通道蚀刻薄膜晶体管。 形成薄膜晶体管,其包括设置在基板上的栅电极互连,栅极绝缘膜,作为沟道层的氧化物半导体层,源极互连的叠层膜和第一硬掩模层,层叠膜 的漏电极互连和第二硬掩模层,以及保护绝缘膜。
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22.
公开(公告)号:US20140362059A1
公开(公告)日:2014-12-11
申请号:US14300257
申请日:2014-06-10
Applicant: Japan Display Inc.
Inventor: Norihiro UEMURA , Hidekazu MIYAKE , Takeshi NODA , Isao SUZUMURA , Yohei YAMAGUCHI
IPC: H01L27/12 , G09G5/00 , H01L29/786
CPC classification number: G09G5/00 , H01L27/1225 , H01L27/124 , H01L29/41733 , H01L29/7869
Abstract: A thin film transistor includes a drain electrode layer and a source electrode layer that are formed above an oxide semiconductor layer via an insulating film. The drain electrode layer and the source electrode layer are electrically connected with the oxide semiconductor layer via through-holes formed in the insulating film. A first through-hole that electrically connects the drain electrode layer with the oxide semiconductor layer and a second through-hole that electrically connects the source electrode layer with the oxide semiconductor layer each include two or more through-holes that are arranged in parallel in a channel width direction of the thin film transistor. A total width of opening widths of the first or second through-holes in the channel width direction is a channel width of the thin film transistor.
Abstract translation: 薄膜晶体管包括通过绝缘膜形成在氧化物半导体层上方的漏电极层和源极电极层。 漏电极层和源电极层通过形成在绝缘膜中的通孔与氧化物半导体层电连接。 将漏电极层与氧化物半导体层电连接的第一通孔和将源电极层与氧化物半导体层电连接的第二通孔各自包括两个或更多个平行布置的通孔, 薄膜晶体管的沟道宽度方向。 沟道宽度方向上的第一或第二通孔的开口宽度的总宽度是薄膜晶体管的沟道宽度。
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公开(公告)号:US20250024748A1
公开(公告)日:2025-01-16
申请号:US18770974
申请日:2024-07-12
Applicant: Japan Display Inc.
Inventor: Motochika YUKAWA , Isao SUZUMURA , Genki ASOZU
Abstract: A photodetection device includes a lower structure, one or more common line connecting portions and one or more pixel electrodes provided on the lower structure, an organic photoelectric conversion layer that is provided so as to overlap with the one or more pixel electrodes and not to overlap with the one or more common line connecting portions, and a transparent electrode layer that is provided so as to overlap with the organic photoelectric conversion layer and the one or more common line connecting portion, where a part of the transparent electrode layer that overlaps with the one or more pixel electrodes is thicker than other parts.
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公开(公告)号:US20240421159A1
公开(公告)日:2024-12-19
申请号:US18814858
申请日:2024-08-26
Applicant: Japan Display Inc.
Inventor: Isao SUZUMURA , Kazufumi WATABE , Yoshinori ISHII , Hidekazu MIYAKE , Yohei YAMAGUCHI
IPC: H01L27/12 , G02F1/133 , G02F1/1362 , G02F1/1368 , H01L29/24 , H01L29/417 , H01L29/423 , H01L29/49 , H01L29/51 , H01L29/786 , H10K59/121
Abstract: The object of the present invention is to make it possible to form an LTPS TFT and an oxide semiconductor TFT on the same substrate. A display device includes a substrate having a display region in which pixels are formed. The pixel includes a first TFT using an oxide semiconductor 109. An oxide film 110 as an insulating material is formed on the oxide semiconductor 109. A gate electrode 111 is formed on the oxide film 110. A first electrode 115 is connected to a drain of the first TFT via a first through hole formed in the oxide film 110. A second electrode 116 is connected to a source of the first TFT via a second through hole formed in the oxide film 110.
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公开(公告)号:US20240142836A1
公开(公告)日:2024-05-02
申请号:US18407505
申请日:2024-01-09
Applicant: Japan Display Inc.
Inventor: Isao SUZUMURA , Fumiya KIMURA , Kazuhide MOCHIZUKI , Hitoshi TANAKA , Kenichi AKUTSU , Atsuko SHIMADA
IPC: G02F1/1362 , G02F1/1368
CPC classification number: G02F1/136286 , G02F1/136227 , G02F1/1368 , G02F1/134363
Abstract: According to one embodiment, a display device includes a semiconductor layer, a first insulating layer, a gate electrode, a second insulating layer and a plurality of transparent conductive layers. The transparent conductive layers include a pixel electrode, a first conductive layer and a second conductive layer. The pixel electrode is in contact with the second conductive layer. The second conductive layer is in contact with the first conductive layer. The first conductive layer is brought into contact with a second region of the semiconductor layer through a first contact hole.
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公开(公告)号:US20240030226A1
公开(公告)日:2024-01-25
申请号:US18480552
申请日:2023-10-04
Applicant: Japan Display Inc.
Inventor: Isao SUZUMURA , Kazufumi WATABE , Yoshinori ISHII , Hidekazu MIYAKE , Yohei YAMAGUCHI
IPC: H01L27/12 , H01L29/786 , H01L29/51 , H01L29/24 , G02F1/1368 , G02F1/133 , G02F1/1362 , H01L29/417 , H01L29/423 , H01L29/49
CPC classification number: H01L27/1225 , H01L27/1251 , H01L29/78633 , H01L29/517 , H01L29/24 , H01L29/7869 , H01L29/78675 , G02F1/1368 , G02F1/13306 , G02F1/136209 , H01L29/41733 , H01L29/42384 , H01L29/4908 , H01L27/1259 , G02F2202/10 , G02F2202/104 , G02F1/13685 , H10K59/1213
Abstract: The object of the present invention is to make it possible to form an LTPS TFT and an oxide semiconductor TFT on the same substrate. A display device includes a substrate having a display region in which pixels are formed. The pixel includes a first TFT using an oxide semiconductor 109. An oxide film 110 as an insulating material is formed on the oxide semiconductor 109. A gate electrode 111 is formed on the oxide film 110. A first electrode 115 is connected to a drain of the first TFT via a first through hole formed in the oxide film 110. A second electrode 116 is connected to a source of the first TFT via a second through hole formed in the oxide film 110.
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27.
公开(公告)号:US20220246764A1
公开(公告)日:2022-08-04
申请号:US17724512
申请日:2022-04-20
Applicant: Japan Display Inc.
Inventor: Isao SUZUMURA , Hajime WATAKABE , Akihiro HANADA , Ryo ONODERA , Tomoyuki ITO
IPC: H01L29/786
Abstract: The present invention addresses the problem of: realizing a TFT that uses an oxide semiconductor and that is capable of maintaining stable characteristics even in the case where the TFT is miniaturized; and realizing a display device that has high-definition pixels using such a TFT. To solve this problem, the present invention has the following configuration. A semiconductor device including an oxide semiconductor TFT formed using an oxide semiconductor film 109, the semiconductor device being characterized in that: the channel length of the oxide semiconductor TFT is 1.3 to 2.3 μm; and the sheet resistance of a source region 1092 and a drain region 1091 of the oxide semiconductor film 109 is 1.4 to 20 KΩ/□.
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公开(公告)号:US20210109412A1
公开(公告)日:2021-04-15
申请号:US17066493
申请日:2020-10-09
Applicant: Japan Display Inc.,
Inventor: Isao SUZUMURA , Fumiya KIMURA , Kazuhide MOCHIZUKI , Hitoshi TANAKA , Kenichi AKUTSU , Atsuko SHIMADA
IPC: G02F1/1362 , G02F1/1343 , G02F1/1368
Abstract: According to one embodiment, a display device includes a semiconductor layer, a first insulating layer, a gate electrode, a second insulating layer and a plurality of transparent conductive layers. The transparent conductive layers include a pixel electrode, a first conductive layer and a second conductive layer. The pixel electrode is in contact with the second conductive layer. The second conductive layer is in contact with the first conductive layer. The first conductive layer is brought into contact with a second region of the semiconductor layer through a first contact hole.
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公开(公告)号:US20200350341A1
公开(公告)日:2020-11-05
申请号:US16931454
申请日:2020-07-17
Applicant: Japan Display Inc.
Inventor: Akihiro HANADA , Yohei YAMAGUCHI , Hirokazu WATANABE , Isao SUZUMURA
IPC: H01L27/12 , H01L27/32 , G02F1/1368
Abstract: The purpose of the present invention is to realize the display device having thin film transistors of the oxide semiconductor of stable characteristics. An example of the concrete structure is that: A display device having a substrate including a display area, plural pixels formed in the display area, the pixel includes a first thin film transistor having an oxide semiconductor film, a first insulating film made of a first silicon oxide on a first side of the oxide semiconductor film, a second insulating film made of a second silicon oxide on a second side of the oxide semiconductor film, wherein oxygen desorption amount per unit area from the first insulating film is larger than that from the second insulating film, when measured by TDS (Thermal Desorption Spectrometry) provided M/z=32 and a measuring range in temperature is from 100 centigrade to 500 centigrade.
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公开(公告)号:US20200333652A1
公开(公告)日:2020-10-22
申请号:US16918453
申请日:2020-07-01
Applicant: Japan Display Inc.
Inventor: Akihiro HANADA , Isao SUZUMURA , Hajime WATAKABE
IPC: G02F1/1333 , G02F1/1368 , G02F1/1335 , G02F1/1362 , H01L27/12 , G09F9/30 , H05K1/18 , G02F1/1339 , H01L27/32 , H01L51/00
Abstract: The purpose of the invention is to realize the flexible display device of high reliability; specifically in a structure that a bending area is in a terminal area, and in that disconnection of the wiring does not occur in the bending area. The concrete structure is that: a display device having a display area, a driving circuit area and a bending area comprising: a first thin film transistor and a first interlayer insulating film are formed in the display area, a second thin film transistor and a second interlayer insulating film are formed in the driving circuit area, terminal wirings to connects the display area and the driving circuit area are formed in the bending area.
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