公开(公告)号：US09379093B2

公开(公告)日：2016-06-28

申请号：US13457637

申请日：2012-04-27

申请人： Szu-Ying Chen ,  Ping-Yin Liu ,  Calvin Yi-Ping Chao ,  Tzu-Jui Wang ,  Jen-Cheng Liu ,  Dun-Nian Yaung ,  Lan-Lin Chao

发明人： Szu-Ying Chen ,  Ping-Yin Liu ,  Calvin Yi-Ping Chao ,  Tzu-Jui Wang ,  Jen-Cheng Liu ,  Dun-Nian Yaung ,  Lan-Lin Chao

IPC分类号： H01L27/00 ,  H01L25/16 ,  H01L27/146

摘要： Methods and apparatus for packaging a backside illuminated (BSI) image sensor or a sensor device with an application specific integrated circuit (ASIC) are disclosed. According to an embodiment, a sensor device may be bonded together face-to-face with an ASIC without using a carrier wafer, where corresponding bond pads of the sensor are aligned with bond pads of the ASIC and bonded together, in a one-to-one fashion. A column of pixels of the sensor may share a bond bad connected by a shared inter-metal line. The bond pads may be of different sizes and configured in different rows to be disjoint from each other. Additional dummy pads may be added to increase the bonding between the sensor and the ASIC.

公开(公告)号：US08945344B2

公开(公告)日：2015-02-03

申请号：US13554751

申请日：2012-07-20

申请人： Xin-Hua Huang ,  Ping-Yin Liu ,  Hung-Hua Lin ,  Yuan-Chih Hsieh ,  Lan-Lin Chao ,  Chia-Shiung Tsai

发明人： Xin-Hua Huang ,  Ping-Yin Liu ,  Hung-Hua Lin ,  Yuan-Chih Hsieh ,  Lan-Lin Chao ,  Chia-Shiung Tsai

IPC分类号： B32B38/10

CPC分类号： H01L21/67092 ,  Y10T156/11 ,  Y10T156/1132 ,  Y10T156/1153 ,  Y10T156/1189 ,  Y10T156/1911 ,  Y10T156/1944 ,  Y10T156/1972

摘要： Systems and methods of separating bonded wafers are disclosed. In one embodiment, a system for separating bonded wafers includes a support for the bonded wafers and means for applying a sheer force to the bonded wafers. The system also includes means for applying a vacuum to the bonded wafers.

摘要翻译： 公开了分离键合晶片的系统和方法。 在一个实施例中，用于分离接合的晶片的系统包括用于接合的晶片的支撑件和用于向结合的晶片施加纯粹的力的装置。 该系统还包括用于向接合晶片施加真空的装置。

公开(公告)号：US08809123B2

公开(公告)日：2014-08-19

申请号：US13488745

申请日：2012-06-05

申请人： Ping-Yin Liu ,  Xin-Hua Huang ,  Lan-Lin Chao ,  Chia-Shiung Tsai

发明人： Ping-Yin Liu ,  Xin-Hua Huang ,  Lan-Lin Chao ,  Chia-Shiung Tsai

IPC分类号： H01L21/00

CPC分类号： H01L25/0657 ,  H01L24/03 ,  H01L24/05 ,  H01L24/08 ,  H01L24/80 ,  H01L24/92 ,  H01L24/94 ,  H01L25/50 ,  H01L2224/03845 ,  H01L2224/05026 ,  H01L2224/05147 ,  H01L2224/05571 ,  H01L2224/056 ,  H01L2224/05611 ,  H01L2224/08147 ,  H01L2224/08502 ,  H01L2224/80097 ,  H01L2224/80203 ,  H01L2224/80204 ,  H01L2224/80345 ,  H01L2224/80805 ,  H01L2224/80896 ,  H01L2224/80986 ,  H01L2224/92 ,  H01L2224/9202 ,  H01L2224/94 ,  H01L2924/00014 ,  H01L2924/01322 ,  H01L2924/1461 ,  H01L2224/80 ,  H01L2224/83 ,  H01L2924/00012 ,  H01L2924/01032 ,  H01L2924/00 ,  H01L2224/05552

摘要： Three dimensional integrated circuit (3DIC) structures and hybrid bonding methods for semiconductor wafers are disclosed. A 3DIC structure includes a first semiconductor device having first conductive pads disposed within a first insulating material on a top surface thereof, the first conductive pads having a first recess on a top surface thereof. The 3DIC structure includes a second semiconductor device having second conductive pads disposed within a second insulating material on a top surface thereof coupled to the first semiconductor device, the second conductive pads having a second recess on a top surface thereof. A sealing layer is disposed between the first conductive pads and the second conductive pads in the first recess and the second recess. The sealing layer bonds the first conductive pads to the second conductive pads. The first insulating material is bonded to the second insulating material.

摘要翻译： 公开了用于半导体晶片的三维集成电路（3DIC）结构和混合键合方法。 3DIC结构包括第一半导体器件，其第一导电焊盘设置在其顶表面上的第一绝缘材料内，第一导电焊盘在其顶表面上具有第一凹部。 3DIC结构包括第二半导体器件，其第二导电焊盘设置在耦合到第一半导体器件的顶表面上的第二绝缘材料内，第二导电焊盘在其顶表面上具有第二凹槽。 密封层设置在第一导电垫和第一凹槽和第二凹槽中的第二导电垫之间。 密封层将第一导电焊盘连接到第二导电焊盘。 第一绝缘材料结合到第二绝缘材料上。

公开(公告)号：US20140020818A1

公开(公告)日：2014-01-23

申请号：US13554751

申请日：2012-07-20

申请人： Xin-Hua Huang ,  Ping-Yin Liu ,  Hung-Hua Lin ,  Yuan-Chih Hsieh ,  Lan-Lin Chao ,  Chia-Shiung Tsai

发明人： Xin-Hua Huang ,  Ping-Yin Liu ,  Hung-Hua Lin ,  Yuan-Chih Hsieh ,  Lan-Lin Chao ,  Chia-Shiung Tsai

IPC分类号： B32B38/10 ,  B32B37/02

CPC分类号： H01L21/67092 ,  Y10T156/11 ,  Y10T156/1132 ,  Y10T156/1153 ,  Y10T156/1189 ,  Y10T156/1911 ,  Y10T156/1944 ,  Y10T156/1972

摘要： Systems and methods of separating bonded wafers are disclosed. In one embodiment, a system for separating bonded wafers includes a support for the bonded wafers and means for applying a sheer force to the bonded wafers. The system also includes means for applying a vacuum to the bonded wafers.

摘要翻译： 公开了分离键合晶片的系统和方法。 在一个实施例中，用于分离接合的晶片的系统包括用于接合的晶片的支撑件和用于向结合的晶片施加纯粹的力的装置。 该系统还包括用于向接合晶片施加真空的装置。

公开(公告)号：US20140011324A1

公开(公告)日：2014-01-09

申请号：US13542507

申请日：2012-07-05

申请人： Ping-Yin Liu ,  Shih-Wei Lin ,  Xin-Hua Huang ,  Lan-Lin Chao ,  Chia-Shiung Tsai

发明人： Ping-Yin Liu ,  Shih-Wei Lin ,  Xin-Hua Huang ,  Lan-Lin Chao ,  Chia-Shiung Tsai

IPC分类号： H01L21/50

CPC分类号： H01L24/80 ,  H01L24/03 ,  H01L24/05 ,  H01L24/08 ,  H01L24/27 ,  H01L24/74 ,  H01L24/94 ,  H01L2224/02215 ,  H01L2224/0361 ,  H01L2224/03616 ,  H01L2224/0381 ,  H01L2224/05647 ,  H01L2224/05687 ,  H01L2224/08145 ,  H01L2224/74 ,  H01L2224/7501 ,  H01L2224/75101 ,  H01L2224/7565 ,  H01L2224/75753 ,  H01L2224/75824 ,  H01L2224/80004 ,  H01L2224/80007 ,  H01L2224/8001 ,  H01L2224/80011 ,  H01L2224/80013 ,  H01L2224/80014 ,  H01L2224/80065 ,  H01L2224/80075 ,  H01L2224/80097 ,  H01L2224/80121 ,  H01L2224/80136 ,  H01L2224/80203 ,  H01L2224/80895 ,  H01L2224/80896 ,  H01L2224/83889 ,  H01L2224/94 ,  H01L2924/00014 ,  H01L2924/1461 ,  H01L2924/351 ,  Y10T156/15 ,  Y10T156/1744 ,  H01L2924/00012 ,  H01L2224/80 ,  H01L2924/05442 ,  H01L2924/00

摘要： Hybrid bonding systems and methods for semiconductor wafers are disclosed. In one embodiment, a hybrid bonding system for semiconductor wafers includes a chamber and a plurality of sub-chambers disposed within the chamber. A robotics handler is disposed within the chamber that is adapted to move a plurality of semiconductor wafers within the chamber between the plurality of sub-chambers. The plurality of sub-chambers includes a first sub-chamber adapted to remove a protection layer from the plurality of semiconductor wafers, and a second sub-chamber adapted to activate top surfaces of the plurality of semiconductor wafers prior to hybrid bonding the plurality of semiconductor wafers together. The plurality of sub-chambers also includes a third sub-chamber adapted to align the plurality of semiconductor wafers and hybrid bond the plurality of semiconductor wafers together.

摘要翻译： 公开了用于半导体晶片的混合键合系统和方法。 在一个实施例中，用于半导体晶片的混合键合系统包括腔室和设置在腔室内的多个子腔室。 机器人处理器设置在腔室内，其适于移动多个子室内的室内的多个半导体晶片。 多个子室包括适于从多个半导体晶片去除保护层的第一子室，以及适于在混合结合多个半导体之前激活多个半导体晶片的顶表面的第二子室 晶圆在一起 多个子室还包括适于对准多个半导体晶片并将多个半导体晶片混合地结合在一起的第三子室。

公开(公告)号：US09412725B2

公开(公告)日：2016-08-09

申请号：US13457637

申请日：2012-04-27

申请人： Szu-Ying Chen ,  Ping-Yin Liu ,  Calvin Yi-Ping Chao ,  Tzu-Jui Wang ,  Jen-Cheng Liu ,  Dun-Nian Yaung ,  Lan-Lin Chao

发明人： Szu-Ying Chen ,  Ping-Yin Liu ,  Calvin Yi-Ping Chao ,  Tzu-Jui Wang ,  Jen-Cheng Liu ,  Dun-Nian Yaung ,  Lan-Lin Chao

IPC分类号： H01L27/00 ,  H01L25/16 ,  H01L27/146

CPC分类号： H01L27/1469 ,  H01L25/16 ,  H01L27/14618 ,  H01L27/14621 ,  H01L27/14627 ,  H01L27/14632 ,  H01L27/14634 ,  H01L27/14636 ,  H01L27/1464 ,  H01L27/14643 ,  H01L27/14683 ,  H01L2924/0002 ,  H01L2924/00

摘要： Methods and apparatus for packaging a backside illuminated (BSI) image sensor or a sensor device with an application specific integrated circuit (ASIC) are disclosed. According to an embodiment, a sensor device may be bonded together face-to-face with an ASIC without using a carrier wafer, where corresponding bond pads of the sensor are aligned with bond pads of the ASIC and bonded together, in a one-to-one fashion. A column of pixels of the sensor may share a bond bad connected by a shared inter-metal line. The bond pads may be of different sizes and configured in different rows to be disjoint from each other. Additional dummy pads may be added to increase the bonding between the sensor and the ASIC.

摘要翻译： 公开了用于封装具有专用集成电路（ASIC）的背面照明（BSI）图像传感器或传感器装置的方法和装置。 根据实施例，传感器装置可以与ASIC面对面地结合在一起，而不使用载体晶片，其中传感器的相应接合焊盘与ASIC的接合焊盘对准并且结合在一起，以一对一 一个时尚。 传感器的像素列可以共享由共享的金属间线路连接不良的键。 接合焊盘可以具有不同的尺寸并且被配置成不同的行以彼此不相交。 可以添加附加的虚拟焊盘以增加传感器和ASIC之间的接合。

公开(公告)号：US20130334638A1

公开(公告)日：2013-12-19

申请号：US13524757

申请日：2012-06-15

申请人： Szu-Ying Chen ,  Tzu-Jui Wang ,  Jen-Cheng Liu ,  Dun-Nian Yaung ,  Ping-Yin Liu ,  Lan-Lin Chao

发明人： Szu-Ying Chen ,  Tzu-Jui Wang ,  Jen-Cheng Liu ,  Dun-Nian Yaung ,  Ping-Yin Liu ,  Lan-Lin Chao

IPC分类号： H01L31/0232 ,  H01L31/02

CPC分类号： H01L27/14634 ,  H01L27/14621 ,  H01L27/14627 ,  H01L27/14636 ,  H01L27/1464 ,  H01L27/1469

摘要： A backside illuminated image sensor comprises a photodiode and a first transistor located in a first substrate, wherein the first transistor is electrically coupled to the photodiode. The backside illuminated image sensor further comprises a plurality of logic circuits formed in a second substrate, wherein the second substrate is stacked on the first substrate and the logic circuit are coupled to the first transistor through a plurality of bonding pads.

摘要翻译： 背面照明图像传感器包括光电二极管和位于第一衬底中的第一晶体管，其中第一晶体管电耦合到光电二极管。 背面照明图像传感器还包括形成在第二基板中的多个逻辑电路，其中第二基板堆叠在第一基板上，并且逻辑电路通过多个接合焊盘耦合到第一晶体管。

公开(公告)号：US20060032447A1

公开(公告)日：2006-02-16

申请号：US11074632

申请日：2005-03-09

申请人： Ping-Yin Liu ,  Ming-Fong Chen ,  Hung-Yin Tsai

发明人： Ping-Yin Liu ,  Ming-Fong Chen ,  Hung-Yin Tsai

IPC分类号： C23C16/00

CPC分类号： C23C16/274 ,  C23C16/482 ,  C23C16/511 ,  C23C16/52

摘要： The processing chamber comprises an energy wave source and a curved spherical surface, wherein the curved spherical surface of the chamber is composed of at least a Fresnel reflector for reflecting the energy wave discharged from the energy wave source and projecting the same onto a platform as the energy wave source is operating in coordination with the curved spherical surface. In addition, the energy wave source can be a microwave source or a light source. It is noted that the curved spherical surface can be a Fresnel reflector, a wave spherical surface with a portion thereof being replaced by a Fresnel reflector, a curved spherical surface with a portion therof being replaced by at least two Fresnel reflectors, and a surface entirely formed of a plurality of Fresnel reflectors. The processing chamber disclosed in the present invention significantly increases energy density, area, and energy uniformity of the projection region so as to diminish required space of equipment and costs of equipment and manufacture.

摘要翻译： 所述处理室包括能量波源和弯曲球形表面，其中所述腔室的弯曲球形表面由至少一个菲涅尔反射器组成，用于反射从能量波源放出的能量波，并将其投射到平台上作为 能量波源与曲面球面协调工作。 此外，能量波源可以是微波源或光源。 要注意的是，弯曲的球面可以是菲涅耳反射器，波面球形表面的一部分被菲涅耳反射器代替，弯曲的球形表面具有由至少两个菲涅尔反射器代替的部分，并且完全表面的表面 由多个菲涅耳反射器形成。 本发明公开的处理室显着地增加了投影区域的能量密度，面积和能量均匀性，从而减少了设备所需的空间和设备和制造成本。

公开(公告)号：US08790946B2

公开(公告)日：2014-07-29

申请号：US13365043

申请日：2012-02-02

申请人： Xin-Hua Huang ,  Ping-Yin Liu ,  Li-Cheng Chu ,  Yuan-Chih Hsieh ,  Lan-Lin Chao ,  Chun-Wen Cheng ,  Chia-Shiung Tsai

发明人： Xin-Hua Huang ,  Ping-Yin Liu ,  Li-Cheng Chu ,  Yuan-Chih Hsieh ,  Lan-Lin Chao ,  Chun-Wen Cheng ,  Chia-Shiung Tsai

IPC分类号： H01L21/52

CPC分类号： B23K20/002 ,  B23K20/023

摘要： A method includes bonding a first bond layer to a second bond layer through eutectic bonding. The step of bonding includes heating the first bond layer and the second bond layer to a temperature higher than a eutectic temperature of the first bond layer and the second bond layer, and performing a pumping cycle. The pumping cycle includes applying a first force to press the first bond layer and the second bond layer against each other. After the step of applying the first force, a second force lower than the first force is applied to press the first bond layer and the second bond layer against each other. After the step of applying the second force, a third force higher than the second force is applied to press the first bond layer and the second bond layer against each other.

摘要翻译： 一种方法包括通过共晶接合将第一接合层结合到第二接合层。 接合步骤包括将第一接合层和第二接合层加热至高于第一接合层和第二接合层的共晶温度的温度，并进行泵送循环。 泵送循环包括施加第一力以将第一接合层和第二接合层相互挤压。 在施加第一力的步骤之后，施加比第一力小的第二力以将第一接合层和第二接合层相互挤压。 在施加第二力的步骤之后，施加比第二力高的第三力以将第一接合层和第二接合层相互挤压。

公开(公告)号：US20130285180A1

公开(公告)日：2013-10-31

申请号：US13458812

申请日：2012-04-27

申请人： Tzu-Jui Wang ,  Szu-Ying Chen ,  Jen-Cheng Liu ,  Dun-Nian Yaung ,  Ping-Yin Liu ,  Lan-Lin Chao

发明人： Tzu-Jui Wang ,  Szu-Ying Chen ,  Jen-Cheng Liu ,  Dun-Nian Yaung ,  Ping-Yin Liu ,  Lan-Lin Chao

IPC分类号： H01L31/0232 ,  H01L27/146 ,  H01L31/18

CPC分类号： H01L27/14683 ,  H01L27/14618 ,  H01L27/14634 ,  H01L27/1469 ,  H01L2924/0002 ,  H01L2924/00

摘要： A backside illuminated image sensor comprises a photodiode and a first transistor located in a first chip, wherein the first transistor is electrically coupled to the photodiode. The backside illuminated image sensor further comprises a second transistor formed in a second chip and a plurality of logic circuits formed in a third chip, wherein the second chip is stacked on the first chip and the third chip is stacked on the second chip. The logic circuit, the second transistor and the first transistor are coupled to each other through a plurality of boding pads and through vias.

摘要翻译： 背面照明图像传感器包括光电二极管和位于第一芯片中的第一晶体管，其中第一晶体管电耦合到光电二极管。 背面照明图像传感器还包括形成在第二芯片中的第二晶体管和形成在第三芯片中的多个逻辑电路，其中第二芯片堆叠在第一芯片上，第三芯片堆叠在第二芯片上。 逻辑电路，第二晶体管和第一晶体管通过多个焊盘和通孔彼此耦合。