公开(公告)号：US20060098928A1

公开(公告)日：2006-05-11

申请号：US11265931

申请日：2005-11-03

Applicant: Thomas Koch ,  Robert Pafchek ,  Mark Webster

Inventor： Thomas Koch ,  Robert Pafchek ,  Mark Webster

IPC: G02B6/10

CPC classification number: G02B6/132 ,  G02B2006/121 ,  G02B2006/12173 ,  H01S3/063 ,  H01S3/1603 ,  H01S3/1628

Abstract: Disclosed is a method of fabricating an optical waveguide device including the steps of forming a mask over a waveguide core material layer so as to leave a portion of the layer exposed, and exposing the structure to an oxidizing environment to form an oxide layer on the waveguide core material layer at least in the exposed portion thereby defining the lateral dimension of the waveguide core. The resulting waveguide core has extremely smooth surfaces for low optical losses.

公开(公告)号：US20050281241A1

公开(公告)日：2005-12-22

申请号：US11159812

申请日：2005-06-22

Applicant: Mark Webster ,  Michael Seals

Inventor： Mark Webster ,  Michael Seals

IPC: H04B7/06 ,  H04J1/00 ,  H04L27/26

CPC classification number: H04L27/2613 ,  H04B7/02 ,  H04B7/0697 ,  H04W24/00

Abstract: Embodiments of legacy compatible spatial multiplexing systems and methods are disclosed. One method embodiment, among others, comprises receiving long training symbols and cyclic shifted long training symbols corresponding to legacy preamble portions of packets corresponding to first and second transmit signals, receiving long training symbols and inverted cyclic shifted long training symbols corresponding to spatial multiplexing portions of packets corresponding to first and second transmit signals, and combining the symbols corresponding to the first and second transmit antennas to estimate the respective channels.

Abstract translation: 公开了传统兼容空间复用系统和方法的实施例。 一个方法实施例包括接收对应于与第一和第二发射信号相对应的分组的传统前导码部分的长训练符号和循环移位的长训练符号，接收对应于空间复用部分的长训练符号和反向循环移位长训练符号 分组对应于第一和第二发射信号，并组合对应于第一和第二发射天线的符号以估计相应的信道。

公开(公告)号：US20050180314A1

公开(公告)日：2005-08-18

申请号：US11033524

申请日：2005-01-12

Applicant: Mark Webster ,  Daniel Shearer

Inventor： Mark Webster ,  Daniel Shearer

IPC: H04B7/02 ,  H04J11/00 ,  H04L5/02

CPC classification number: H04L5/023 ,  H04B7/02

Abstract: A method and system provides a way to achieve very high data rate expanded bandwidth (wide band) WLAN operations reusing existing single channel radio designs. The system provides a dual-channel form of operation for greater flexibility and performance across multiple platforms. Further, the system provides adaptive anti-aliasing techniques for eliminating aliasing due to adjacent channel waveform effects. These techniques mesh with existing systems cleanly.

Abstract translation: 一种方法和系统提供了一种实现非常高的数据速率扩展带宽（宽带）WLAN操作的方式，重用现有的单通道无线电设计。 该系统提供了双通道的操作形式，可在多个平台上实现更大的灵活性和性能。 此外，该系统提供用于消除由于相邻信道波形效应引起的混叠的自适应抗混叠技术。 这些技术干净地与现有系统联网。

公开(公告)号：US20050117670A1

公开(公告)日：2005-06-02

申请号：US10927487

申请日：2004-08-27

Applicant: Mark Webster ,  Albert Garrett ,  Steven Halford ,  Michael Seals

Inventor： Mark Webster ,  Albert Garrett ,  Steven Halford ,  Michael Seals

IPC: H04J11/00 ,  H04L27/26

CPC classification number: H04L27/2602

Abstract: A 10 MHz channelized orthogonal frequency division multiplexing (OFDM) transmitter is provided that communicates using a modified OFDM packet structure with a half-rate oscillator having standard accuracy. The transmitter has an inverse fast fourier transform (IFFT) data processor that appends an outer pair of data subcarriers on either end of an OFDM subcarrier profile. An IFFT long sync processor appends an outer pair of binary phase shift key (BPSK) subcarriers on either end of an OFDM long sync subcarrier profile. By copying or appending the information of the data subcarriers closest to zero Hz. to more robust locations, 10 MHz channelized OFDM can be achieved with half-rate clocks and 20 PPM oscillators.

Abstract translation: 提供了一种使用修正的OFDM分组结构与具有标准精度的半速率振荡器进行通信的10MHz信道化正交频分复用（OFDM）发射机。 发射机具有在OFDM子载波简档的任一端附加一对外部数据子载波对的快速傅立叶变换（IFFT）数据处理器。 IFFT长同步处理器在OFDM长同步子载波简档的任一端附加一对外部二进制相移键（BPSK）副载波。 通过复制或附加最接近零Hz的数据子载波的信息。 到更健壮的位置，可以使用半速率时钟和20 PPM振荡器来实现10 MHz信道化OFDM。

公开(公告)号：US20050075815A1

公开(公告)日：2005-04-07

申请号：US10666410

申请日：2003-09-19

Applicant: Mark Webster ,  Michael Seals ,  Bruce Cochran

Inventor： Mark Webster ,  Michael Seals ,  Bruce Cochran

IPC: H04B17/00 ,  G06F19/00

CPC classification number: H04L27/364 ,  H03C3/406 ,  H03D3/008 ,  H03D3/009 ,  H04B17/14

Abstract: An on-signal calibration system I and Q signals of a transmitter to remove distortions in the RF output signal. The transmitter generates I and Q values and converts, modulates and combines the I and Q values into the RF output signal for transmission. The calibration system includes a detector, a sampler, a selector, an imbalance estimator, and an IQ corrector. The detector senses the RF output signal and provides a detection signal indicative thereof. The sampler samples the detection signal and provides digital samples. The selector selects from among the digital samples that correspond to predetermined ranges of the I and Q values, or otherwise predetermined selection boxes at predetermined phases. The imbalance estimator determines at least one imbalance estimate based on selected digital samples. The IQ corrector corrects the I and Q values using at least one imbalance estimate.

Abstract translation: 发射机的信号校准系统I和Q信号，以消除RF输出信号中的失真。 发射机产生I和Q值，并将I和Q值转换，调制和组合成RF输出信号进行传输。 校准系统包括检测器，采样器，选择器，不平衡估计器和IQ校正器。 检测器感测RF输出信号并提供指示其的检测信号。 采样器对检测信号进行采样，并提供数字采样。 选择器从数字样本中选择对应于I和Q值的预定范围，或者在预定阶段选择预定的选择框。 不平衡估计器基于所选择的数字样本确定至少一个不平衡估计。 IQ校正器使用至少一个不平衡估计来校正I和Q值。

公开(公告)号：US20050053128A1

公开(公告)日：2005-03-10

申请号：US10886025

申请日：2004-07-08

Applicant: Daniel Shearer ,  Alex Yeh ,  Mark Webster ,  Steven Halford

Inventor： Daniel Shearer ,  Alex Yeh ,  Mark Webster ,  Steven Halford

IPC: H03K5/159 ,  H04L25/02 ,  H04L25/03

CPC classification number: H04L25/03159 ,  H04L25/022 ,  H04L2025/03414 ,  H04L2025/03522

Abstract: An adaptive frequency equalization system providing an equalizer that has programmable taps that adjusts magnitude and phase of symbol information of a received signal and that provides equalized symbol information. The system includes a hard decision circuit that selects ideal symbol values using the equalized symbol information. A frequency response circuit determines frequency response update values using the ideal symbol values and the received signal. An adjust circuit updates stored frequency response information using the frequency response update values, and also updates the programmable taps of the equalizer using the stored frequency response information.

Abstract translation: 一种自适应频率均衡系统，其提供均衡器，该均衡器具有调节接收信号的符号信息的幅度和相位并且提供均衡的符号信息的可编程抽头。 该系统包括使用均衡符号信息来选择理想符号值的硬判决电路。 频率响应电路使用理想符号值和接收信号来确定频率响应更新值。 调整电路使用频率响应更新值更新存储的频率响应信息，并且还使用存储的频率响应信息来更新均衡器的可编程抽头。

公开(公告)号：US08803269B2

公开(公告)日：2014-08-12

申请号：US13463408

申请日：2012-05-03

Applicant: Kalpendu Shastri ,  Vipulkumar Patel ,  Mark Webster ,  Prakash Gothoskar ,  Ravinder Kachru ,  Soham Pathak ,  Rao V. Yelamarty ,  Thomas Daugherty ,  Bipin Dama ,  Kaushik Patel ,  Kishor Desai

Inventor： Kalpendu Shastri ,  Vipulkumar Patel ,  Mark Webster ,  Prakash Gothoskar ,  Ravinder Kachru ,  Soham Pathak ,  Rao V. Yelamarty ,  Thomas Daugherty ,  Bipin Dama ,  Kaushik Patel ,  Kishor Desai

IPC: H01L31/0232 ,  H01L29/40 ,  H01L23/053 ,  H01L23/12

CPC classification number: H01L25/50 ,  G02B6/423 ,  G02B6/4244 ,  G02B6/4245 ,  G02B6/4249 ,  G02B6/4257 ,  G02B6/426 ,  H01L25/167 ,  H01L2224/16225 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2924/00014

Abstract: A wafer scale implementation of an opto-electronic transceiver assembly process utilizes a silicon wafer as an optical reference plane and platform upon which all necessary optical and electronic components are simultaneously assembled for a plurality of separate transceiver modules. In particular, a silicon wafer is utilized as a “platform” (interposer) upon which all of the components for a multiple number of transceiver modules are mounted or integrated, with the top surface of the silicon interposer used as a reference plane for defining the optical signal path between separate optical components. Indeed, by using a single silicon wafer as the platform for a large number of separate transceiver modules, one is able to use a wafer scale assembly process, as well as optical alignment and testing of these modules.

Abstract translation: 光电子收发器组件过程的晶片级实现利用硅晶片作为光学参考平面和平台，同时为多个单独的收发器模块组装所有必需的光学和电子部件。 特别地，硅晶片被用作“平台”（插入器），在其上安装或集成多个收发器模块的所有组件，硅插入器的顶表面用作参考平面，用于定义 分离光学元件之间的光信号路径。 实际上，通过使用单个硅晶片作为大量单独的收发器模块的平台，可以使用晶片尺度组装过程以及这些模块的光学对准和测试。

公开(公告)号：US20120237160A1

公开(公告)日：2012-09-20

申请号：US13421833

申请日：2012-03-15

Applicant: Kalpendu Shastri ,  Bipin Dama ,  Mark Webster ,  David Piede

Inventor： Kalpendu Shastri ,  Bipin Dama ,  Mark Webster ,  David Piede

IPC: G02B6/12

CPC classification number: H01P3/00 ,  G02F1/011 ,  G02F1/0121 ,  G02F1/0327 ,  G02F1/225 ,  G02F1/2255 ,  G02F2201/124 ,  G02F2201/126 ,  H05K1/0245 ,  H05K2201/09245 ,  H05K2201/09254 ,  H05K2201/10121

Abstract: A configuration for routing electrical signals between a conventional electronic integrated circuit (IC) and an opto-electronic subassembly is formed as an array of signal paths carrying oppositely-signed signals on adjacent paths to lower the inductance associated with the connection between the IC and the opto-electronic subassembly. The array of signal paths can take the form of an array of wirebonds between the IC and the subassembly, an array of conductive traces formed on the opto-electronic subassembly, or both.

Abstract translation: 在常规电子集成电路（IC）和光电子组件之间布置电信号的配置被形成为在相邻路径上承载相反信号的信号路径阵列，以降低与IC和IC之间的连接相关联的电感 光电子组件。 信号路径阵列可以采取在IC和子组件之间的引线阵列的形式，形成在光电子组件上的导电迹线阵列，或两者。

公开(公告)号：US20110222813A1

公开(公告)日：2011-09-15

申请号：US13032899

申请日：2011-02-23

Applicant: Mark Webster ,  Kalpendu Shastri

Inventor： Mark Webster ,  Kalpendu Shastri

IPC: G02F1/035

CPC classification number: G02F1/2257 ,  G02F1/025 ,  G02F2203/20 ,  G02F2203/25 ,  G02F2203/255

Abstract: A semiconductor-based optical modulator is presented that includes a separate phase control section to adjust the amount of chirp present in the modulated output signal. At least one section is added to the modulator configuration and driven to create a pure “phase” signal that will is added to the output signal and modify the eiφ term inherent in the modulation function. The phase modulation control section may be located within the modulator itself (with one segment on each arm, driven by the same input signal), or may be disposed “outside” of the modulator on either the input waveguiding section or the output waveguiding section. The phase control section may be formed to comprise multiple segments (of different lengths), with the overall phase added to the propagating signal controlled by selecting the different segments to be energized to impart a phase delay to a signal propagating through the energized section(s).

Abstract translation: 提出了一种基于半导体的光调制器，其包括单独的相位控制部分，用于调节调制输出信号中存在的线性调频音量。 至少一个部分被添加到调制器配置并被驱动以产生将被添加到输出信号并且修改ei＆phgr的纯“相”信号。 术语固有的调制功能。 相位调制控制部分可以位于调制器本身内（每个臂上的一个段由相同的输入信号驱动），或者可以设置在输入波导部分或输出波导部分上的调制器的“外部”。 相位控制部分可以形成为包括多个段（不同长度），其中通过选择不同的被激励的段来控制传播信号的总相位，以向通过通电部分传播的信号施加相位延迟 ）。

公开(公告)号：US20110221019A1

公开(公告)日：2011-09-15

申请号：US13038470

申请日：2011-03-02

Applicant: Vipulkumar Patel ,  Prakash Gothoskar ,  Mark Webster ,  Christopher J. Lang

Inventor： Vipulkumar Patel ,  Prakash Gothoskar ,  Mark Webster ,  Christopher J. Lang

IPC: H01L31/108

CPC classification number: H01L31/101 ,  H01L31/1085

Abstract: A planar, waveguide-based silicon Schottky barrier photodetector includes a third terminal in the form of a field plate to improve the responsivity of the detector. Preferably, a silicide used for the detection region is formed during a processing step where other silicide contact regions are being formed. The field plate is preferably formed as part of the first or second layer of CMOS metallization and is controlled by an applied voltage to modify the electric field in the vicinity of the detector's silicide layer. By modifying the electric field, the responsivity of the device is “tuned” so as to adjust the momentum of “hot” carriers (electrons or holes, depending on the conductivity of the silicon) with respect to the Schottky barrier of the device. The applied potential functions to align with the direction of momentum of the “hot” carriers in the preferred direction “normal” to the silicon-silicide interface, allowing for an increased number to move over the Schottky barrier and add to the generated photocurrent.

Abstract translation: 平面的基于波导的硅肖特基势垒光电检测器包括场板形式的第三端子，以提高检测器的响应度。 优选地，在其中形成其它硅化物接触区域的处理步骤期间形成用于检测区域的硅化物。 场板优选地形成为第一或第二CMOS金属化层的一部分，并且通过施加的电压来控制，以修改检测器硅化物层附近的电场。 通过修改电场，器件的响应度被“调谐”，以相对于器件的肖特基势垒调节“热”载流子（电子或空穴，取决于硅的导电性）的动量。 所施加的电位功能与“硅”载体的优势方向“正常”硅硅化物界面的动量方向相一致，允许增加的数量移动到肖特基势垒上并增加产生的光电流。